JPH03237835A - Bridge circuit interconnecting network and its learning method - Google Patents

Abstract

PURPOSE:To reduce the processing time by detecting a sender address and a reception destination address of a received data by means of the hardware before a data received from a network is stored in a memory. CONSTITUTION:The circuit is provided with a 1st logic circuit means 13a detecting an address of a reception destination station from a message before the received message is stored in a message storage means 18, discriminating the coincidence/dissidence of the stored address stored in a memory means 15a and an address of the detected reception destination station so as to decide the relay/abort of the message, and a 2nd logic circuit means 13b detecting a sender station address from the message and storing the address into a memory means 15b. The station address stored in the memory means is limited to a network to which the sender station belong without fail and a station address of other network is never stored. Thus, the processing time discriminating whether or not a received message is to be relayed and the processing time studying automatically a station being a constituent of the network are reduced.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a bridge circuit for interconnecting networks and a learning method thereof, and in particular to a bridge circuit for interconnecting networks and a learning method for the same.
The present invention relates to a Brinon circuit that can shorten the processing time for determining whether to transmit to another network and the processing time for automatically learning the stations that make up the network.

[Prior Art] In FIG. 3, a local area network LANa having a plurality of stations 111a, ]12a, 113a and a local area network LANb having a plurality of stations 111b, 112b, 113b are interconnected by a bridge circuit 41. A conventional example is shown below. Here, the bridge circuit 41
It is assumed that the operation described in Japanese Patent Application Laid-Open No. 60-152145 is performed.

Figure 4 shows the details.

As shown in FIG. 4, the bridge circuit 41 includes communication control ICs 53 and 55, a microprocessor unit (MPL
I) 61, memory controller 65, internal bus 67.6
9, MPU bus 71, program RAM 77, ROM 7
3. RAM 75 for filtering table, signal line 81
, 83 and a timer 91.

Here, the interconnecting networks are l50880
2-4 A token passing bus is adopted, and the communication control IC 53 is a token bus controller (TBC) compatible with Lance C, which is described in the above-mentioned publication.

Further, the filtering table RAM 75 includes the look amplifier control section and lookup RA described in the above publication.
M corresponds to the new source RAM. This filtering table RAM 75 has a memory card for storing station addresses, and a hash circuit that stores the station address to be compared among the station addresses stored in the memory. It consists of a circuit that determines from

In addition, 51a and 51b in the figure are LANaLANb, respectively.
It is a transmission path for

Automatic learning and relay determination by software using the MPU 61 will be described below with reference to FIGS. 4 to 6.

Automatic learning of source stations that constitute a network As described in the above publication, the bridge circuit 41 automatically learns the source address of a received message and which network the source station belongs to. RA for filtering table of bridge circuit 41 by learning
Store in M75.

For example, assume that the bridge circuit 41 has now received a message from the station 111a.

After checking the message for errors, the communication control IC 53 sends the message to the memory controller 65 via the internal bus 67.
and instructs the memory controller 65 to store the received message in the buffer memory 63. Then, an interrupt signal is issued to the MPU 61 via the signal line 81.

The MPU 61 searches whether the station address of the station 111a and the information that the station 111a belongs to network "a" are stored in the filtering table RAM 75, and if they are not stored, stores them, that is, performs learning. (Steps 501 and 502 in FIG. 5).

FIG. 6(a) shows a station 111 belonging to network LANa.
The learning results of the above example where a is the transmission source are shown below. Note that FIG. 6(b) shows the network LA instead of the station 111a.
The learning results are shown when the station 112b belonging to Nb becomes the transmission source after the above example.

In this way, the filtering table RAM 75 commonly stores learning results for networks LANa and LANb. Therefore, in the above example, when searching from this table, all the station addresses stored in the filtering table RAM 75 and the source box 111 are searched.
The station address of a is compared point by point until they match.

Relay determination of whether or not to transmit a received message As described in the above publication, the bridge circuit 41 is used to determine to which network the station having the destination address of the received message belongs. , the transmission source station address stored in the filtering table RAM 75 and information on the network to which the transmission source box belongs are retrieved by automatic learning (steps 503 and 504 in FIG. 5).
).

In this search as well, networks LANa and LANb
Since the table is common to both, the addresses of all the stations stored in the filtering table RAM 75 are compared point by point with the address of the receiving destination or the address of the sending box.

(1) When the filtering table RAM 75 stores the address of the receiving station and information indicating which network the receiving station belongs to (
(YES in step 503 in FIG. 5); ■ If the destination station and the source station do not belong to the same network, send the message to the network to which the destination station belongs (step 504 in FIG. 5); 505).

- If they belong to the same network, do nothing (steps 504 and 506 in Figure 5).

(2) If the address of the receiving station and the information indicating which network the receiving station belongs to are not stored in the filtering table RAM 75, the information is sent to all networks (Step 5 in Figure 5). 503,
507).

Specific explanation of relay determination (1) For example, consider communication between station 111a and station 112b (different network communication).

The bridge circuit 41 receives the message from the station 111a, and searches whether the address of the station 112b is stored in the filtering table RAM 75 in order to find out which network the receiving station 112b belongs to. instruct them to do so.

(1) Station 112 in RAM 75 for filtering table
b's address and station 112b is on network "b"
If the message belongs to the network "b", the bridge circuit 41 instructs the communication control IC 55 to retrieve the message from the buffer memory 63 and send it to the network "b" (steps 503 and 504 in FIG. 5).
, 505).

(2) If it is not stored, it is unknown which network the station 112b is connected to, so an instruction is sent to the communication control IC 55 to similarly transmit the message (steps 503 and 507 in FIG. 5). ).

(If) Consider communication between station 111a and station 113a (same network communication).

The bridge circuit 41 receives the message from the station 111a, and searches whether the address of the station 113a is stored in the filtering table RAM 75 in order to find out which network the station 113a, which is the receiving destination, belongs to. instruct them to do so.

(1) Station 113 in RAM 75 for filtering table
If the address of station 113a and the information that station 113a belongs to network "a" are stored, the message is not sent to network "b" (steps 503, 504, 506 in FIG. 5).

(2) If not stored, station 111a and station +12
In the case of communication b ((2) of (I)), send (
(Steps 503, 507 in FIG. 5).

[Problems to be Solved by the Invention] However, in the above-mentioned prior art, it is difficult to determine whether or not to transmit a received message to another network, and when automatically learning stations on the network. , Since the filtering table RAM is commonly used by multiple networks, the addresses of all stations stored in the filtering table RAM are compared point by point with the destination address or source layer address using software. There is a need. For this reason,
As the number of stations stored in the filtering table RAM increases, the time required to perform the comparison increases, resulting in a disadvantage that the processing time of the bridge circuit becomes longer.

In addition, if the transmission speed of the network is high and many messages flow on the network, the bridge circuit may become congested and some frames may not be relayed.

An object of the present invention is to identify the source address and destination address of the received data before storing it in a memory (RAM for filtering table) or processing it in a communication control IC, etc. By detecting this using hardware, the drawbacks of the conventional technology described above are resolved, and the processing time for determining whether or not to relay a received message and the processing time for automatically learning the stations that make up the network are shortened. An object of the present invention is to provide a bridge circuit that interconnects networks that can be used to connect networks, and a learning method thereof.

[Means for Solving the Problems] The bridge circuit interconnecting the network of the present invention includes:
A bridge circuit for interconnecting at least two networks having a plurality of stations, each station configured to transmit a METSAFE including at least a destination station address and a source station address, the network In a bridge circuit that temporarily stores a message in a message storage means by a communication control logic circuit means for controlling the operation of the network, and then relays the message to another network as necessary, for a plurality of stations included in each network, a memory means for storing at least a part of the station address for each network; and a memory means for detecting the address of a receiving station from the message before storing the received message in the message storing means; first logic circuit means for determining whether a message is to be relayed or discarded by determining a match/mismatch between the address of the address and a storage address stored in the memory means; detecting a source station address from the message; and second logic circuit means stored in the memory means.

In the bridge circuit, the first logic circuit means and the second logic circuit means are connected.

Preferably, the communication control logic circuit means is arranged before the communication control logic circuit means for controlling the operation of the network.

In addition, the first logic circuit means determines whether the destination station address of the received message matches/disagrees with the station address stored in the memory means, based on the destination station address of the message. It is preferable to have a circuit for determining the address of the memory means in which the station address to be compared is stored among the station addresses stored in the means.

Furthermore, in order to detect a source station address from a message and store it in the memory means, the second logic circuit means detects a source station address from the message and stores the address in the memory means based on the source station address of the received message. It may also include a circuit for determining.

Further, in the learning method of a bridge circuit that interconnects networks according to the present invention, a bridge circuit that interconnects at least two networks stores, for each network, at least part of the station address, abiles, for a plurality of stations belonging to each network. When the bridge circuit receives a message including at least a destination address and a source address, the memory means corresponding to the network to which the source station belongs is provided with a memory means for storing the information of the source station. Regardless of whether the address is stored or not, at least a part of the address of the source station is stored in the memory means to learn the station address of the source station belonging to the network.

Here, the reason why at least a part of the station address is used is to include the case where the entire station address may not be necessary to identify the station.

[Function] When a plurality of stations belonging to each network become transmission source stations, if a common memory is provided to commonly store station information in each network in order to learn the station, It is necessary to store, as station information, a station address and information on which network the station belongs to in the common memory. This is because station addresses belonging to other networks are also stored together, so it is necessary to distinguish between them. As a result, in order to obtain specific station information, the contents of the memory means must be compared point by point. This comparison is based on software and takes time.

However, regarding the multiple stations each network has,
If memory means for storing the station address for each network is provided separately, as long as the station address stored in the memory means corresponding to the network to which the message source station belongs is retrieved from the message. The station address stored in the memory means is always limited to the network to which the source layer belongs, and station addresses of other networks are never stored. That is, it is sufficient to store only the station address of the own network that is the transmission source in the memory means in which the network is specified. As a result, high-speed search using hardware becomes possible.

The present invention was created from this viewpoint.

Before the message received from the network is stored in the message storage means or processed by the communication control logic circuit means, the source station address and destination station address of the received message are detected.

Then, if it is determined whether the message is to be relayed to another network based on the detected destination station address and the address data in the memory means stored in the address corresponding to this address, the station address and memory The comparison time with the station address stored in the means is reduced.

In addition, the detected source address is stored in the memory means in order to automatically learn the stations that make up the network. At this time, it is determined whether the address of the source station is stored in the memory means or not. If the address of the source station is stored in the memory means without doing so, the learning time will be shortened.

[Example] An embodiment of the present invention will be described below with reference to FIG.

Figure 1 shows local networks LANa and LAN.
1 and 2 are interconnected by a bridge circuit. Here, both LANa and LANb are 1sO8802
-4 token passing bus is used.

Also, the subscript a attached to the component of the bridge circuit is L A
Components on the Na side are indicated, and subscripts s and suffixes indicate components on the LANb side, and each component is provided individually except for the 2-port memory. Note that codes with no subscripts are used in common for both.

11a and llb are transmission lines of LANa and LANb, 12a
, 12b is a modem, and a transmission line 11a.

11b and the bridge circuit, and modulates and demodulates signals sent from each network and the bridge circuit. 1
Determination circuits 14a and 14b are connected to the modems 12a and 12b, respectively, and are a main part of the present invention.
is a communication control I that receives each output from the determination circuits 13a and 13b and performs protocol control of the token passing bus.
C (token bus controller) TEAL. 15a, 15
b is a filtering table RAM that is connected to the judgment circuits 13a, +3b and MPUs 16a, 16b and stores a filtering table used for automatic learning and frame relay judgment; lea, 16b is a microcontroller that controls the entire bridge circuit. Processor unit (MPU)
, 17a, 17b are communication control ICs 14a, 14b, 2
A bus 18 for the MPUs 16a and 16b connected to the boat memory 18 is a two-port memory that is connected between the buses 17a and 17b and stores received data to be relayed.

What should be noted here is that the determination circuits +3a and 13b that determine whether to store address information or relay information are provided as hardware separate from the MPUs 16a and 16b that operate on software, and that the communication control ICs 14a and 14b
, or filtering table RAM 15a, 15b
The point is that it is provided in the previous stage. Another point is that filtering table RAMs 15a and 15b are provided on each network side.

Next, details of the determination circuits 13a and 13b (+3) are shown in FIG. 2. 20 and 21 are 48-bit shift registers, 20 for the source address and 21 for the destination address. Note that 48 bits is an example. 22 is a comparator that allows a received frame to pass through and determines whether the frame is a control frame or a data frame; 23 is a delay circuit that delays the through frame output of comparator 22 for a predetermined time; and 24 is a comparison for determination. 25 and 26 are 48-bit data latches, and 25 is a transmission source address stored in a 48-bit shift register for transmission source address. 26 is for a source address to latch an address, and 26 is a destination address to latch a destination address stored in the 48-bit shift register 21 for destination address. 27 is a judgment comparator 22
This is a control circuit (hereinafter referred to as a hash circuit control unit) that reads the station address output from latches 25 and 26 when there is an output from latches 25 and 26, performs automatic learning, and determines whether or not to relay the received frame to another network. . Reference numeral 28 indicates a hash circuit which obtains a reference address in the filtering table RAM 15 from the 48-bit station address input via the hash control circuit 27; Comparators 30 to 35 for comparing the received address with the received address are signal lines connecting these components.

Note that the 48-bit shift register 21. for the above-mentioned receiving destination address. Control/data frame determination comparator 22. Delay circuit 23. Frame passage control circuit 24, 48-bit data latch 26 for receiving destination address, hash circuit control section 27
．． The haso/yu circuit 2B comparator 29 constitutes the first logic circuit means of the present invention. Also, 48 for the above sender address.
bit shift register 20. 48b for source address
it data latch 25. The second logic circuit means of the present invention is constituted by the hash circuit control section 27 and the two circuits 28.

Here, the operation when the bridge circuit of FIG. 1, which is an embodiment of the present invention, receives the token bus frame shown in FIG. 7 from the network LANa will be described with reference to FIG. Although FIG. 8 is written to be processed by software for convenience, it is actually processed by hardware.

The received frame is first signal-demodulated by the modem 12a and inputted to the determination circuit 13a shown in FIG. In the determination circuit 13a, as shown in FIG. Delay circuit 23
．． The frames pass through the frame passing control circuit 24 in this order.

When the field in the frame indicating whether the manually entered frame contains user data or performs network control, that is, the FC field of the 15O8802-4 token bus frame, reaches the comparator 22, the comparator 22 examines the FC field and determines whether the frame is a control frame (step 801 in FIG. 8).

If it is a control frame, it is sent via the signal line 30,
The frame passing control circuit 24 is requested to operate to pass the frame (step 802).

Further, if the frame includes user data, a latch signal is sent to the latches 25 and 26 via the signal line 31.

Here, control frames other than user data frames, such as 1s08802-4 token passing bus,
For example, in the case of frames that can be used for automatic learning, such as token frames that include the address of the transmitting optical layer,
Similarly via the signal line 31.

It can also be configured to send child signals.

The latch 25 latches the source station address field SA (see FIG. 7) that is passing through the shift register 20, and the latch 26 latches the destination station address field DA that is passing through the shift register 21 (step 803).

The hash circuit control section 27 starts its operation in response to a signal from the comparator 22 sent from the signal line 31.

The hash circuit control unit 27 first receives the destination station address latched by the launch 26 via the signal line 33 and sends it to the hash circuit 28 (step 804).

The hash circuit 28 converts the received 48-bit destination station address into an address in the filtering table RAM 15 using a Hannon function, and converts the 48-bit station address stored in that address into the RAM 15a.
and sends it to the comparator 29 via the signal line 34 (
Step 805).

The comparator 29 receives from the signal line 33 the address of the destination station of the received frame, and the RAM 1 for the filtering table.
The station address read from No. 5 is compared with the station address read from No. 5. That is,
It is checked whether the destination station is in the network that received the frame (step 806).

This inspection becomes a relay judgment.

If the results of the comparison are different, that is, the receiving station of the frame is the one that received the frame.

If the frame is not in the network, the comparator 29 sends an instruction to the frame passage control circuit 24 to pass the frame through the signal line 35 (step 807).

The received frame is time-adjusted within the delay circuit 23 during this series of processing, and is configured to pass through the delay circuit 23 exactly when the frame passage control circuit 24 controls the frame to pass. .

As shown in FIG. 1, the communication control IC4a and the MP
It is received and processed by the U 16a and stored in the two-vote memory 18 (steps 808 and 809).

MPU16a is an MP connected to the opposite network
A N
The frame is relayed to b (step 81O).

On the other hand, if both are the same, that is, if the destination station of the frame is in the network on the side that received the frame,
Through the signal line 35, the comparator 29 sends an instruction to the frame passage control circuit 24 to discard the frame (step 811).

While these processes are being performed, the hash circuit control unit 2
7 receives the source station address latched by the latch 25 via the signal line 32 and sends it to the hash circuit 28 (step 812).

The hash circuit 28 converts the received 48-bit source station address into an address in the filtering table RAM 15a using a hash function, and converts the received 48-bit source station address into an address in the filtering table RAM 15a, and converts the 48-bit source station address sent via the signal line 32 to that address. The station address is stored (step 813).

This storage results in automatic learning of the addresses of stations connected to LANa.

At this time, an age field described in the above-mentioned publication is provided in each entry of the filtering table RAM 15,
It is also possible to read the stored data from the address of the filtering table RAM 15a generated by the hash circuit 2B, and update the age field when attempting to store the same station address. .

Furthermore, when storing a station address in the address of filtering table RAM] 5a generated by the Hanyu circuit 28, if that area is already used by information of a different station address, a means for storing it most efficiently is further provided. It is also possible.

Next, the learning results of the above embodiment will be explained using FIGS. 3 and 9.

Suppose now that the Brinon circuit 41 receives a message from the station 1IIa belonging to the network LANa. The determination circuit 13a determines that the station address of the station 111a is L A N
A search is made to see if it is stored in the filtering table RAM 15a on the a side. Here, the reason why we do not purposely search whether information indicating that the station 111a belongs to network "a" is stored is that this is included in the search itself of the filtering table RAM 15a on the LANa side. . As a result of the search, if it is not stored, the address of this station 111a is
The data is stored in the side filtering table RAM 15a (FIG. 9(1)(a)). Next time, do the same and switch to station 11.
The bridge circuit 41 receives the message from 2a,
As a result of the search, if it is not stored, this station 112
The address of a is stored (FIG. 9(1)(b)).

Next, this time station 112b belonging to network LANb
Suppose that the bridge circuit 41 receives a message from . The determination circuit 13b determines whether the station address of the station 112b is LAN
It is searched to see if it is stored in the b-side filtering table RAM 15b. If it is not stored, this station address 112b is stored in the filtering table RAM 15b on the L A N b side (see Figure 9 (2).
)(a)).

Next time, the bridge circuit 4I receives a message from the station 113b in the same way, and if the message is not stored as a result of the search, it stores the address of this station 113b (9th
Figure (2) (b)).

In addition, in FIG. 9, addresses...ADi, AD++
I...,...AD], AD j+1... is the table RAM 15 converted using the hash function.
This is the address of a and 15b.

In this way, each filtering table RAM 15a
, 15b separately store the learning results of source station addresses for networks LANa and LANb. That is, L
Only the station addresses of stations belonging to LANa are stored in the table on the ANa side by automatic learning, and only the station addresses of stations belonging to LANb are stored in the table on the LANb side.

Therefore, when searching from each table, it is necessary to compare the addresses of all stations stored in the filtering table RAM 75 one by one with the address of the receiving station or the station address of the source station until they match. Not,
A single hardware comparison between the address of the destination station and the RAM address where this address should be stored as address data makes it possible to determine whether or not the data frame should be relayed. As a result, the comparison time can be significantly shortened.

In addition, in step 806 for making a relay determination in FIG. 8, when the receiving station of the frame is not in the network on the receiving side, the cases include: (1) Although the receiving station belongs to the network on the receiving side; There are cases where the destination station has not been learned yet, and cases where the destination station does not originally belong to the network on the receiving side.

In these cases, since they are transmitted together in this embodiment, the same result as the conventional method can be obtained and there is no problem.

In addition, in steps 812 and 813 in which learning is performed in FIG. 8, learning is performed without determining whether the address of the transmission entry is stored in the RAM, so Although the address of the source station will be registered twice, since there is a one-to-one correspondence between the address of the source station and the address of the RAM, there will be no problem as it will just be overwritten. The time required for overwriting is also not a problem since no judgment is made by the software.

As described above, according to this embodiment, the communication control IC 1
4 and the filtering table RAM 15, a determination circuit 13 is provided so that message relay determination is performed by hardware before storing the message in the 2-port memo IJ 13. Therefore, the message is stored in the filtering table RAM 13. It is no longer necessary to use software to compare the addresses of all the stations being sent one by one with the receiving address or transmitting station address. Therefore, even if the number of stations stored in the filtering table RAM increases, the Therefore, the processing time of the bridge circuit does not increase due to the increase in the time required to perform the process.

In addition, since the processing time is shortened, even if the network transmission speed is high and many messages flow on the network, there will be no possibility of frames that cannot be relayed due to the bridge circuit being in a wide state. .

[effect] According to the present invention, the following effects are achieved.

(1) According to the bridge circuit of the present invention, all configuration processing is performed by hardware before a received message is stored in the message storage means or before it is passed through a communication control IC, so communication can be performed as in the conventional case. A process for determining whether or not to relay a received message, compared to a method in which a received message is processed by a control logic circuit means, stored in a message storage means, and then relay determination and automatic learning processing are performed. The time and processing time for automatically learning the stations that make up the network can be significantly improved.

(2) Furthermore, in the conventional processing method, it was necessary to configure relay judgment and automatic learning according to the processing specifications of the communication control IC, but according to the present invention, it depends on the processing specifications of the communication control IC 1c. It is possible to provide relay judgment and automatic learning processing without having to do anything.

(3) According to the bridge circuit learning method of the present invention, since the source station address is stored regardless of whether the source station address is stored, it is not necessary to judge whether the source station address is stored or not. This allows for more efficient learning compared to the conventional method of learning after

[Brief explanation of drawings]

FIG. 1 is a block diagram of a bridge circuit showing an embodiment of the present invention, FIG. 2 is a block diagram of the determination circuit shown in FIG. 1, FIG. 3 is a network block diagram common to the conventional system and the present invention, and FIG. 5 is a flowchart of the learning/judgment process in the conventional example. FIG. 6 is a diagram showing the table contents of the common filtering table RAM after learning in the conventional example. FIG. A configuration diagram of the token bus frame, FIG. 8 is an explanatory diagram of learning and judgment processing by the hardware of this embodiment,
FIG. 9 is a diagram showing table contents on each network side after learning in this embodiment. 11a and llb are transmission lines, 12a and 12b are modems, 1
3a and 13b are determination circuits as first logic circuit means and second logic circuit means; 14a and 14b are communication control ICs as communication control logic circuit means; L5a and 15b are RAMs for filtering tables as memory means; 16
a, 16b are MPU117a, l7b is MPU bus,
18 is a 2-boat memory as a message storage means, 2
0 is a 48-bit soft register for the source address, 21
is a 48 bit register for receiving destination address, 2
2 is a control/data frame determination comparator, 23 is a delay circuit, 24 is a frame passage control circuit, 25 is a 48-bit data latch for the source address, 26 is a 48-bit data latch for the destination address, 27 is a circuit control section,
Reference numeral 28 is a huffing circuit, 29 is a comparator, and 30 to 35 are signal lines. 7-1 circuit of this embodiment (Fig. 1>y) '7' interconnecting '7'! b7” circuit 3rd
Figure 5 Figure 6 Configuration of base 7 frames Figure 7 (1) Team 7 on the LANa side (2) Table of LANb (III) Contents of each table after learning in this example Figure 9 242 −

Claims (1)

[Claims] (1) For interconnecting at least two networks having a plurality of stations, each station configured to transmit a message including at least a destination station address and a source station address. the bridge circuit, after temporarily storing the message in the message storage means by the communication control logic circuit means for controlling the operation of the network;
A bridge circuit that relays the message to other networks as necessary, a memory means for storing at least a part of the station address for each network for a plurality of stations included in each network; Before storing the message in the message storage means, the address of the destination station is detected from the message, and the match/mismatch between the detected address of the destination station and the storage address stored in the memory means is determined. a first logic circuit means for determining relay/discard of a message; and a second logic circuit means for detecting a source station address from the message and storing it in the memory means. bridge circuit. (2) In the bridge circuit according to claim 1, the first
A bridge circuit for interconnecting networks, characterized in that logic circuit means and said second logic circuit means are arranged before said communication control logic circuit means for controlling the operation of the network. (3) The first logic circuit means determines whether the destination station address of the received message matches/mismatches the station address stored in the memory means, based on the destination station address of the message. 3. The network interconnection system according to claim 1, further comprising a circuit for determining an address of the memory means in which a station address to be compared is stored among the station addresses stored in the memory means. bridge circuit. (4) The second logic circuit means detects the source station address from the message and stores it in the memory means, based on the source station address of the received message. 4. The bridge circuit for interconnecting networks according to claim 1, further comprising a circuit for determining an address. (5) A bridge circuit interconnecting at least two networks includes memory means for storing, for each network, at least a portion of the station address for a plurality of stations belonging to each network, and the bridge circuit at least receives When a message including a destination address and a source address is received, regardless of whether or not the address of the source station is stored in the memory means corresponding to the network to which the source station belongs, A learning method for a bridge circuit interconnecting networks, characterized in that at least part of the addresses of stations is stored in the memory means to learn station addresses of source stations belonging to the network.