JPH0323706A - Signal termination circuit - Google Patents
Signal termination circuitInfo
- Publication number
- JPH0323706A JPH0323706A JP1156891A JP15689189A JPH0323706A JP H0323706 A JPH0323706 A JP H0323706A JP 1156891 A JP1156891 A JP 1156891A JP 15689189 A JP15689189 A JP 15689189A JP H0323706 A JPH0323706 A JP H0323706A
- Authority
- JP
- Japan
- Prior art keywords
- unit
- signal
- terminating
- bus
- ground
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004806 packaging method and process Methods 0.000 abstract 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は信号終端回路に関するものである。[Detailed description of the invention] [Industrial application field] The present invention relates to a signal termination circuit.
従来、終端抵抗を使用するか否かの選択は抵抗に直列に
挿入された機械的なスイッチを用い手動で行なっていた
。Conventionally, the selection of whether or not to use a terminating resistor has been made manually using a mechanical switch inserted in series with the resistor.
そして、一本の信号線に複数のユニットが接続されるバ
ス構造をした系において、信号を終端する場合において
、終端を正しく行うためには信号源からもつとも遠いユ
ニットで終端する必要がある。In a system having a bus structure in which a plurality of units are connected to one signal line, when terminating a signal, it is necessary to terminate the signal in a unit farthest from the signal source in order to terminate the signal correctly.
上述した従来の終端の切シ替え方法では、ユニットの構
戒がかわb1さらに遠いユニットがあらわれたう、壕た
は終端を行っているユニットを引き抜いたシした場合に
は、信号の終端条件がかわシ、信号に擾乱を与えるとい
う課題があった。In the conventional termination switching method described above, if a unit's posture changes, a unit further away appears, or if a unit that is performing trench or termination is pulled out, the signal termination condition changes. However, there was the issue of disturbing the signal.
本発明の信号終端回路は、終端を必要とする信号線に複
数のユニットが順番に接続される系の各ユニットにおい
て、上記信号線と接続された終端用抵抗と、この終端用
抵抗とユニット内地気の間に接続されかつベースに与え
る電圧によりその終端用抵抗と地気との接続をオン・オ
フするトランジスタと、このトランジスタのベースに接
続されそのトランジスタをオンにする電圧を供給できる
プルアップ抵抗と、上記トランジスタのベースに接続さ
れる制御バスを有し、上記制御バスはそのユニットよう
あとに接続されるすべてのユニットにかいて地気に接続
され、最終のパネルの制御バスはオープンにする構成を
もつものである。The signal termination circuit of the present invention includes, in each unit of a system in which a plurality of units are sequentially connected to a signal line that requires termination, a termination resistor connected to the signal line, and a terminal between the termination resistor and the unit internal circuit. A transistor connected between the ground and the ground that turns on and off the connection between the terminating resistor and the ground by applying a voltage to the base, and a pull-up resistor that is connected to the base of this transistor and can supply the voltage that turns on the transistor. and a control bus connected to the base of the transistor, the control bus being connected to ground for all subsequent units connected to that unit, and the control bus of the final panel being open. It has a structure.
本発明にかいては、制御バスの接続によりユニットの実
装状態にしたがって信号バスの終端位置を自動的に切シ
替えられる。According to the present invention, the termination position of the signal bus can be automatically switched according to the mounting state of the unit by connecting the control bus.
以下、図面に基づき本発明の実施例を詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail based on the drawings.
図は本発明の一実旙例を示す回路図である。The figure is a circuit diagram showing an example of the present invention.
図において、11は送信ユニット、12は送信回路、1
3は信号バス、14,15.16は制御バス、21 ,
31 .41は信号線と接続された終端用抵抗、22.
32.42はそれぞれこの終端用抵抗21 ,31 .
41とユニット内地気の間に接続されかつベースに与え
る電圧によりその終端用抵抗21 ,31 .41と地
気との接続をオン・オフするトランジスタ、23,33
.43はそれぞれこのトランジスタ22.32.42の
各ベースに接続されそのトランジスタ22,32.42
をそれぞれオンにする電圧を供給できるプルアップ抵抗
、24,34.44は受信ユニットである。In the figure, 11 is a transmitting unit, 12 is a transmitting circuit, 1
3 is a signal bus, 14, 15.16 is a control bus, 21,
31. 41 is a termination resistor connected to the signal line; 22.
32, 42 are the terminating resistors 21, 31 .
41 and the ground air inside the unit, and the terminating resistor 21 , 31 . Transistor that turns on and off the connection between 41 and the earth, 23, 33
.. 43 are respectively connected to the bases of the transistors 22, 32, 42.
Pull-up resistors 24 and 34. 44 is a receiving unit that can supply voltages to turn on the respective pull-up resistors.
そして、制御バス14,15.16はそれぞれトランジ
スタ22.32.42の各ベースに接続され、この制御
バス14〜16はそのユニットよシあとに接続されるす
べてのユニットにかいて地気に接続され、最終のパネル
の制御バスはオープンにする構威となっている。The control buses 14, 15, 16 are connected to the bases of the transistors 22, 32, 42, respectively, and the control buses 14-16 are connected to ground for that unit and all subsequent units. The final panel's control bus will be left open.
つぎにこの図に示す実施例の動作を説明する。Next, the operation of the embodiment shown in this figure will be explained.
送信ユエット11の中の送信回路12の出力は信号バス
13により各受信ユニツ}24 ,34 .44に取b
込1れる。そして、この各受信ユニツ}24,34.4
4に取や込1れた信号バス13はそれぞれ終端用抵抗2
1 ,31 .41Thよびトランジスタ22,32.
42によって地気(グランド)に終端されている。しか
し、受信ユニット24のトランジスタ22はプルアップ
抵抗23によって+5vに吊b上げられているが、他の
受信ユニツ}34.44によう制御バス14を地気に落
とされているため、トランジスタ220ベース・エミッ
タ間電圧v0はO■となシ、トランジスタ22はオフと
なシ終端用抵抗21は電気的に地気とつ危がっていない
状態と女シ、受信ユニット24では信号バス13の終端
を行わない。The output of the transmitting circuit 12 in the transmitting unit 11 is transmitted via a signal bus 13 to each receiving unit }24, 34 . Tori b in 44
Includes 1. And each receiving unit}24, 34.4
Each of the signal buses 13 connected to 4 is connected to a terminating resistor 2.
1,31. 41Th and transistors 22, 32.
42 terminates at the ground. However, although the transistor 22 of the receiving unit 24 is pulled up to +5V by the pull-up resistor 23, since the control bus 14 is dropped to the ground like the other receiving units, the transistor 220 base・The emitter voltage v0 is 0, the transistor 22 is off, the termination resistor 21 is electrically connected to the ground, and the receiving unit 24 is at the termination of the signal bus 13. Do not do this.
同様に、受信ユニット34に訃いてもプルアップ抵抗3
3によ,6+5Vに吊ジ上けられているトランジスタ3
2のベース電圧は受信ユニット44に制御バス15を地
気に落とされているため、トランジスタ32もオフと々
b受信ユ二ット34でも信号バス13の終端を行わない
。受信ユニット44にかいては、制御バス16を地気に
落とされてい危いためトランジスタ4゛2のベース電圧
はプルアップ抵抗43で与えられる電圧となうトランジ
スタ42はオンとなシ、信号バス13は終端用抵抗41
により終端される。Similarly, even if the receiving unit 34 fails, the pull-up resistor 3
Transistor 3 is suspended to 6+5V by 3.
Since the base voltage of the control bus 15 is dropped to the ground by the receiving unit 44, the transistor 32 is also turned off and the receiving unit 34 does not terminate the signal bus 13. Regarding the receiving unit 44, since it is dangerous to drop the control bus 16 to the ground, the base voltage of the transistor 42 is set to the voltage given by the pull-up resistor 43, and the transistor 42 is not turned on. is the termination resistor 41
is terminated by
以上説明したように本発明の信号終端回路は、制御バス
の接続によυユニットの実装状態にしたがって信号バス
の終端位置を自動的に切シ替えられるため、信号バスに
擾乱を与えることなく、最適な位置で終端を行える効果
がある。1た人手を介さないため、スイッチ設定のミス
等から回避できるという利点がある。As explained above, the signal termination circuit of the present invention can automatically switch the termination position of the signal bus according to the mounting state of the υ unit by connecting the control bus, without causing any disturbance to the signal bus. This has the effect of terminating at an optimal position. Since there is no additional human intervention, there is an advantage that mistakes in switch settings can be avoided.
図は本発明の一実施例を示す回路図である。
11・・●●送信ユニット、12●●●●送信回路、1
3・・・・信号バス、14〜16●・・・制御バス、2
1・・・・終端用抵抗、22・・●●トランジスタ、2
3●●●●プルアップ抵抗、24・・・・受信ユニット
、31・・・・終端用抵抗、32●・●●トランジスタ
、33・・・・プルアップ抵抗、34●●●●受信ユニ
ット、41・・・・終端用抵抗、42・・・・トランジ
スタ、
4
3
・プルアップ抵抗、
4
4 ●
・受信ユニット。The figure is a circuit diagram showing one embodiment of the present invention. 11...●● Transmission unit, 12●●●● Transmission circuit, 1
3...Signal bus, 14-16●...Control bus, 2
1...Termination resistor, 22...●●transistor, 2
3●●●●pull-up resistor, 24...receiving unit, 31...terminal resistor, 32●●●●transistor, 33...pull-up resistor, 34●●●●receiving unit, 41... Termination resistor, 42... Transistor, 4 3 - Pull-up resistor, 4 4 ● - Receiving unit.
Claims (1)
続される系の各ユニツトにおいて、前記信号線と接続さ
れた終端用抵抗と、この終端用抵抗とユニツト内地気の
間に接続されかつベースに与える電圧により該終端用抵
抗と地気との接続をオン・オフするトランジスタと、こ
のトランジスタのベースに接続され該トランジスタをオ
ンにする電圧を供給できるプルアツプ抵抗と、前記トラ
ンジスタのベースに接続される制御バスを有し、前記制
御バスはそのユニツトよりあとに接続されるすべてのユ
ニツトにおいて地気に接続され、最終のパネルの制御バ
スはオープンにする構成をもつことを特徴とする信号終
端回路。In each unit of a system in which multiple units are connected in sequence to a signal line that requires termination, there is a terminating resistor connected to the signal line, and a terminating resistor connected between the terminating resistor and the ground within the unit and the base. a transistor that turns on and off the connection between the terminating resistor and the ground by applying a voltage to the ground; a pull-up resistor that is connected to the base of this transistor and can supply a voltage that turns on the transistor; and a pull-up resistor that is connected to the base of the transistor A signal termination circuit characterized in that the control bus has a configuration in which the control bus is connected to the ground in all units connected after the unit, and the control bus of the final panel is left open. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1156891A JPH0323706A (en) | 1989-06-21 | 1989-06-21 | Signal termination circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1156891A JPH0323706A (en) | 1989-06-21 | 1989-06-21 | Signal termination circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0323706A true JPH0323706A (en) | 1991-01-31 |
Family
ID=15637655
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1156891A Pending JPH0323706A (en) | 1989-06-21 | 1989-06-21 | Signal termination circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0323706A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05183420A (en) * | 1991-12-27 | 1993-07-23 | Nec Corp | Circuit component |
WO1994008305A1 (en) * | 1992-10-02 | 1994-04-14 | Compaq Computer Corporation | Automatic disabling of termination of a digital computer bus |
US5613074A (en) * | 1994-12-30 | 1997-03-18 | Compaq Computer Corporation | Automatic disabling of SCSI bus terminators |
US6567877B1 (en) * | 1993-08-16 | 2003-05-20 | Sun Microsystems, Inc. | Automatically enabling terminator for internal SCSI buses with external SCSI bus expansion |
-
1989
- 1989-06-21 JP JP1156891A patent/JPH0323706A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05183420A (en) * | 1991-12-27 | 1993-07-23 | Nec Corp | Circuit component |
WO1994008305A1 (en) * | 1992-10-02 | 1994-04-14 | Compaq Computer Corporation | Automatic disabling of termination of a digital computer bus |
US6567877B1 (en) * | 1993-08-16 | 2003-05-20 | Sun Microsystems, Inc. | Automatically enabling terminator for internal SCSI buses with external SCSI bus expansion |
US5613074A (en) * | 1994-12-30 | 1997-03-18 | Compaq Computer Corporation | Automatic disabling of SCSI bus terminators |
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