JPH03236654A - Data communication equipment - Google Patents

Abstract

PURPOSE:To relieve the software load by allowing a buffer memory management means to add a prescribed frame to an end of a transmission queue when a control means writes a head address of a transmission frame to a transmission register. CONSTITUTION:It is not required in the transmission to make a request of the transmission processing by the software, that is, to generate a frame chain in advance prior to address write in a transmission register R1. That is, to generate a frame chain, a value given to the transmission register R1 is written in a frame area succeeding to a head buffer of a frame pointed out by a tail pointer in a buffer memory when a transmission frame is put (PUTLOOP) to the transmission queue C, for example. Thus, the frame chain is generated sequentially and the software 11 has only to write the address of the transmission frame sequentially to the transmission register R1. Thus, the load of the software 11 at data transmission is light and the high speed data transmission is attained.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a data communication device that is implemented when performing data communication between computers in a communication network such as a LAN (Local Area Network). and data communication methods.

<Prior Art> For example, a computer capable of data communication is equipped with a processing device that performs various numerical calculations and the like, and a communication device for data communication.

The communication device is equipped with a buffer memory to adjust the speed of data flow between the processing device and the communication path and the difference in the timing of occurrence of an event, and data communication between computers is handled by each computer. This is accomplished by data communication between communication devices that have the computer, and data exchange between the processing device and the communication device within each computer. Data is exchanged between the processing device and the communication device by a processor included in the communication device based on a predetermined processing program.

As the buffer memory, a FIFO (first-in-first-out) memory, a list-structured memory, or the like is used, and below, a list-structured memory will be explained as an example. In a list-structured buffer memory, the storage area in the buffer memory is divided into predetermined unit areas, and each division is used as one buffer. Each buffer has a data section into which data is written, and a pointer section for pointing to a buffer where data subsequent to the data stored in the buffer is stored. It is possible to read data, etc.

Generally, one frame of data, which is a unit of data communication, is stored using a plurality of buffers, and the buffers constituting each frame are connected (chained) by the pointer section of the buffer, and for example, each frame The frames are connected to each other based on the frame connection information stored in the pointer section of the buffer at the beginning of the frame.

As a result, a queue (hereinafter referred to as a "transmission queue") is conceptually formed in the buffer memory, in which frames storing data to be transmitted are stored in order. The frames are sequentially added (PUT) to the end of the transmission waiting queue, and the frames at the head of the transmission waiting queue are sequentially taken out (GET) while data transmission is performed. The same goes for data reception; a queue (hereinafter referred to as a "reception queue") in which frames into which received data is to be written is formed in advance in the buffer memory by writing connection information to the pointer section. Reception is accomplished by sequentially taking out (GET) the frames at the head of this reception waiting queue and sequentially writing the received data into the data portion of the buffer constituting each frame. Addition (PUT) of a frame to this reception waiting queue is performed by adding a frame made up of a buffer in which data can be freely written to the end of the frame.

The formation of a transmission waiting queue and a reception waiting queue by writing connection information to the pointer part of a frame (the pointer part of the first buffer of the frame) is realized by software processing, and after the formation of each queue, data transmission or Reception is performed.

For example, if the transmission of the next play is to be instructed before data transmission has been completed for all frames in the transmission queue, the frame to be transmitted is added to the end of the transmission queue.

In addition, when transmitting the same data repeatedly, a frame chain (consisting of a plurality of frames connected by a pointer section) in which the same data is written.

) to avoid the wasteful process of creating multiple
A loop-shaped frame chain that returns to the starting frame when you follow the frame pointer (
(hereinafter referred to as a "loop frame") may be used. In this case, the loop frame is created by software, and then the data stored in the loop frame is transmitted cyclically.

Loop frames can also be applied when receiving data; a loop frame is created by connecting frames made up of buffers in which data can be freely rewritten in a loop shape, and received data is transferred to this loop frame. By sequentially writing data, a receiving buffer with an apparently infinite capacity can be constructed using a finite buffer.

<Problems to be Solved by the Invention> In the above-mentioned conventional technology, data is transmitted or received after a chain of frames is created by software, so it takes a relatively long time to create the chain. Therefore, there is a problem that the time required for the entire data communication becomes longer.

Moreover, in order to be able to add a new frame to the end of the transmission queue when transmitting data, the software must recognize the frame at the end of the transmission queue. It is necessary to store the address of the frame (for example, the start address of the start buffer of the frame).

Furthermore, when performing processing to confirm whether the transmission processing was reliably performed after transmission, for example, when the transmission processing of the data information of each buffer is completed, the predetermined data area provided in each buffer is , information indicating whether the transmission was reliably performed is written, but in order to confirm that the transmission process was reliably performed in this case, it is necessary to write the information at the beginning and end of the frame chain that requires confirmation. The frames need to be recognized, so the software needs to pre-memorize the addresses of these frames before transmitting them.

Furthermore, in order to perform the above-described confirmation process regarding the data after transmission, the software needs to know that the transmission has ended, and therefore the software needs to manage the progress of the transmission process. If this progress status is not managed, a problem arises in that, for example, it is not possible to determine at what point the memory of the first and last frames of the frame chain should be erased. That is,
In this case, it is necessary to store the first and last frames of the frame chain from beginning to end, but as a result, the number of frames that must be stored increases each time it is sent and received, making memory efficiency extremely poor and impractical. It turns out.

Furthermore, when transmitting and receiving using the loop frame described above, it is necessary to rewrite the chain information (rewrite the pointer part) of the loop frame in software when canceling the transmission and reception.

As described above, in the above-mentioned conventional technology, the burden on the software is extremely heavy, which prevents high-speed data communication.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a data communication device that solves the above-mentioned technical problems, reduces the burden on software, and enables high-speed data communication.

Means and Effects for Solving the Problems> A data communication device according to claim 1 for achieving the above object stores processing data in a processing device in one or more buffer memories having a list structure. A data communication device configured to send and receive data for each predetermined frame stored in a buffer, and to cause data transfer between the processing device and the buffer memory to be performed by a control means operating based on a predetermined processing program, comprising: It manages the memory, and within this buffer memory, there is a transmission waiting queue in which frames to be transmitted are connected in order by their pointer sections, a reception waiting queue in which frames to be stored received data are connected in order by their pointer sections, and after data reception. A buffer memory that forms a received queue in which frames are connected in order by their pointer sections, and has a head pointer that points to the first frame of each queue and a tail pointer that points to the last frame of each queue for each queue. management means; a transmission register into which an address indicating a transmission frame is written from the control means and for adding this transmission frame to the end of the transmission waiting queue; and a transmission register for adding the transmission frame to the end of the transmission waiting queue; A reception register is provided for holding an instruction value and for providing the received frame to the control means, and the buffer memory management means, when an address indicating a transmission frame is written in the transmission register at the time of data transmission, In response to this, the transmission frame is added to the end of the transmission waiting queue, and when data is received, the frame at the head of the reception waiting queue is taken out and the received data is written;
The frame after this data has been written is added to the end of the received queue, and in response to reading of the value held in the reception register by the control means, the first frame of the received queue is taken out and sent to the control means. Furthermore, when fetching the first frame of each queue, the buffer memory management means updates the indicated value of the head pointer to the address of the frame indicated by the pointer section of the frame indicated by the head pointer of each queue. When adding a frame to the end of each queue, the address of the frame to be added is written in the pointer section of the frame pointed to by the till pointer of each queue, and the value indicated by the tail pointer is updated at that address. This is what I did.

According to such a configuration, when transmitting data, when the control means writes the start address of the transmission frame to the transmission register, in response, the buffer memory management means writes the frame given to the end of the transmission waiting queue. I'll keep adding. As a result, when the control means writes the addresses of frames in the transmission register, the frames are sequentially chained, and as a result, there is no need to chain frames in advance by software processing. This reduces the burden on the software formed by the control means and the processing program. In addition, when receiving data, the buffer memory management means extracts the first frame of the reception waiting queue, writes the received data to this frame, and adds the frame after writing the data to the end of the received queue. Sometimes software queue management is unnecessary.

Note that the address of the first frame of the received queue is written in the reception register, and when the control means reads the value held in this reception register, the buffer memory management means gives the first frame to the control means, and the buffer memory management means gives the first frame to the control means. In this way, the control means can easily obtain the received data.

Further, each of the aforementioned queues is managed by a head pointer and a tail pointer provided for each queue in the buffer memory management means. That is, for example, when the control means writes the address of a transmission frame to the transmission register when the transmission waiting queue is empty, this address is written to the head pointer and tail pointer corresponding to the transmission waiting queue, and then the address of the next frame is written. When is written to the transmission register, this address is written to the pointer section of the instruction frame of the tail pointer, and the instruction value of the tail pointer is updated to the address, thereby adding a frame to the end of the queue. It will be done.

Further, for example, when the buffer memory management means retrieves the first frame of the transmission waiting queue, the buffer memory management means writes the indicated value of the head pointer to the address of the frame indicated by the pointer section of the frame indicated by the head pointer. The frame at the head of the queue is thus released from the queue. In this way, the buffer memory management means manages the first and last frames of each queue using the head pointer and tail pointer, and by rewriting the pointer part of each frame, the buffer memory management means can add frames to each queue, and add frames to each queue. It realizes operations such as extracting frames from.

Further, in the data communication device according to claim 2, frames are connected in a loop by the control means, and data is transmitted using this loop-like frame, and when transmitting data, the control means connects the frames in a loop. Writing the address of one of the frames to be formed into the transmission register, the buffer memory management means sets the same instruction value to the head pointer and tail pointer of the transmission waiting queue, and simultaneously updates the instruction values of both pointers. , a command register is provided for a stop command to stop transmission using the looped frame, and when a stop command from the control means is given to the command register, the buffer memory management means stores the tail of the transmission waiting queue. The loop is released by stopping the update of the pointer and updating only the head pointer.

Further, in the data communication device according to claim 3, the control means connects frames in a loop, and receives data using the loop-shaped frame, and when receiving data, the control means forms a loop. writes the address of one of the frames to be sent to the reception register, the buffer memory management means sets the same instruction value to the head pointer and tail pointer of the reception waiting queue, and simultaneously updates the instruction values of both pointers; A command register is provided for an abort instruction to abort reception by the loop frame, and when a abort instruction is given to the command register from the control means, the buffer memory management means reads the reception queue. The loop is released by stopping updating of the til pointer and updating only the head pointer.

According to the configuration described in claim 2 or 3, it is possible to repeatedly transmit the same data using frames connected in a loop, and to form an apparently infinite receiving buffer. . To release the loop, the control means gives a stop command to the command register, and in response, the buffer memory management means stops updating the indicated value of the til pointer of the transmission waiting queue or the reception waiting queue, and changes the head pointer. This is done by updating only the indicated value and sequentially releasing the frames indicated by the head pointer. This allows the loop to be released without the need for software to rewrite the frame pointer section. It turns out.

The data communication device according to claim 4 is characterized in that the buffer in the buffer memory includes a first buffer management flag that is set by the control means and indicates whether or not processing by the control means is required after data transmission, and a buffer memory management means or and a second buffer management flag that is set by the control means and indicates whether the buffer is used for reception or for use by the control means when processing by either ends, and the buffer memory management means In the buffer memory, a transmitted queue which connects the frames that need to be processed by the control means among the frames after transmission, and a release queue which connects in order the frames that have been processed by the buffer memory management means or the control means. A free queue is formed by connecting a queue and a frame used by the control means, and the frame after transmission processing is added to the end of the transmitted queue or the queue waiting to be released according to the first buffer management flag. , frames from the release waiting queue are broken down into buffers and added to the end of the reception waiting queue or free queue according to the second buffer management flag. In this case, each queue may be managed in the same manner as described above by providing the buffer memory management means with a head pointer and a tail pointer that indicate the first and last frames of each queue, respectively. Further, by providing registers corresponding to each of the above-mentioned queues, frame transfer between the control means and the buffer memory management means can be achieved in the same manner as described above.

According to this configuration, when it is necessary to transfer the transmitted frame to the software side again and process the data of the frame, the transmitted frame is stored in the buffer memory under the management of the buffer memory management means. By forming a transmitted queue in which frames are connected, the transmitted frame can be given to software without management of buffer memory by software.

Furthermore, with this configuration, all buffers in the buffer memory are managed by the buffer memory management means, which is more advantageous in reducing the burden on software.

Note that the address of the first frame of the received queue is held in the reception register, and the address of the first frame of the sent queue is held in the register corresponding to the sent queue (hereinafter referred to as "sent register"). If the buffer memory management means generates an interrupt to the control means when the data is sent, the control means does not need to monitor the receiving register or the transmitted register.

<Example> Embodiments will be described in detail below with reference to the accompanying drawings showing examples.

FIG. 2 is a block diagram showing the basic configuration of a computer having a data communication device 1 according to an embodiment of the present invention.

This computer roughly consists of a processing device 2 that performs data processing such as various calculations, and another computer (not shown in the figure) that transmits the data processed by this processing device 2 or is connected to it via an optical fiber or the like. The communication device 1 is configured to include a communication device 1 for receiving data from a computer, etc., and data sent from the processing device 2 and data received from other computers are stored in a list-structured buffer memory 3 of the communication device 1. temporarily stored in .

The processing device 2 includes a central processing device 4 and a central processing device 4.
and a memory 5 used as a work area, etc., and these are connected to a pass line 6. Communication device 1
, a control unit 7 for controlling the exchange of data between the processing device 2 and the buffer memory 3, a memory 8 storing a processing program that defines the operation of the control unit 7, and managing the buffer memory 3. The buffer memory 3 , the control unit 7 and the buffer memory management unit 9 are connected to the path line 6 .

FIG. 1 is an explanatory diagram functionally showing the configuration of the communication device 1. As shown in FIG. The storage area of the buffer memory 3 is divided into predetermined areas, and each division is used as a buffer. The plurality of buffers included in the buffer memory 3 are managed by a buffer memory management section 9. Classified into various types of queues. Since transmission/reception is performed in units of one frame of data stored in one or more buffers, each queue is formed by chaining frames.

Instructions are exchanged between the buffer memory 3 and the software 11 formed by the control unit 7 and the processing program in the memory 8 through inputs provided in the buffer memory management unit 9 and composed of a plurality of registers R1 to R4 and R6. Output port 1
2.

Inside the buffer memory 3, there is a transmission waiting queue 01 formed by chaining frames storing data to be transmitted after being processed by the software 11, and a queue 01 for transmitting frames stored under the control of the buffer memory management unit 9. Among these, there is a sent queue C2 in which frames that require post-processing by the software 11, such as processing to confirm whether the transmission has been reliably performed, are chained together, and a queue C2 that stores frames that require post-processing by the software 11 among frames that have been transmitted. After the release waiting queue C3 is formed by chaining unused frames, etc., and the frames forming this release waiting queue C3 are decomposed into buffers and made into a frame composed of one buffer, the data is rewritten by the software 11. A free queue C4 formed by chaining free frames; a reception waiting queue C5 formed by chaining frames used for data reception among the disassembled frames from the release waiting queue C3; A received queue C6 is formed by chaining frames taken out from the waiting queue 05 and into which received data is written by the buffer memory management unit 9. As shown in FIG. 2, the buffer memory management unit 9 includes head pointers H1 to H6 that store the starting addresses of the starting buffers of the starting frames of each queue C1 to C6, and head pointers H1 to H6 that store the starting addresses of the starting buffers of the ending frames of each queue. Tail pointers T1 to T6 storing addresses are provided.

FIG. 3 is an explanatory diagram showing the data structure of the buffer 30 constituting the buffer memory 3. As shown in FIG. The buffer 30 is composed of a disc libter section 31 for storing attributes and connection information of the buffer, and a data section 32 for storing data.

The disc libter section 31 is provided with a next buffer area 33 and a next frame area 34 which are pointer sections, and the next buffer area 33 stores the starting address NB of the buffer storing data subsequent to the data stored in the buffer 30. is stored, and the start address NF of the start buffer of the frame next to the frame including the buffer 31 is stored in the next frame area 34. Each address is represented by, for example, 32 bits of information. Disk rib portion 31
In addition to this, when the buffer forms the release waiting queue C3, it is determined whether to give this buffer to the free queue C4 or the receiving queue C5, and when the relevant buffer forms the sending queue 01, , a buffer management area 35 (for example, 8 bits) that stores a buffer management flag MF for determining whether to give the buffer to the sent queue C2 or the release waiting queue C3 after transmission, and the data section 32 of the buffer 30. a transmission flag storage area 36 that stores a transmission flag TF indicating whether transmission of data has been completed; and a reception flag R indicating whether writing of received data to the data section 32 has been completed.
It also has a reception flag storage area 37 in which F is stored.

FIG. 4 is a diagram showing an example of the storage format of the buffer management area 35. For example, 8 bits are allocated to this area 35, and a buffer management flag MF is stored in the lower two bits dl and d2.

For example, when the second bit d2 is "0", the buffer chained to the release waiting queue C3 is added to the end of the free queue C4, and the second bit d2 is "1".
”, it is added to the end of the reception waiting queue 05. On the other hand, when the least significant bit d1 is "0", the buffer is added to the end of the transmitted queue after the data in the data section 32 of the buffer has been transmitted, and when it is "1", the buffer is added to the end of the transmitted queue after transmission. It is chained to the end of release waiting queue 03. In this way, bits di, d2
function as a first buffer management flag and a second buffer management flag, respectively.

FIG. 5 is a diagram conceptually showing, for example, the configuration of the transmission waiting queue C1. For example, each frame F1 to Fn has a plurality of buffers Btt""Bit'B-B, B-
It is composed of 21 2j n
lnk The plurality of buffers constituting each frame F1 to Fn are stored in the next buffer area 33 of each buffer at the start address NB, NB, . , N.B.
, NB,..., NB11 12 21
22NB... are mutually linked so that nl'nk' is stored. That is, for example, in frame F1, the start address N B ii of the next buffer B is stored in the next buffer area 33 of the buffer B11. buffer Bli'B at the end of each frame
, . . . For example, data r0OOOOOOJ is stored in the next buffer area 33 of Bnk, indicating that there is no buffer following that buffer in the frame.

And buffer B at the beginning of each frame F1 to Fn,
11 in each next frame area 34 of B,...'nl
21 is the start address NF, NF,
...is remembered. 2 Buffer B at the beginning of the last frame Fn of the queue C1
For example, data r0O is stored in the next frame area 34 of nl.
OOOOOOJ is stored, indicating that there is no frame following this frame Fn. Further, in each frame F1 to Fn, no data is stored in the next frame area 34 of the buffer other than the first buffer (symbol r XXXXXXXXX in FIG. 5).
J Show. ).

Queues C1-C6 are formed sequentially by chaining new frames to the last frame of each queue. When the buffer memory management unit 9 receives a transmission request from the software 11, PUT of a frame to the queues C1 to C6 (adding a frame to the end of the queue) is performed from the software 11 to the buffer memory management unit 9. This is done in the buffer memory management unit 9 when a frame is released to ', or when a frame in a queue is transferred to another queue.

For example, when a frame storing data to be transmitted from the software 11 is stored in the transmission waiting queue C1 is to be put, the PUT is sent to the next frame area 34 of the head buffer of the frame indicated by the tail pointer T1 corresponding to the transmission waiting queue C1. The start address of the start buffer of the frame to be displayed is written, and the tail pointer T is accordingly written.
The instruction value of 1 is updated to the value of the start address.

GET of frames from queues C1 to C6 (retrieving the first frame of the queue) is used when transmitting, receiving, and processing the frame in the software 11, and when transferring frames from the queue to other queues. This is performed by the buffer memory management unit 9 when changing connections.

For example, when getting a frame from the transmission queue C1, the frame indicated by the head pointer H1 corresponding to the transmission queue C1 is retrieved, and the indicated value of the head pointer H1 is set to the head pointer H1.
Next frame area 3 of the first buffer of the frame indicated by
The address value is updated to the address value stored in 4. 0 other queues
The operation when frames are GET from 2 to C6 is similar, and by such an operation, the frame at the head of each queue can be released from each queue.

The starting address of the starting buffer of the frame exchanged between the software 11 and the buffer memory managing section 9 is written in a register constituting the input/output boat 12 provided in the buffer memory managing section 9 . That is, the transmission register R1 corresponding to the transmission waiting queue C1 puts the transmission frame from the software 11 into the transmission waiting queue C1.
When the software 11 (control unit 7) writes the start address of the start buffer of the transmission frame to this transmission register R1, the buffer memory management unit 9 responds to this by writing the start address of the start buffer of the transmission frame into the transmission register R1. PUT to queue 01 in this way.

Also, the sent register R2 corresponding to the sent queue C2
, the buffer memory management unit 9 stores the queue C2.
The value of head pointer H2 corresponding to is written. Then, when the contents of this register R2 are read by the software 11, in response, the buffer memory management section 9 performs the above-mentioned GET operation to
This causes the first frame of the software 11 to be released, and the software 11 receives this first frame.

GET of frames from free queue C4 and received queue 06 to software 11 is also accomplished in a similar manner.

In addition to the frames that have been sent from the transmission queue C3, frames that have been processed by the software 11 are also put to the release queue C3. The register R3 provided corresponding to the queue C3 is
This is done by writing the start address of the start buffer of the frame to be processed.

When data is transmitted by a data communication device having the above-mentioned configuration, first, the software 11 creates frame-by-frame transmission data, and the start address of the first buffer constituting the frame is stored in the transmission register R1. will be written to. In response, the buffer memory management section 9 updates the indicated value of the tail pointer T1 to the address value given to the transmission register R1. At this time, if there is no frame in the transmission waiting queue C1, the indicated value of the head pointer H1 is also set to the given address value. When there is a frame in the transmission waiting queue C1, the indicated value of the head pointer H1 is not changed. Also,
If there is a frame in the transmission waiting queue C1, the next frame area 34 of the frame indicated by the tail pointer T1
The value is rewritten by the buffer memory management unit 9 to the value given to the transmission register R1.

In this way, the frame is put into the transmission waiting queue c1.
Meanwhile, the buffer memory management unit 9 gets the frame from the queue C1 and transmits the data of the frame. And once the frame transmission is complete,
The transmission flag TF of the buffer constituting the frame is rewritten to a value indicating completion of transmission. The transmitted frame is stored in the transmitted queue 02 or release waiting queue C3 under the control of the buffer memory management unit 9 based on the buffer management flag MF (see FIG. 3) of the disc libter unit 31 in the first buffer of the frame. PUT to either one of them. The buffer management flag MF is set by the software 11 prior to sending a transmission request to the buffer memory management unit 9.
It is rewritten in , and it is written whether or not to perform the process of confirming whether or not the transmission was reliably performed.

Frames that require transmission confirmation processing are put into the sent queue C2;
When the start address of the start buffer of the frame is written to the corresponding head pointer H2 and sent register R2, the buffer memory management unit 9 continuously sends interrupts to the software 11 (in other words, in the form of a level instead of a pulse). ) occurs. In response, the software 11 reads the contents of the transmitted register R2, and the buffer memory management unit 9 updates the instruction value of the head pointer H2 and transfers the first frame of the queue C2 to the software 11.
I will release it to 1. Note that when there is no frame in the transmitted queue C2, the buffer memory management unit 9 sets, for example, a specific value "0" (the specific value is "0") in this transmitted register R2.
It may be a value other than 0. ). Thereby, the software 11 can know whether there is a frame in the transmitted queue C2 by arbitrarily reading the value held in the transmitted register R2 and checking whether the value is "0". This also applies to registers R4 and R6.

The frame put into the release waiting queue C3 is disassembled into buffers by the buffer memory management unit 9 so that one buffer constitutes one frame, and then the frame is put into the free queue C4 or the reception waiting queue based on the buffer management flag MF. PUT to c5. The decomposition of the frame is performed by initializing the storage value of the next buffer area 33 of each buffer constituting the frame received from the release waiting queue C3 to, for example, r0OOOOOOJ.

In addition to this frame decomposition, the buffer memory management unit 9 initializes the data section 32 of each buffer that constitutes the frame GET from the release waiting queue c3.

In the above-described transmission operation, the software 11 does not need to create a frame chain in advance before requesting transmission processing (writing an address to the transmission register R1). That is, to form a frame chain, for example, when a transmission frame is put into the transmission waiting queue C1, the value given to the transmission register R1 is written to the next frame area 34 of the first buffer of the frame indicated by the till pointer T1. Therefore, the software 11 only needs to sequentially write the addresses of the transmission frames to the transmission register R1. Therefore, the burden on the software 11 during data transmission is light, and this can contribute to speeding up data transmission.

Furthermore, when a new frame is requested to be transmitted while the previously requested frame chain exists in the transmission waiting queue 01, if the software 11 writes the address of this new frame to the transmission register R1, Since this frame is inevitably added to the end of the previous frame chain, there is no need to store the last frame of the frame chain that was previously requested to be transmitted using software, as is the case in the past.

Furthermore, frames that require processing in the software 11 (for example, transmission confirmation processing) after transmission are sent to the transmitted queue C.
2, the software 11 does not need to store the frame that requires the above processing. Moreover, when a frame exists in the transmitted queue c2, the buffer memory management unit 9 generates an interrupt to the software 11, so the software 11 must respond to the interrupt to GET the frame in the transmission waiting queue C2. Therefore, there is no need to manage the progress of the transmission process.

Furthermore, when there is no frame in the transmitted queue C2, the specific value "0" is held in the transmitted register R2, so the software 11 can easily detect that the frame no longer exists in the transmitted queue 02. You can know. Further, since the buffer constituting the frame put into the release waiting key C3 is disassembled by the buffer memory management section 9, and the data section is also initialized by the buffer memory management section 9, the software 11
There is no need to initialize the data section of the buffer.

In this way, the burden on the software 11 during data transmission is significantly reduced, and as a result, the processing speed for data transmission is significantly reduced, and high-speed data communication becomes possible.

Next, the operation of receiving data from other computers will be explained. When the buffer memory management unit 9 receives data while there is a frame in the reception waiting queue C5, the buffer memory management unit 9 updates the instruction value of the head pointer H5 corresponding to the reception waiting queue C5, thereby updating the data in the queue 05. Get the first frame. This G
ETL.

The received data is written into the received frame. however,
In the reception waiting queue 05, since one frame consists of one buffer, the buffer memory management unit 9
In this case, a necessary number of frames (buffers) are sent from the queue C5 to GETL according to the amount of received data, and frames are reorganized to the extent that the received data can be stored. As data is received, the reception flag RF in which the received data is written is rewritten to a value indicating completion of reception.

The received frame is processed by the buffer memory management unit 9.
Received queue 0 by updating tail pointer T6, etc.
PUT to 6. At this time, if no frame exists in key xc6, the indicated value of the corresponding head pointer H6 is updated to the start address value of the start buffer of the frame. The value indicated by the head pointer H6 is held in the reception register R6 as described above, but when there is no frame in the queue C6, the value of the reception register R6 is set to a specific value "0". ”, and the software 11 arbitrarily sets the reception register R6.
The state of the received queue C6 can be known by reading the held value of C6 and checking whether the value is "0" or not.

When a frame is put into the received queue C6, the buffer memory management unit 9 continuously generates interrupts to the software 11. In response to this, the software 11 reads the value held in the reception register R6, and thereby the software 11 receives the frame. The frame data obtained in this way is
After processing in the software 11, it is put into the release waiting queue C3, for example. The processing of the frame PUT to the release waiting key C3 is the same as that at the time of transmission.

In this way, when receiving data, the buffer memory management section exclusively manages the reception waiting queue C5.
The software 11 only has to know that data has been received by an interrupt from the buffer memory management means 9 and GET the frame in which the received data has been written from the received queue C6. In other words, processing such as determining whether data has been received is performed by the buffer memory management unit, and the software 11 does not need to manage the progress of the processing, so the burden on the software 11 is significantly reduced. As a result, the time required to receive data is significantly shortened, contributing to faster data communication. When there is no more received data, the specific value "0" is held in the reception register R6, so the software 11 can know that there is no more received data when reading this specific value rOJ.

Note that when there is no frame, the specific value "0" is held in the corresponding register in the same way as for the free queue C4, but this allows the software 11 to store the specified value "0" at any timing (for example, when the software 11
By reading the register R4 at a timing that does not interfere with the processing of the free queue C4, it is possible to easily know whether a frame exists in the free queue C4. That is, in order for the software 11 to know whether or not a frame exists in the free queue C4, it is conceivable to generate an interrupt at the time when a frame is put, for example, but in this way, the processing of the software 11 may be interrupted. Whereas once stopping the processing, speeding up the processing is hindered, the present embodiment allows the processing of the software 11 to continue smoothly.

FIG. 6 is an explanatory diagram functionally showing the configuration of another embodiment of the present invention. In addition to the functions of the first embodiment described above, this embodiment realizes data transmission and reception using a loop frame in which frames are chained in a loop.

Therefore, parts corresponding to those shown in the above-mentioned FIG. 2 will be given the same reference numerals, and the above-mentioned FIG. Explain.

When transmitting the same data repeatedly, it is preferable to use a so-called loop frame in which frames are cyclically chained in order to improve memory efficiency and speed up data transmission. The loop frame is created in the software 11 in this embodiment.

And the created loop frame is the instruction rPUTLO
The data is put into the reception waiting queue C5 or the transmission waiting queue 01 by OP J.

For example, put a loop frame into the transmission waiting queue C1.
In this case, the start address of the start buffer of any one of the frames constituting the loop frame is given to the transmission register RLI provided in the input/output port 12 corresponding to the reception waiting queue C1. As a result, the buffer memory management unit 9 commonly sets the held address value of the transmission register RLI in the head pointer H1 and tail pointer T1 corresponding to the queue 01. With the transmission of each frame, the buffer memory management unit 9 updates the indicated values of the head pointer H1 and tail pointer T1 to a common value (ie, the start address of the start buffer of the next frame). Buffer memory management section 9
If the chain of frames is followed in order and the frame returns to the first frame, the transmitted frame is not removed from the transmission waiting queue C1. Therefore, when transmitting using a loop frame, the frames that make up the loop frame are It exists in queue 01 from beginning to end.

Therefore, the head pointer H1 and tail pointer T1 repeatedly transmit the same data by updating their indicated values according to the address values commonly stored in the next frame area 34 (see FIG. 3) of the first buffer of each frame. can do.

The same is true when receiving loop frames, in which a frame chain (loop frame) created in advance by the software 11 sets the start address of the start buffer of any one frame in correspondence with the reception waiting key-C5. By writing to the reception register RL5 provided in the input/output boat 12, the data is put into the queue C5.

The value held in the register RL5 is set in common to the head pointer H5 and tail pointer T5 corresponding to this queue C5, and furthermore, as data is received, the indicated values of the head pointer H5 and tail pointer T5 become the same indicated value. Commonly updated so that At this time, if the buffer memory management unit 9 traces the chain of frames and returns to the first frame, it does not release the received frame from the queue C5, and therefore all frames constituting the loop frame are It exists in queue C5 from beginning to end.

In this way, data reception progresses as data is sequentially written in a plurality of frames that are cyclically chained, and as a result, there appears to be an infinite number of upper reception buffers. However, in this embodiment, the loop frame used for data reception is one in which one frame consists of one buffer (that is, data r0OOOOOOJ is written in the next buffer area 33 of each buffer, and data is written in the next frame area 34). Multiple buffers are chained in a loop by writing the address of .
Instead of a chain in the next frame area 34, a chain in the next buffer area 33 may be used. ).

This is because if a frame is composed of multiple buffers, if the amount of received data is small, there is a risk that some buffers will not be used in each frame, resulting in poor memory efficiency.
This is because if unused buffers are collected in an attempt to solve this problem, the processing becomes extremely complicated. Instead, in this embodiment, the capacity of the data section of each buffer is made sufficiently large so that almost all data can be received. However, reception of data exceeding the data capacity of one buffer must be abandoned.

Nevertheless, when considering memory efficiency and processing simplification, it is desirable to configure one frame with one buffer, and if the capacity of the data section is large enough, it can accommodate almost all received data. be able to.

The input/output port 12 is provided with a command register RQ for a queue clear command QCLR for forcibly releasing frames forming the transmission queue C1 or the reception queue C5.

Specifically, the queue clear command QCLR is realized by writing the queue number corresponding to the transmission waiting queue C1 or the receiving waiting queue C5 to the command register RQ. are sequentially released and put into the transmission queue C2 or the reception queue C5.

For example, if transmission/reception is delayed due to circumstances in the communication network and frames put into the transmission waiting queue C1 or frames put into the received queue are not released, the buffer in the buffer memory 3 is limited. Therefore, the buffer that can be used by the software 11 decreases. Therefore, in such a case, it is best to temporarily stop transmission/reception, release the frames forming the queues CI and C5, and give these frames to the software 11 to proceed with the processing in the software 11 in order to improve processing efficiency. It is effective for improving the performance.

Also, when transmitting/receiving using loop frames as described above, you can stop such transmission/receiving, or when transmitting new data repeatedly using other loop frames when transmitting data. , Queue CI,
It will be necessary to release the frame from C5.

FIG. 7(a) is an explanatory diagram conceptually showing the configuration of the queue C1. In a normal state (hereinafter referred to as "r r normal J state") in which frames F1 to F3 (a normal chain that is not a loop frame) exist in queue 01, the head pointer H1 points to the first frame F1, and the tail pointer T1 indicates the last frame F3. From this state, queue clear command QC
When the queue number of the queue C1 is given from the software 11 to the command register RQ by LR, the bath manager 9 does not accept any other commands, fixes the indicated value of the tail pointer T1, and sets the head pointer H1. Only the indicated values of are updated sequentially. As a result, frames F1~
F3 is released from queue C1 in turn. Further, the buffer memory management unit 9 puts the frames released from the queue C1 into the transmitted queue C2. Since no data is transmitted at this time, the transmission flag TF is not rewritten. The operating state of the buffer memory management unit 9 in response to the above queue clear command QCLR is set to "clear A".
Define as state.

FIG. 7(b) is an explanatory diagram conceptually showing the configuration of the transmission waiting queue 01 when data is transmitted using loop frames. Frame F3 is chained to frame F1, and frames F1 to F3 are connected in a loop. When transmitting using this loop frame,
As described above, the head pointer H1 and the tail pointer T1 simultaneously point to the same frame, and each pointer value is updated to the same value at the same time. This state is defined as r 1oopJ state.

From this rloopJ state, the queue clear command QCL
When the queue number of queue 01 is written into the command register RQ by R, the buffer memory management section 9 enters the above-mentioned "clear A" state. The state of the queue C1 at this time is shown in FIG. 7(C), and the tail pointer T1
Since the indicated value of the queue C1 is fixed and only the indicated value of the head pointer H1 is updated sequentially, the frame chain cannot be returned to the beginning even if the frame chain is traced, so frames are sequentially released from the queue C1. Te cue C
In this way, the loop frame is released and data transmission using this loop frame is completed. When a new loop frame is further put into the queue C1 from the rloopJ state, the loop frames forming the queue C1 are released in the same way.

However, in the case of the queue clear command QCLR, the result is ``no buffer'' where there is no frame in the queue CI.
In contrast, in the case of the instruction rPUTLOOP J, a new loop frame will be put into the queue C1. In this sense, in distinction from the above-mentioned "clear A" state, from the r 1oopJ state the instruction rPUTLOO
The state of the buffer memory management unit 9 when PJ is given is defined as a "clear B" state.

FIG. 8 is a state transition diagram showing all the above state transitions. For example, in the transmission waiting queue C1,
If at least one frame exists, the buffer memory management unit 9 stores rnorg+ for this queue C1.
The state is set to alJ, and if there is no frame, the state is set to "no buffer". Then, the loop frame is transferred from the “no buffer” state to queue C1 as P UT (P
UTLOOP), the state becomes r1oopJ.

Furthermore, if a frame is put into the transmission waiting queue C1 from the "no buffer" state, the state shifts to the r normalJ state, and if the buffer runs out due to the progress of transmission from the r normalJ state (indicated by "*" in FIG. 8).
Transition to "no buffer" state.

In the r normalJ state, when a queue clear command QCLR for clearing the transmission waiting queue C1 is given from the software 11 to the command register RQ, the buffer memory management unit 9 enters the "clear A" state. Then, the indicated value of the head pointer H1 is sequentially updated and frames are released, and when a state where no frame exists in the queue C1 is reached, a transition is made to the "no buffer" state. The same is true when the queue clear command QCLR is given from the rloopJ state, and "clear A" is issued.
state and then transitions to the "no buffer" state.

When the instruction rPUTLOOP J is given from the rnor garden all state or the r1oopJ state, the "clear B" state is entered, and as a result, when there is no frame in the queue 01, the address given to the transmission register RLI The loop frame represented is queue 0
1 and moves to r 1oopJ state.

Also, when a frame is processed from the r I oopJ state to the queue C1, it moves to the "clear B" state, and when there are no more frames in the queue C1, the frame represented by the address given to the transmission register R1 is processed. rn added to queue C1.

Transition to r+5alJ state ("**" in Figure 8)
Indicated by ).

The operations related to data reception are also similar, including the state of the receive queue C5, the queue clear command QCLR, and the P U of the loop frame to the receive queue C5.
T (PUTLOOP) etc., a "no buffer" state, r n
normalJ state, r IoopJ state, “Clear A”
There are two states: "Clear B" and "Clear B", and the buffer memory management unit 9 manages the buffer memory 3 according to each state. Note that when a frame is released from the reception waiting queue C6 by a queue clear command QCLR or the like without data reception, the reception flag RF of each buffer is not rewritten, so the software 11 does not change this flag. The RF can be referenced to determine whether the buffer holds received data.

As described above, according to this embodiment, data transmission and reception using so-called loop frames is realized, and in this case, communication using loop frames can be stopped by the software 11 in the transmission waiting queue C1 or the receiving waiting queue C5. Either give a queue clear command QCLR to release the frame of P U T (P
UTLOOP ) L. In response to this, the buffer memory management section 9 controls updating of the head pointer H1°R5 and the tail pointer TI, T5 provided corresponding to each queue CI, C5. In this way, so to speak, the loop frame is released by the buffer memory management unit 9, so the burden on the software 11 is reduced, which contributes to speeding up data transmission and reception processing using the loop frame. can.

Note that the present invention is not limited to the above-described second embodiment. For example, in the above-mentioned second embodiment, for each queue clear command QCLR for the transmission waiting queue C1 and the receiving waiting queue 05, Command register R
Although Q is shared, separate command registers may be provided corresponding to each of the queues C1 and C5. others,
Various changes can be made without departing from the gist of the invention.

<Effects of the Invention> As described above, according to the data communication device of the present invention, buffer management is performed intensively in the buffer memory management means, and the burden on software related to buffer management is significantly reduced. This can contribute to speeding up data transmission and reception processing.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram functionally showing the configuration of a data communication device according to an embodiment of the present invention, FIG. 2 is a block diagram showing the basic configuration of a computer to which the data communication device is applied, and FIG. FIG. 4 is an explanatory diagram showing the data structure of the buffer in the buffer memory. FIG. 4 is an explanatory diagram showing the storage format of the buffer management area. FIG. 5 is an explanatory diagram showing the buffer and frame chain. FIG. 7 is an explanatory diagram functionally showing the configuration of a data communication device according to another embodiment of the invention; FIG. 2 is a state transition diagram showing the transition of the operating state of the buffer memory management unit. FIG. RQ...command register

Claims (1)

[Claims] 1. Transmitting and receiving processing data in a processing device using a list-structured buffer memory for each predetermined frame stored in one or more buffers, and transmitting and receiving processing data between the processing device and the buffer memory. In the data communication device, data transmission and reception are performed by a control means operating based on a predetermined processing program, the buffer memory being managed, and frames to be transmitted being sequentially designated by the pointer section within the buffer memory. A reception waiting queue is formed by connecting the connected transmission waiting queue, frames in which received data is to be stored, in order by their pointer parts, and a received queue is formed by connecting frames after data reception in order by their pointer parts. buffer memory management means having, for each queue, a head pointer that points to the first frame and a tail pointer that points to the last frame of each queue; A transmission register for adding to the end of the transmission waiting queue, and a reception register for holding an instruction value of the head pointer corresponding to the received queue and for providing the received frame to the control means. When an address indicating a transmission frame is written in the transmission register when transmitting data, the buffer memory management means adds the transmission frame to the end of the transmission waiting queue in response to this, and when receiving data,
Takes out a frame at the head of the reception waiting queue, writes received data therein, adds the frame after writing this data to the end of the received queue, and responds to reading of the value held in the reception register by the control means. The buffer memory management means extracts the head frame of the received queue and provides it to the control means, and further, when extracting the head frame of each queue, the buffer memory management means controls the pointer section of the frame indicated by the head pointer of each queue. When adding a frame to the end of each queue, the address of the frame to be added is updated to the address of the frame indicated by the tail pointer of each queue. What is claimed is: 1. A data communication device that writes a tail pointer to the address and updates a value indicated by a tail pointer at the address. 2. The control means connects the frames in a loop, and transmits data using the looped frame. When transmitting data, the control means transmits the address of one of the frames forming the loop. Writing to the trust register, the buffer memory management means sets the same instruction value to the head pointer and tail pointer of the transmission waiting queue, simultaneously updates the instruction values of both pointers, and stops the transmission using the looped frame. A command register is provided for an abort instruction, and when the abort instruction from the control means is given to the command register, the buffer memory management means stops updating the tail pointer of the transmission waiting queue and updates the head of the queue. 2. The data communication device according to claim 1, wherein the loop is released by updating only a pointer. 3. The control means connects frames in a loop, and receives data using the looped frames, and when receiving data, the control means receives an address of one of the frames forming the loop. the buffer memory management means sets the same instruction value to the head pointer and tail pointer of the reception waiting queue, simultaneously updates the instruction values of both pointers, and cancels reception by the loop frame. A command register is provided for an abort instruction, and when the abort instruction is given to the command register from the control means, the buffer memory management means stops updating the tail pointer of the receive queue and updates the head of the queue. 2. The data communication device according to claim 1, wherein the loop is released by updating only a pointer. 4. A first buffer management flag set in the buffer in the buffer memory by the control means and indicating whether processing by the control means is required after data transmission; and a first buffer management flag set by the buffer memory management means or the control means and determined by either the control means A second item indicating whether the buffer is used for reception or for use by the control means when processing is completed.
A buffer management flag is stored in the buffer memory, and the buffer memory management means stores, in the buffer memory, a transmitted queue that connects frames that need to be processed by the control means among the frames after transmission, and a buffer memory management means or control flag. A release waiting queue is formed in which frames that have been processed by the control means are sequentially connected together, and a free queue is formed by connecting frames that are used by the control means, and the frames after the transmission processing are managed by the first buffer. The frame is added to the end of the transmitted queue or the release waiting queue according to a flag, and the frames from the release waiting queue are broken down into buffers and added to the end of the reception waiting queue or free queue according to the second buffer management flag. 4. The data communication device according to claim 1, 2 or 3.