JPH03234124A - Error correction device - Google Patents

Abstract

PURPOSE:To realize an effective error correction processing by improving the error correction capability of a low frequency component in comparison with the error correction capability to the high frequency component of a block. CONSTITUTION:This device is provided with an arrangement conversion means 15 arranging a low frequency component at every block of a data subjected to entropy coding processing to a prescribed code length and converting the data into a periodic data, a 1st parity addition means 16 adding a 1st parity code for error correction to an output data and a 2nd parity addition means 20 adding a 2nd parity code for error correction to a data subjected to the entropy coding processing. Error correction processing is applied to a low frequency component based on the 1st and 2nd parity codes and error correction processing is applied to other frequency components based on the 2nd parity code. Thus, the error correction capability of the low frequency component of the block is improved and effective error correction processing is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to an improvement of an error correction device that corrects errors in data obtained by compressing digital data using an orthogonal transform method.

(Prior art) As is well known, when analog data is converted to digital data using PCM (pulse code modulation) technology and recorded on a recording medium such as tape, in order to improve the recording density. Data compression is performed. Various methods have been considered to perform this data compression, and one of the most typical methods that has been put into practical use is the orthogonal transform method. This orthogonal transformation method transforms digital data into one-dimensional or two-dimensional data.

After dividing the data into multiple blocks such as three-dimensional, orthogonal transformation is performed on each block to convert the data to the frequency axis, and the data is sent out sequentially starting from the low-frequency component to be recorded on a recording medium. This has the advantage that data redundancy can be considerably reduced and high-density recording can be effectively promoted.

By the way, recently, in order to further remove redundancy in data, short codes are assigned to numbers that appear with high probability in data after orthogonal transformation, and long codes are assigned to numbers that appear with low probability. It is customary to perform entropy encoding processing. FIG. 4 shows the data structure after performing this entropy encoding process. That is, each block Bl, B2°B3, ---, Bn has its low frequency components BIL, B
2L.

B3L, -, BnL and high frequency components BIH, B2H, B3H
,...BnH, each block Bl
.

B2. B3. ..., Bn differ depending on the entropy encoding process. Then, a horizontal parity code HP and a vertical parity code VP for error correction processing are added to the thus compressed data, and the data is recorded on a recording medium.

However, in the conventional error correction device that performs error correction on data compressed using the orthogonal transform method as described above, blocks Bl, B2, B3,
-, Bn, low-frequency components BIL, B2L, and B3L are relatively important data components.

...Bn,L and the less important high-frequency components BIH, B2H, B3H, -=, BnH are the same horizontal parity code HP and vertical parity code V
Since error correction processing is performed based on P, a problem arises in that effective error correction is not performed.

(Problems to be Solved by the Invention) As described above, in the conventional error correction device that performs error correction on data compressed using an orthogonal transform method, relatively important low-frequency components in a block are Since error correction processing is performed on the same parity code and the less important high-frequency components, there is a problem in that effective error correction is not performed.

Therefore, this invention was made in consideration of the above circumstances, and achieves effective error correction processing by improving the error correction ability of the low frequency component compared to the error correction ability of the high frequency component of the block. It is an object of the present invention to provide an extremely good error correction device that achieves the above-mentioned results.

[Structure of the Invention] (Means for Solving the Problems) An error correction device according to the present invention divides input digital data into a plurality of blocks, performs orthogonal transformation processing for each block, and then converts the input digital data into entropy codes. It is intended for those that perform error correction processing on data that has been compressed by processing. Array conversion means for aligning the low-frequency components of each block of entropy-encoded data to a constant code length to produce periodized data; a first parity addition means for adding a parity code of
and a second parity addition means for adding a parity code of The configuration is such that error correction processing is performed on components other than the low-frequency components of the processed data based on the second parity code.

(Operation) According to the above configuration, error correction processing is performed on the low-frequency components of the entropy-encoded data based on the first and second parity codes, and the error correction processing is performed on the low-frequency components of the entropy-encoded data. Since the error correction process is performed based on the second parity code, the error correction ability of the low frequency component can be improved compared to the error correction ability of the high frequency component of the block, making it possible to perform effective error correction processing. This is something that can be realized.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. In FIG. 1, digital data supplied to an input terminal 11 is supplied to a block division circuit 12 and divided into a plurality of small blocks.
and is converted into a frequency axis for each block. The data output from this orthogonal transform circuit 13 is
The data is supplied to the entropy encoding circuit 14, where entropy encoding processing is performed to assign short codes and long codes to frequently occurring numerical values and low numerical values, respectively, as described above, and the data is converted to an optimal code length. The signals are transmitted in block order starting from the low frequency component. At this time,
As shown in FIG. 2, the data output from the entropy encoding circuit 14 is divided into a plurality of blocks Bl, B2 .
B3゜... Divided into Bn units, each block Bl, B
2゜B3, ・=, Bn is the low frequency component BIL,
B2L.

B3L, -, BnL and high frequency components BIH, B2H, B3H
, --...BnH.

The data output from the entropy encoding circuit 14 is supplied to a data array conversion circuit 15. Of the input data, this data array conversion circuit 15 determines the longest code length of the DC component, that is, the code length of the low frequency component BIL, as a constant code length, and converts the other low frequency components B 2L,
B3L, . . . , BnL, which are less than a certain code length, are stored in blocks B2 . B3. ..., Bn high frequency components B2H, B3H,
-, low frequency component B 2M in BnH.

83M, . . . , BnM are added to each block Bl, B2 . B3゜...
・, Bn DC and low frequency components are arranged so as to become periodized data of a constant code length. The data BLL outputted from the data array conversion circuit 15 in this way,
B 2L+ B 2M, B 3L+ B 3M
,...B nL+ B nM is the parity addition circuit 1
6 and is supplied with a parity code P for error correction processing for DC and low frequency components.
7 is sent to one fixed contact 17a.

On the other hand, the data output from the entropy encoding circuit 14 is sent as is to the other fixed contact 17b of the changeover switch 17. This changeover switch 17 has a movable contact piece 17d which is always in contact with its common contact 17c in response to a changeover signal output from a timing generation circuit 18 which operates based on the output of the data array conversion circuit 5. , are selectively connected to the fixed contacts 17a and 17b, and the low frequency components of the data from the parity addition circuit 16 are
3L+B 3M,..., B nL+ B nM
and fixed contact 1 while the parity code P is being output.
7a side, and the other state, that is, the low frequency components B IL, B 2L from the entropy encoding circuit 14
+ B 2M, B 3L+ B 3M.

−= B nL+ High frequency components other than B nM B IH
, B 2H-B 2M.

B 3H-B 3M, -= , B nH-B n
While M is being output, it is switched to the fixed contact 17b side.

Then, each data obtained through this changeover switch 17 is BIL, B2L182M, B aL18
3M,...B nL+ B nM, P, B
IH, B 2H-B 2M, B 3H-B 3M
.

... B nH-B nM is data array conversion circuit 1
9 and is array-converted as shown in Figure 3,
The signal is supplied to a parity adding circuit 20, where a horizontal parity code HP and a vertical parity code vP for error correction processing are added, and taken out via an output terminal 21 for recording on a recording medium (not shown).

According to the configuration as in the above embodiment, each block Bl,
Among B2, B3, -, and Bn, the low frequency components BIL, B2L+ B2 are relatively important data components.
M.

B 3L + B 3M, =-, B nL+ B nM is subjected to powerful error correction processing using a parity code P, horizontal parity code HP, and vertical parity code VP, and the low frequency component B IL, B 2L+
B 2M, B 3L+ B 3M,..., Bn
L+B1 High frequency component B which is less important than the old one
,B 2H-B 2M, B 3H-B 3M,...
・For B nH-B nM, horizontal parity code H
Normal error correction processing using P and vertical parity code VP is now performed, and effective error correction processing suitable for each component can be performed.

It should be noted that the present invention is not limited to the above-mentioned embodiments, and can be implemented with various modifications without departing from the gist thereof.

[Effects of the Invention] As described in detail above, according to the present invention, effective error correction processing is realized by improving the error correction ability of the low frequency component compared to the error correction ability of the high frequency component of the block. An extremely good error correction device can be provided.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a block diagram showing an embodiment of an error correction device according to the present invention, FIGS. 2 and 3 are diagrams for explaining the operation of the embodiment, and FIG. FIG. 4 is a diagram for explaining the problems of the conventional error correction device. ]1...input terminal, ],2...block division circuit,
13... Orthogonal transformation circuit, 14... Entropy encoding circuit, 15... Data array conversion circuit, 16... Parity addition circuit, 17... Changeover switch, 18...
Timing generation circuit, 19... data array conversion circuit,
20... Parity addition circuit, 1... Output terminal.

Claims (1)

[Claims] In an error correction device that divides input digital data into a plurality of blocks, performs orthogonal transformation processing on each block, and then performs entropy encoding processing to perform error correction processing on the compressed data, the entropy code is an array conversion means for aligning low-frequency components of each block of the processed data to a constant code length to obtain periodized data;
a first parity addition means for adding a first parity code for error correction to the output data of the array conversion means; and a second parity code for error correction to the entropy-encoded data; and a second parity adding means for adding a parity code, and performs error correction processing on the low frequency component of the entropy encoded data based on the first and second parity codes,
The error correction apparatus is characterized in that the error correction process is performed on components other than low frequency components of the entropy-encoded data based on the second parity code.