JPH03233617A - Power supply monitor circuit - Google Patents

Power supply monitor circuit

Info

Publication number
JPH03233617A
JPH03233617A JP2030109A JP3010990A JPH03233617A JP H03233617 A JPH03233617 A JP H03233617A JP 2030109 A JP2030109 A JP 2030109A JP 3010990 A JP3010990 A JP 3010990A JP H03233617 A JPH03233617 A JP H03233617A
Authority
JP
Japan
Prior art keywords
power
power source
peripheral equipment
main body
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2030109A
Other languages
Japanese (ja)
Inventor
Kazuhiko Tagawa
田川 和彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niigata Fuji Xerox Manufacturing Co Ltd
Original Assignee
Niigata Fuji Xerox Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Niigata Fuji Xerox Manufacturing Co Ltd filed Critical Niigata Fuji Xerox Manufacturing Co Ltd
Priority to JP2030109A priority Critical patent/JPH03233617A/en
Publication of JPH03233617A publication Critical patent/JPH03233617A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the power source of a peripheral equipment from being forgotten for turning on when starting business by detecting the OFF state of the power source of the peripheral equipment when the power source of a main body is turned on, and raising an alarm. CONSTITUTION:Peripheral equipment power supply state signals DCN are respec tively connected from peripheral equipments 4 and 5 to the input ends of two AND gates 2a in a peripheral equipment power supply state detection circuit 2, and when the power source of a main body 1 of the device is turned on, a device main body power supply voltage 5V is impressed to the other input ends of the two AND gates 2a. When the power source of the main body of the device is turned on and the power source of the peripheral equipment 4 or 5 is turned OFF, any one of the peripheral equipment power supply signals DCN is turned to a low level and the signal level of an alarm signal ALM at the output end of an AND gate 2b is made low. Then, the alarm is raised to announce it to a worker that the power source of the peripheral equipment 4 or 5 is forgotten for turning on, by ringing a buzzer 3a. Thus, the power source of the peripheral equipment is prevented from being missed to be turned on.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は装置本体と周辺機器よりなるシステムの電源監
視回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power supply monitoring circuit for a system consisting of an apparatus main body and peripheral equipment.

〔従来の技術〕[Conventional technology]

従来、この種の電源監視回路は存在していなく、装置本
体の電源出力端以外から電源が供給される周辺機器にお
いては、作業者が装置本体の電源を入れる際に、周辺機
器の電源を入れ忘れないようにするか、あるいは使用ソ
フトウェアにより周辺機器の電源オフ状態を検出する方
法しかなかった。
Conventionally, this type of power monitoring circuit did not exist, and for peripheral devices that are supplied with power from sources other than the power output terminal of the device, it is possible for an operator to forget to turn on the peripheral device when turning on the power to the device. The only way to do this is to either prevent it from happening, or use the software to detect when the peripheral device is powered off.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の装置本体と周辺機器よりなるシステムの
電源監視回路は、特に設けられていなかった為、作業者
が装置本体の電源を入れる際に、周辺機器の電源を入れ
忘れないようにするか、あるいはこのシステムに使用さ
れているソフトウェアにより周辺機器の電源オフ状態を
検出する方法しかなく、万一電源の入れ忘れがあった場
合には、業務途中に作業者が周辺機器の電源を入れる必
要を生じ、その為業務が中断されるという欠点がある。
The conventional power supply monitoring circuit for the above-mentioned system consisting of the main body of the device and peripheral devices was not particularly provided, so it was necessary to ensure that the operator did not forget to turn on the power of the peripheral devices when turning on the power of the main body of the device. Alternatively, the only way to detect whether a peripheral device is powered off is through the software used in this system, and if a worker forgets to turn on the power, the worker will have to turn on the peripheral device during work. , which has the disadvantage that business operations are interrupted.

そこで本発明は、上記の欠点を解消して、作業者が装置
本体の電源を入れた際に、万一周辺機器の電源の入れ忘
れがあった場合には、その電源のオフ状態を検出して検
出信号を発生し、この検出信号に応答して警報を発して
作業者に電源の入れ忘れを気付かせ、直ちに入れ忘れた
電源をオン状態にさせるような電源監視回路を提供する
ことを目的とする。
Therefore, the present invention solves the above-mentioned drawbacks and, in the unlikely event that a worker forgets to turn on a peripheral device when turning on the power to the main body of the device, detects the power off state of the peripheral device. To provide a power supply monitoring circuit which generates a detection signal, issues an alarm in response to the detection signal to make a worker aware of forgetting to turn on the power, and immediately turns on the forgotten power supply.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の電源監視回路は、 装置本体のti電源出力端以外ら電源が供給される周辺
機器の電源監視回路において、 前記装置本体の電源はオン状態にあるが、前記周辺機器
の電源がオフ状態にあるとき、このオフ状態を検出して
検出信号を発生する回路と、前記検出信号に応答して警
報を発する回路とを有している。
The power monitoring circuit of the present invention is a power monitoring circuit for a peripheral device to which power is supplied from a source other than the ti power output terminal of the device main body, wherein the power of the device main body is in an on state, but the power of the peripheral device is in an off state. It has a circuit that detects this OFF state and generates a detection signal when it is in the off state, and a circuit that issues an alarm in response to the detection signal.

〔作用〕[Effect]

このように、装置本体の電源はオン状態にあっても、周
辺機器の電源がオフ状態であれば、電源監視回路がこの
オ”ノ状態を検出して検出信号を発生し、この検出信号
に応答して警報を発するので作業者は直ちに周辺装置の
電源をオン状態にして作業を始め、作業が途中で中断さ
れるようなことはない。
In this way, even if the main unit's power is on, if the power of the peripheral equipment is off, the power monitoring circuit detects this on state and generates a detection signal, and this detection signal Since an alarm is issued in response, the worker can immediately turn on the power to peripheral devices and begin work without interrupting the work.

(実施例) 次に、本発明の実施例について図面を参照して説明する
(Example) Next, an example of the present invention will be described with reference to the drawings.

第1図は本発明の電源監視回路の一実施例のブロック図
である。本実施例の装置本体1はパーソナルコンピュー
タである。その周辺機器4.5からの周辺ta器電源状
態信号DCNが周辺機器電源状態検出回路2の2つのア
ンドゲート2aの入力端にそれぞれ接続される。この2
つのアンドゲートの他の入力端には、装置本体1の電源
がオン状態にあるときは、装置本体電源電圧+5vが印
加される。アンドゲート2aの各出力はアンドゲート2
bの2つの入力となる。アンドゲート2bの出力端は、
警報信号ALMとして警報回路3のブザー3aの制御入
力端に接続されている。ブザー3aには装置本体電源電
圧+5Vが別に印加されており、このブザー3aは制御
入力端が低レベルとなったときに鳴動するようになって
いる。
FIG. 1 is a block diagram of an embodiment of a power supply monitoring circuit according to the present invention. The device main body 1 of this embodiment is a personal computer. The peripheral device power state signal DCN from the peripheral device 4.5 is connected to the input terminals of two AND gates 2a of the peripheral device power state detection circuit 2, respectively. This 2
When the device main body 1 is powered on, the device main body power supply voltage +5V is applied to the other input terminal of the two AND gates. Each output of AND gate 2a is
There are two inputs for b. The output terminal of AND gate 2b is
It is connected to the control input terminal of the buzzer 3a of the alarm circuit 3 as an alarm signal ALM. A power supply voltage of +5 V for the main body of the apparatus is separately applied to the buzzer 3a, and the buzzer 3a sounds when the control input terminal becomes low level.

そして、本実施例の電源監視回路は周辺機器電源状態検
出回路2と警報回路3とを有している。
The power supply monitoring circuit of this embodiment includes a peripheral equipment power state detection circuit 2 and an alarm circuit 3.

次に、本実施例の作用を説明する。Next, the operation of this embodiment will be explained.

第1図において、装置本体1の電源がオン状態で、周辺
機器4または5の電源がオフ状態であると、2つの周辺
機器4.5から出力する周辺機器電源状態信号DCNの
何れか一つは低レベルとなり、この低レベルの周辺機器
電源状態信号DCNが入力するアンドゲート2aの出力
は低レベルで使方のアンドゲート2aの出力は高レベル
となって共にアンドゲート2bに入力する。従ってアン
ドゲート2bの出力端の警報信号AI−Mの信号レベル
も低レベルとなるので、ブザー3aが鳴動し、周辺機器
4または5の電源の入れ忘れを作業者に告知する警報を
発することができることになる。
In FIG. 1, when the device main body 1 is powered on and the peripheral device 4 or 5 is powered off, one of the peripheral device power status signals DCN output from the two peripheral devices 4 and 5. becomes a low level, and the output of the AND gate 2a to which this low level peripheral device power state signal DCN is input is a low level, and the output of the other AND gate 2a becomes a high level and is input to the AND gate 2b. Therefore, the signal level of the alarm signal AI-M at the output terminal of the AND gate 2b also becomes low level, so that the buzzer 3a can sound and issue an alarm to notify the operator that the peripheral device 4 or 5 has forgotten to be turned on. become.

一方、周辺機器4および5が共に電源オンであれば、2
つの周辺機器電源状態信号DCNが共に高レベルとなり
、従って警報信号A L Mは高レベルとなるのでブザ
ー3aは鳴動しない。
On the other hand, if peripheral devices 4 and 5 are both powered on, 2
The two peripheral device power state signals DCN both become high level, and therefore the alarm signal ALM becomes high level, so the buzzer 3a does not sound.

なお、上記実施例において、警報を発する物としてブザ
ー38を用いたが、表示器等を用いることも可能である
In the above embodiment, the buzzer 38 is used as the alarm, but it is also possible to use a display or the like.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、装置本体の電源出力端以
外から電源が供給される周辺機器の電源が、IAM本体
の電源オン状態においてオフ状態にあるとき、この状態
を検出して警報を発することにより、周辺機器の電源の
入れ忘れを作業者に告知できるので、業務開始時におけ
る周辺機器の電源の入れ忘れをなくすことが可能となり
、業務途中において作業者が周辺機器の電源を入れる事
態がなくなり、業務が中断されるという欠点を解消でき
る効果がある。
As explained above, the present invention detects this state and issues an alarm when the power of a peripheral device that is supplied with power from a source other than the power output terminal of the device main body is in the OFF state while the IAM main body is powered on. This allows workers to be notified if they have forgotten to turn on peripheral devices, making it possible to eliminate forgetting to turn on peripheral devices at the start of work, and eliminate situations where workers turn on peripheral devices in the middle of work. This has the effect of eliminating the disadvantage of business interruption.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の電源監視回路の一実施例のブロック図
である。 1・・−装置本体、 2・・・周辺機器電源状態検出回路、 2a、2b・・・アンドゲート、 3・・・警報回路、 3a・・・ブザー 4.5・・・周辺機器、 DCN・・・周辺機器電源状態信号、 AIM・・・警報信号、 +5V・・・装置本体電源電圧。
FIG. 1 is a block diagram of an embodiment of a power supply monitoring circuit according to the present invention. 1...-Device body, 2... Peripheral device power state detection circuit, 2a, 2b... AND gate, 3... Alarm circuit, 3a... Buzzer 4.5... Peripheral device, DCN. ...Peripheral equipment power status signal, AIM...Alarm signal, +5V...Device main power supply voltage.

Claims (1)

【特許請求の範囲】[Claims] 1、装置本体の電源出力端以外から電源が供給される周
辺機器の電源監視回路において、前記装置本体の電源は
オン状態にあるが、前記周辺機器の電源がオフ状態にあ
るとき、このオフ状態を検出して検出信号を発生する回
路と、前記検出信号に応答して警報を発する回路とを有
することを特徴とする電源監視回路。
1. In a power monitoring circuit for a peripheral device to which power is supplied from a source other than the power output terminal of the device main body, when the power of the device main body is in the on state but the power of the peripheral device is in the off state, this off state What is claimed is: 1. A power source monitoring circuit comprising: a circuit that detects a signal and generates a detection signal; and a circuit that issues an alarm in response to the detection signal.
JP2030109A 1990-02-08 1990-02-08 Power supply monitor circuit Pending JPH03233617A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2030109A JPH03233617A (en) 1990-02-08 1990-02-08 Power supply monitor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2030109A JPH03233617A (en) 1990-02-08 1990-02-08 Power supply monitor circuit

Publications (1)

Publication Number Publication Date
JPH03233617A true JPH03233617A (en) 1991-10-17

Family

ID=12294612

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2030109A Pending JPH03233617A (en) 1990-02-08 1990-02-08 Power supply monitor circuit

Country Status (1)

Country Link
JP (1) JPH03233617A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008123421A (en) * 2006-11-15 2008-05-29 Nippon Syst Wear Kk Japanese abacus recognizer, numeric value recognition method for abacus, abacus recognition system, numeric value recognition program for abacus, and computer readable medium

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61183494A (en) * 1985-02-12 1986-08-16 Nippon Kokan Kk <Nkk> Operating method for electrode circulation type one-side electroplating

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61183494A (en) * 1985-02-12 1986-08-16 Nippon Kokan Kk <Nkk> Operating method for electrode circulation type one-side electroplating

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008123421A (en) * 2006-11-15 2008-05-29 Nippon Syst Wear Kk Japanese abacus recognizer, numeric value recognition method for abacus, abacus recognition system, numeric value recognition program for abacus, and computer readable medium
JP4674198B2 (en) * 2006-11-15 2011-04-20 日本システムウエア株式会社 Abacus recognition device, abacus numerical recognition method, abacus recognition system, abacus numerical recognition program, and computer-readable medium

Similar Documents

Publication Publication Date Title
EP1349128A3 (en) System for monitoring an inhabited environment
JPH03233617A (en) Power supply monitor circuit
JPS636469A (en) Wire breaking detection and warning system for sensor
JPH0218626A (en) Interruption inhibition monitoring system
JPH0419789A (en) Warning circuit for forgetting power-on state of display device
JPH01234916A (en) Terminal equipment
JPH0916295A (en) Information processor
JPH04174014A (en) Information processor
JPH05134787A (en) Information processor
JPH03156515A (en) System reset circuit system
JPH0228816A (en) Power source control system in display device
JPS6211919A (en) Power supply interlocking device
JPS6225310A (en) Controller of annunciator
JPS61123997A (en) Alarm transmitter
JPS62150293A (en) Voice recognition equipment
JPH0417443A (en) System for identifying state of channel panel
JPH073016U (en) Central processing unit reset circuit
JPH0541227U (en) AV amplifier selector device
JPH0335341A (en) Status signal detector
JPH0362107A (en) Power unit with overload detecting function
JPH09319408A (en) Interrupt signal monitor circuit and programmable controller
JPS5815206U (en) Abnormal condition warning device
JPH03222001A (en) Loop cutter
JPH08235074A (en) Signal processor
JPH0292591U (en)