JPH03217108A - Peaking circuit - Google Patents

Abstract

PURPOSE:To prevent an influence of floating capacitance and floating inductance even at the time of peaking in a high frequency by providing a broad band amplifier IC or the like with a second semiconductor element, which has one end connected to a first semiconductor element or a capacitor and to which the forward bias is supplied, and a current source which is so connected that the forward bias current is supplied to the second semiconductor element. CONSTITUTION:The circuit constant of a resistor R3 or the like is so selected that the value of a dynamic resistor R of a diode D2 is much smaller than the value of the resultant impedance of the resistor R3 and a transistor TR Q2 viewed from the collector side, thereby practically adjusting the extent of peaking by the value of the dynamic resistor R3. Consequently, an inductance LB3 and a capacitor CB3 are merely added as current sources to a variable resistor 7 which adjusts a bias current ID though the inductor LB3 and the capacitor CB3 related to a bonding wire and a bonding pad, which are used to connect the variable resistor 7 to the outside of the IC, are generated, and the peaking characteristic of the circuit is not affected, and peaking is easily applied in a high frequency range.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a peaking circuit used, for example, in a wideband amplification IC.

(Prior art) Repeater circuits used in optical communication systems with transmission speeds of Gb/s require amplifier circuits with a frequency band of several GHz, but in such a high frequency range, stray capacitance and Since the influence of stray inductance components increases, it becomes difficult to widen the bandwidth of the circuit.

For example, the capacitance between a bonding pad and an IC substrate in an IC (integrated circuit) and the inductance component of a bonding wire have a large influence on the frequency characteristics of the circuit.

Figure 4 shows how stray capacitance and stray inductance affect an IC. In Figure 4, CB1 and CB
2 is a capacitance formed between the bonding pad and the IC board, LBI and LB2 are inductance components of the bonding wire, and these are formed between the IC amplifier circuit 1, the coaxial cable 2, and the load resistor RL.

In a normal IC, the capacitances CBI and CB2 are 0.5
PF or more, and the inductance component L B 1 , LB
2 indicates a value of 1.0NH or more. With such a value, even if the frequency band of the amplifier circuit is infinite, the band of the amplifier circuit system will become
As shown in the figure, it narrows down to 2 to 3 GHz. In this way, an amplifier circuit that operates in a frequency range of several GHz is greatly affected by stray capacitance and stray inductance components, so it is not easy to ensure desired band characteristics.

Therefore, a peaking circuit that applies peaking to an amplifier circuit has been used as one of the methods for widening the band. That is,
Figure 6 shows a conventional peaking circuit in a common emitter amplifier circuit, in which a resistor R1 is connected between the collector of the transistor Q1 and the voltage source 1, and a resistor R2 is connected between the emitter and the voltage source v2. In a common emitter amplifier circuit in which a signal from terminal 3 is input to the base of transistor Q1 and an amplified output signal is derived from output terminal 4 connected to the collector, a capacitor cp is used to peak the frequency characteristics of the circuit. capacitor 5 and variable resistor 6
A series circuit of Q1 is connected between the emitter of transistor Q1 and ground.

The low frequency gain AV-3-1 and the high frequency gain AV2 in this peaking circuit are respectively expressed by the following equations ω■.

AV1=-gm-rl/ (1+gm-r2) -
■AV2=-g+i-rl/ (1 +gm-r2
//r6) - ■Here, gII1 is the mutual inductance of the transistor Q1, and rl, r2, r6 are each R
The resistance values of R2, R6, and r2//r6 indicate the parallel combined resistance value of resistors R2 and R6.

Therefore, according to formula (2), by adjusting the variable resistor 6, the gain in the high frequency region can be increased, and therefore, peaking is applied to the circuit frequency characteristics, making it possible to extend the band. Further, by adjusting the value of the variable resistor 6, a desired band characteristic can be obtained, for example, within the range indicated by arrow Y in FIG. The difference (Y) in gain between when peaking is applied and when it is not applied is generally referred to as the amount of peaking.

Further, the frequency range in which peaking is applied is determined by the value of the capacitance CP of the capacitor 5.

Next, the influence of floating components in the circuit of FIG. 6 will be described. When the circuit of FIG. 6 is integrated into an IC, the variable resistor 6 is connected to the outside of the IC via a bonding pad. Therefore, in reality, as shown in FIG. 8, the capacitance between the bonding pad and the substrate (CB3) is connected in parallel with the resistor 6.
Further, inductance components (LB3) of bonding wires are connected in series with the resistors 6, respectively. Since these floating components (CB3, LB3) have an influence at high frequencies, it becomes difficult to adjust the high frequency gain AV2 with the resistor 6 as in equation (2), and the capacitance CB3
Or, by inductance LB3, high frequency gain AV2
is decided. In such a case, for example, if the value of capacitance CB3 is large, excessive peaking will occur, causing stability problems such as circuit oscillation, and if the value of inductance LB3 is large, the amount of peaking will be small, extending the frequency band of the circuit. A problem arose that made it difficult to do so.

(Problem to be solved by the invention) When peaking is applied at high frequencies in conventional peaking circuits, excessive peaking occurs due to the effects of stray capacitance and stray inductance, causing stability problems such as circuit oscillation, or the amount of peaking increases. The problem arose that it became difficult to extend the circuit bandwidth.

The present invention was conceived in view of the above drawbacks, and an object of the present invention is to provide a peaking circuit that is free from the effects of stray capacitance and stray inductance even when peaking is applied at high frequencies.

[Structure of the invention]

(Means for Solving the Problems) A peaking circuit according to the present invention includes a common-emitter transistor amplifier circuit, a reverse-biased first semiconductor element or capacitor connected to the emitter of the transistor amplifier circuit, and a first semiconductor element or capacitor connected to the emitter of the transistor amplifier circuit. A second semiconductor element having one end connected to an element or a capacitor and supplied with a forward bias, and a current source connected to supply the forward bias current to the second semiconductor element. shall be.

(Function) When a peaking adjustment circuit is externally connected to a common emitter amplifier circuit using an IC or the like, stray capacitance and stray inductance components are generated due to bonding wires and bonding pads.

In the peaking circuit according to the present invention, a reverse biased first semiconductor element or a capacitor is connected to the emitter of a common emitter transistor, and a second semiconductor element whose one end is connected to the first semiconductor element or the capacitor is connected to the emitter of a common emitter transistor. By connecting the current source, the stray capacitance and stray inductance components due to the attachment of the peaking adjustment circuit become a circuit configuration in which they are added to the current source. Therefore, adjustment of the peaking characteristics by controlling the current source is determined by the forward resistance of the second semiconductor element having a small resistance value, and the stray capacitance and stray inductance components themselves do not directly affect the peaking characteristics.

(Example) Hereinafter, an example of a peaking circuit according to the present invention will be described with reference to the drawings. In addition, the same reference numerals are given to the same structures as the conventional structure shown in FIGS. 6 and 7-8.

FIG. 1 is a circuit diagram showing an embodiment of a peaking circuit according to the present invention. Voltage sources Vl, V2, transistor Q
1, a resistor R1, and a resistor R2. In the emitter-grounded transistor amplifier circuit, the emitter of the transistor Q1 is connected to the anode of a reverse biased diode D1 as a first semiconductor element. Its cathode is connected to the cathode of another diode D2 as a second semiconductor element whose anode is connected to the voltage source v3. The cathode of diode D2 is connected to transistor Q via resistor R3.
The emitter of the transistor Q2 is connected to a voltage source v5 via a variable resistor 7 attached outside the IC.

An inductance LB3 and a capacitance CB3 connected between the variable resistor 7 and the transistor Q2 represent stray inductance and stray capacitance, respectively, which are added when the variable resistor 7 is connected. A voltage source v4 is connected to the base of the transistor Q2.

-8 Since the bias current (IO) flowing through the diode D2 changes by adjusting the variable resistor 7, the circuit of the transistor Q2 driven by the voltage sources V3, V4, and V5 is the bias current supply circuit of the diode D2, i.e. A current source for the diode D2 as the second semiconductor element is configured.

In the above circuit configuration, the junction capacitance formed in the diode D1 is the capacitance C of the conventional capacitor 5 shown in FIG.
It plays the same role as P. Furthermore, since the diode D1 is reverse biased, its junction capacitance is small, making it suitable for peaking at high frequencies.

The forward resistance, that is, the dynamic resistance R of the diode D2 depends on the bias current ID flowing through the diode D2, and is expressed as follows:
D) is expressed as follows.

R=N·Vt/ID... ■Vt=kT/q... (d) Here, N is the emission coefficient, k is the Borckmann constant, T is the absolute temperature, and q is the charge of the electron.

Therefore, by changing the value of the variable resistor 7 and adjusting the current as a current source, the value of the bias current ID changes, and the value of the dynamic resistance R of the diode D2 can be adjusted. From the circuit configuration shown in Figure 1, the parallel composite resistance of the dynamic resistance R of the diode D2 and (the impedance seen from the collector of the resistor R3 + the transistor Q2) plays the same role as the resistor 6 that adjusts the amount of peaking in Figure 6. I know what to do.

Now, if we choose circuit constants such as resistor R3 so that the value of dynamic resistance R of diode D2 is very small compared to the value of (resistance R3 + impedance seen from the collector of transistor Q2), then the dynamic resistance The amount of peaking is adjusted by the value of the resistance R.

That is, the amount of peaking can be adjusted by adjusting the variable resistor 7 and controlling the bias current ID.

Therefore, in the circuit configuration shown in FIG. 1, the variable resistor 7 for adjusting the bias current ID is connected to the outside of the IC, and the inductance LB3 and capacitance CB associated with the bonding wire and bonding pad for this purpose are
Even if 3 occurs, they are simply added to the variable resistor 7 as a current source, which affects the peaking characteristics of the circuit, but peaking can be easily applied in the high frequency region. Furthermore, by adjusting the voltage sources V3, V4, and V5 and changing the reverse bias voltage applied to the diode D1, the junction capacitance of the diode D1 can be changed, so the frequency range in which peaking is applied can also be adjusted. .

In addition, in FIG. 1, the diode D1 is replaced with a capacitor, and the voltage sources Vl and V3 and the voltage sources V2 and V5 are respectively connected as a common voltage source, thereby simplifying the circuit configuration.

In addition, in the embodiment shown in FIG.
They can function similarly by replacing them with transistors whose collectors and bases are commonly connected.

That is, FIG. 2 is a circuit diagram showing a second embodiment of the peaking circuit according to the present invention, in which the diodes Di,
Equivalently, D2 is simply replaced with transistors Q3 and Q4, which have the operating characteristics of a diode.
Peaking can be applied reliably and easily by adjusting. That is, in the present invention, transistors can be used as the first and second semiconductor elements instead of the diodes Di and D2.

Further, even if the bias current supply circuit using the transistor Q2 shown in FIG. 1 is configured in parallel, it can function in the same way.

That is, FIG. 3 is a circuit configuration diagram showing a third embodiment of the circuit of the present invention, and the difference from the circuit shown in FIG. 1 is that in FIG. Q2, a bias circuit consisting of a resistor R3 and a variable resistor 7 is provided in parallel, and a diode D21
and the point where the cathode of diode D22 is commonly connected to the cathode of diode D1.

In the circuit shown in Fig. 3, so that a bias current of ID/2 flows through each of the two bias circuits provided in parallel,
When the variable resistor 71 and the resistor 72 are adjusted, the dynamic resistance R', R'12- of each diode D21, D22 becomes as follows: R' = 2-N-Vt/ID (5) R '=2-N
-Vt/ID- (6) Therefore, the parallel combined resistance Rp is Rp
"N-Vt/I D -= ■, and the bias current (ID/2) is 1/2 compared to the circuit configuration in Figure 1, and the same value as the dynamic resistance R in Figure 1 as shown by the formula ■. Therefore, the voltage drop across the resistors R31 and R32 is reduced, and there is an advantage that the value between the voltage sources V3 and V5 can be made smaller than in the circuit shown in FIG.

〔Effect of the invention〕

As described in detail above, the peaking circuit of the present invention can easily apply peaking in a high frequency range without being affected by stray capacitance and stray inductance, and is highly effective in practical use.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of a peaking circuit according to the present invention, FIG. 2 is a circuit diagram showing a second embodiment of a peaking circuit according to the present invention, and FIG. 3 is a circuit diagram showing a second embodiment of the peaking circuit according to the present invention. 4 is a circuit diagram showing a state where stray capacitance and stray inductance are added to the IC, and FIG. 5 is a frequency characteristic diagram of the circuit shown in FIG. 4. , Figure 6 is a circuit configuration diagram showing a conventional peaking circuit, Figure 7 is a frequency characteristic diagram of the circuit shown in Figure 6, and Figure 8 is the circuit shown in Figure 6 with stray capacitance and stray inductance added. It is a circuit diagram showing a state. 1...Amplification circuit, 2...Coaxial cable, 3.
...Input terminal, 4...Output terminal, 5...Capacitor, 6, 7, 71.72...Variable resistance, Rl, R2, R3, R31, R32, RL...Resistance, Ql, Q2 , Q21, Q22, Q3, Q4...Transistor, Di, D2, D21, D22...Diode, CP...Capacitance, CBI, CB2, CB3, CB31, CB32...Stray capacitance, LBI, LB2, LB3, LB31, LB32
...Floating inductance, Vl, V2, V3, V4, V5... Voltage source. -15-0 0 〉 148-

Claims (1)

[Claims] a common emitter transistor amplifier circuit; a first semiconductor element or capacitor with a reverse bias connected to the emitter of the transistor amplifier circuit; and a first semiconductor element or capacitor with one end connected to the first semiconductor element or capacitor and supplied with a forward bias. 1. A peaking circuit comprising: a second semiconductor element; and a current source connected to supply the forward bias current to the second semiconductor element.