JPH03216023A - A/d converter - Google Patents

Abstract

PURPOSE:To obtain this A/D converter suitable for ultrahigh speed operation and offering the ease of drive by providing a current mirror circuit comparing an input analog current with the reference current of each reference current source. CONSTITUTION:The converter is provided with a current mirror circuit 11 receiving an input analog current at its input terminal and plural reference current sources 12 connected respectively to plural output terminals of the current mirror circuit 11, and the input analog current and the reference current of each reference current source are compared to output a voltage at each output terminal of the current mirror circuit 11 as a digital signal. That is, an H level is outputted from each output terminal of the current mirror circuit 11 in a range where a reference current is larger than the input analog current and an L level is outputted as a digital signal in a range where the reference current is smaller than the input analog current. Thus, the converter is suitable for high-speed operation and the drive is facilitated.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a new system for parallel A/D converters.

BACKGROUND TECHNOLOGY FIG. 4 is an example of a conventional parallel AD converter, and is a block diagram showing the configuration of an 8-bit converter. Analog input voltage V
in is compared with a voltage obtained by resistor-dividing the reference voltage vrer+ and V ref by comparators 1 to 256, and encoder 1
Generates an 8-bit digital output from. Such parallel A/D converters are generally suitable for high-speed conversion operations. Problems to be Solved by the Invention> However, as the frequency of the input signal increases,
The following problems arise. In other words, if the number of output bits is generally n bits, the signal input terminal has (2 -1
) comparators are connected, so the input capacitance is several 10p
It will be around F. Assuming that the input signal frequency f is IGHz and the input capacitance C is 50 pF, the input impedance is 2.
is 1n 2. . =1/2πf'C =1/(2yr-IGHz・50pF)=3Ω. That is, it is necessary to flow 300 mA at IV amplitude, and it is extremely difficult to drive this A/D converter.

The present invention was made to solve the above problems,
The objective is to realize an AD converter that is suitable for ultra-high-speed operation and easy to drive.

Means for Solving the Problems> The A/D converter according to the present invention includes a current mirror circuit to which an input analog current is applied to an input terminal, and a plurality of current mirror circuits each connected to a plurality of output terminals of the current mirror circuit. reference current source, and is configured to output the voltage at each output terminal of the current mirror circuit as a digital signal by comparing the input analog current value and the reference current value of each reference current source. shall be.

Function> Each output terminal of the current mirror circuit outputs H in a range where the reference current value is larger than the input analog current, and outputs L as a digital signal in the range where the reference current value is smaller than the input analog current.

<Example> The present invention will be explained in detail below using the drawings. FIG. 1 is a block diagram showing the basic structure of an A/D converter according to the present invention. 11 is a current mirror circuit, 10 is an input terminal of this current mirror circuit 11, and 12 is a reference current source whose one end is connected to the positive voltage source V and the current end is connected to the output terminal of the current mirror circuit 11. Next, the operation of the device with the configuration shown in Figure 1 will be explained in detail. 1st
In the figure, the analog input current flowing into the input terminal 10 and the base 2I! The change in voltage level that occurs at the output terminal of the current mirror circuit 11 becomes a digital output depending on the magnitude relationship between the currents Iref. Digital output D. becomes as follows.

When Iin<Iref, Do=H (high level) I.
>I then Do=L (low level)+n
ref In other words, the current mirror circuit 11 converts the analog input current I. By comparing the magnitude of the reference current Iref and the reference current Iref, the circuit in Figure 1 can calculate the
/ Configure a D converter.

FIG. 2 shows a first embodiment of an A/D converter according to the present invention,
FIG. 2 is a configuration block diagram showing a current mirror circuit having multiple weighted current outputs. 20 has an input terminal 10 and outputs a plurality of weighted currents; 31, 32, . . . , 3n each have one end connected to a positive voltage source V, and each other end connected to This is a reference current source with an equal output value connected to each output terminal of the current mirror circuit 20. Next, the ejection operation of the configuration shown in FIG. 2 will be explained in detail. Second
In the figure, if the weighting of the output $ flow value of the current mirror circuit 20 is a = 1, a2 = 2, . . . a, = n, then 1 a1 ・I. <a −1 ku−・a −I+n
2 +n n +n. Now I<I<a -I al In ref
When I is input that satisfies the relationship l + I In, the digital outputs generated as changes in voltage level at each output terminal of the current n mirror circuit 20 are D1 to DI1=H, DI+1 to Dn=L. By converting the digital outputs D1 to Dn with an encoder, an A/D converter with binary code output can be realized. FIG. 3 shows a second embodiment of the A/D converter according to the present invention,
50 is a configuration block diagram showing a device having a plurality of current sources whose current values are weighted; 50 has an input terminal 10;
Current mirror circuit outputting a plurality of equal S flows, 61
, 62, . . . 6n each have one end connected to a positive voltage source V,
A plurality of reference current sources whose output current values are weighted are connected to each other and each other end is connected to each output terminal of the current mirror circuit 50. Next, the operation of the device having the configuration shown in FIG. 3 will be explained in detail. ．． Third
In the figure, the weighting of the current values of the reference current sources 61 to 6n is b = 1. If b2=2,...bo=n, 1 b −I <b −I <−b −I,
ef1 ref 2 ref n. now b −I <I. <b When Iin is input that satisfies the relationship Ilref +n m+1 ref, the current mirror circuit 5
The digital outputs generated as voltage level changes at each output terminal of 0 are D to D=L, DI1+1 to Dn=H1l. By converting the digital outputs D1 to Do with an encoder, an A7'D converter with a binary code output can be realized.

According to the A/'D converter as shown in each of the above embodiments, the input current flowing into the input terminal 10 of the current mirror circuit charges a voltage higher than the pace emitter voltage vBE of the diode-connected transistor. Therefore, compared to the case of a normal voltage input type A/D converter, charging time is shorter and ultra-high speed operation is possible. Therefore, the influence of input capacitance can be reduced, making driving easier. Note that in the embodiments of FIGS. 2 and 3, the current weighting may be done in any other combination. In addition, in the circuit shown in Figure 1, by providing a clamp circuit by connecting a clamp diode or the like between the digital output terminal and a predetermined potential, saturation of the transistors constituting the $ current source and current mirror circuit can be prevented, and high-speed operation can be achieved. It can be converted into The same applies to the embodiments shown in FIGS. 2 and 3. Effects of the Invention> As described above, according to the present invention, the present invention is suitable for ultra-high-speed operation;
An A/D converter that is easy to drive can be realized with a simple configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the principle structure of an A/D converter according to the present invention, FIG. 2 is a block diagram showing a first embodiment of the A/D converter according to the present invention, and FIG. is a configuration block diagram showing a second embodiment of the A/D converter according to the present invention,
Figure 4 is a block diagram showing a conventional A/D converter. 10... Input terminal, 11, 20.50... Current mirror circuit, 31-3n, 61-6n... Reference current source, ■... Input analog current, I. b-1st+
ref
1. f~b・■...Reference current value, D1~D
,...n ref 1″λ l Figure Z Figure 31-.371 Motojun Than A Figure 3 Figure 4

Claims (1)

[Claims] It includes a current mirror circuit to which an input analog current is applied to an input terminal, and a plurality of reference current sources respectively connected to the plurality of output terminals of this current mirror circuit, and the input analog current value and the reference current of each reference current source are 1. An A/D converter characterized in that the A/D converter is configured to output the voltage at each output terminal of the current mirror circuit as a digital signal by comparing the values with the values.