JPH0320974B2 - - Google Patents

Info

Publication number
JPH0320974B2
JPH0320974B2 JP57001990A JP199082A JPH0320974B2 JP H0320974 B2 JPH0320974 B2 JP H0320974B2 JP 57001990 A JP57001990 A JP 57001990A JP 199082 A JP199082 A JP 199082A JP H0320974 B2 JPH0320974 B2 JP H0320974B2
Authority
JP
Japan
Prior art keywords
circuit
output
capacitor
voltage
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57001990A
Other languages
Japanese (ja)
Other versions
JPS58119732A (en
Inventor
Seiji Nunoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57001990A priority Critical patent/JPS58119732A/en
Publication of JPS58119732A publication Critical patent/JPS58119732A/en
Publication of JPH0320974B2 publication Critical patent/JPH0320974B2/ja
Granted legal-status Critical Current

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  • Control Of Voltage And Current In General (AREA)
  • Control Of Electrical Variables (AREA)
  • Direct Current Feeding And Distribution (AREA)

Description

【発明の詳細な説明】 本発明は演算制御部を有する交流電源駆動の電
子装置等に有用な電源回路に関し、特に交流1次
入力をしや断した際の2次側の定電圧をよく長く
保持することを目的とする。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power supply circuit useful for electronic devices driven by an AC power supply having an arithmetic control unit, and in particular to a power supply circuit that can maintain a constant voltage on the secondary side for a long time when the primary AC input is suddenly cut off. The purpose is to hold.

従来の演算制御部を有する電子装置の一例を第
1図に示す。同図において、1は電源部の電源回
路、2は演算制御部、3は入出力部、4は前記電
源部の停電検出回路であり、aは交流(AC)一
次入力、b,b′は直流(DC)出力、cは停電割
込信号、dは制御信号であつて、入出力部3の制
御及び数値演算処理は演算制御部2によつて行わ
れるようになつている。演算処理中における停電
を含めたAC電源のしや断に対しては、演算デー
タの保護、入出力装置の保全を行う必要がある。
FIG. 1 shows an example of a conventional electronic device having an arithmetic control section. In the figure, 1 is a power supply circuit of the power supply section, 2 is an arithmetic control section, 3 is an input/output section, 4 is a power failure detection circuit of the power supply section, a is an alternating current (AC) primary input, and b and b' are A direct current (DC) output, c is a power failure interrupt signal, and d is a control signal, and control of the input/output section 3 and numerical calculation processing are performed by the arithmetic control section 2. It is necessary to protect the computed data and maintain the input/output devices in case of interruptions in the AC power supply, including power outages during computation processing.

このため、前記AC一次入力aがしや断すると、
停電検出回路4がこれを検出して、停電割込信号
cを発生し、これを受けて演算制御部2は、演算
データの保護及び入出力装置3の保全等のいわゆ
る停電処理を行うように構成されている。しかし
ながら、前記停電処理が行えるのは、停電割込検
出後、電源回路1から演算制御部2への供給電源
電圧がその正常動作範囲内に維持している時間内
に限られるが、従来はこの時間が十分確保出来な
い問題点があつた。
Therefore, when the AC primary input a is suddenly cut off,
The power failure detection circuit 4 detects this and generates a power failure interrupt signal c. In response to this, the calculation control unit 2 performs so-called power failure processing such as protection of calculation data and maintenance of the input/output device 3. It is configured. However, the power outage process can only be performed within the time period after the power outage interrupt is detected while the power supply voltage from the power supply circuit 1 to the arithmetic control unit 2 is maintained within its normal operating range. There was a problem with not having enough time.

本発明は、上記欠点を簡単な追加回路により除
去した電源回路を提供しようとするものであつ
て、以下その一実施例を第2図、第3図を用いて
説明する。第2図において、Tはトランスで一組
のAC一次入力(VAC)と2組のAC2次出力VAC1
VAC2とを有する。RC1,RC2は整流器、C1
C3はコンデンサ、R1〜R6は抵抗、TR1〜TR4
はトランジスタ、ZD1〜ZD2は定電圧素子、V1
整流器RC2の出力としての第一の平滑出力電圧、
V2は定電圧出力、V3は第2の平滑出力の電圧、
GNDは接地端子で、整流器RC1とコンデンサC1
により第1の平滑回路を、また整流器RC2とコ
ンデンサC2により平滑回路を構成する。
The present invention aims to provide a power supply circuit in which the above drawbacks are eliminated by a simple additional circuit, and one embodiment thereof will be described below with reference to FIGS. 2 and 3. In Figure 2, T is a transformer with one set of AC primary inputs (V AC ) and two sets of AC secondary outputs V AC1 ,
V AC2 . RC1 and RC2 are rectifiers, C 1 ~
C3 is a capacitor, R1 to R6 are resistors, TR1 to TR4
is a transistor, ZD 1 to ZD 2 are constant voltage elements, V 1 is the first smoothed output voltage as the output of the rectifier RC2,
V 2 is the constant voltage output, V 3 is the voltage of the second smoothed output,
GND is the ground terminal, rectifier RC1 and capacitor C1
A first smoothing circuit is constructed by the rectifier RC2 and a smoothing circuit by the capacitor C2 .

上記構成で、電源トランスTの2次側出力は整
流平滑回路を通して第1、第2の平滑出力(電
圧)V1,V2なる2種類の直流電圧となり、この
うち第1の平滑出力V1は直列安定制御用のトラ
ンジスタTR2を通して、前述の演算制御部2へ
の定電圧出力V2を供給している。ZD2は定電圧
V2を得るための定電圧素子であり、R6はトラン
ジスタTR2のベース電流供給用の抵抗である。
In the above configuration, the secondary output of the power transformer T becomes two types of DC voltages, the first and second smoothed outputs (voltages) V 1 and V 2 through the rectifier and smoothing circuit, of which the first smoothed output V 1 supplies a constant voltage output V 2 to the above-mentioned arithmetic control section 2 through the series stability control transistor TR2. ZD 2 is constant voltage
It is a constant voltage element for obtaining V2 , and R6 is a resistor for supplying base current to the transistor TR2.

定電圧素子ZD1、トランジスタTR3,TR4お
よび抵抗R3,R4,R5で構成される検出回路Aは、
第1の平滑出力V1の電圧がその基準電圧V4(後述
の第3図参照)以下となつたときこれを検出し、
トランジスタTR4を導通させるもので、このと
き、トランジスタTR4のコレクタ電流は、トラ
ンジスタTR1のベース電流として動作し、トラ
ンジスタTR1を導通させる。
The detection circuit A is composed of a constant voltage element ZD 1 , transistors TR3, TR4, and resistors R 3 , R 4 , R 5 .
Detects when the voltage of the first smoothed output V 1 becomes equal to or lower than its reference voltage V 4 (see Figure 3 below),
This makes the transistor TR4 conductive, and at this time, the collector current of the transistor TR4 acts as the base current of the transistor TR1, making the transistor TR1 conductive.

次に本実施例の動作を説明する。第3図はAC
一次入力(VAC)しや断時の電圧変化を示すタイ
ミング図であり、()はAC一次入力、()は
停電割込信号IPF、()は平滑出力、()は定
電圧V2、()は平滑出力V3を示す。イのタイミ
ングでAC一次入力(VAC)がしや断すると、電
源部は停電割込信号(Ipf)を発生(発生回路は
図示せず)し、第1の平滑出力V1は平滑用のコ
ンデンサC2と負荷抵抗で定まる時定数により放
電を開始する。そして第1の平滑出力V1が基準
電圧V4に達したとき、前述の検出回路Aはトラ
ンジスタTR1を導通させ、コンデンサC1に充電
していた電荷は、トランジスタTR1および電流
制限抵抗R2を通して、第1の平滑回路へ供給さ
れる。即ち、上記構成によれば、AC一次入力
(VAC)しや断後の定電圧V2を保持するための電
力として、コンデンサC2の放電電荷の他コンデ
ンサC1の放電電荷をも用いることができ、その
保持時間もコンデンサC1のみの時のT1から、コ
ンデンサC2の効果として、T2を加えたT3の時間
を得ることができる。なお第3図で破線ロ,ハは
従来の構成での第1の平滑出力V1と定電圧出力
V2の低下の様子を示す。
Next, the operation of this embodiment will be explained. Figure 3 shows AC
This is a timing diagram showing the voltage change when the primary input (V AC ) is cut off, where () is the AC primary input, () is the power failure interrupt signal I PF , () is the smoothed output, and () is the constant voltage V 2 , () indicates the smoothed output V3 . When the AC primary input (V AC ) is interrupted at timing A, the power supply section generates a power failure interrupt signal (I pf ) (the generation circuit is not shown), and the first smoothed output V 1 is used for smoothing. Discharge begins with a time constant determined by the capacitor C 2 and the load resistance. When the first smoothed output V 1 reaches the reference voltage V 4 , the aforementioned detection circuit A turns on the transistor TR 1 , and the charge stored in the capacitor C 1 is transferred through the transistor TR 1 and the current limiting resistor R 2 . , are supplied to the first smoothing circuit. That is, according to the above configuration, in addition to the discharge charge of the capacitor C 2 , the discharge charge of the capacitor C 1 can also be used as power to maintain the constant voltage V 2 after the AC primary input (V AC ) is cut off. The holding time can be changed from T1 when only capacitor C1 is used, to T3, which is the effect of capacitor C2 , which is the sum of T2 . In Figure 3, broken lines B and C indicate the first smoothed output V 1 and constant voltage output in the conventional configuration.
This shows how V 2 decreases.

一般にコンデンサの蓄積電荷Qは、コンデンサ
の容量Cと充電電圧Vの積で与えられるため、上
記構成のような回路としなくても、コンデンサ
C2の容量を増すこと、およびその充電電圧を高
めれば、その蓄積電荷従つて放電電荷の量は増
し、保持時間T1を長くすることは可能である。
Generally, the accumulated charge Q of a capacitor is given by the product of the capacitance C and the charging voltage V.
By increasing the capacity of C 2 and increasing its charging voltage, the amount of accumulated charge and discharged charge can be increased, and it is possible to lengthen the retention time T 1 .

しかしながら、コンデンサC2の容量を増すこ
とは大きなスペースを必要とするし、またAC一
次入力(VAC)通電時の第1の平滑出力V1、定電
圧出力V2の立上りを遅くし、演算制御部の始動
タイミングの点で問題がある。また、コンデンサ
C2の充電電圧を高めることは、直列制御トラン
ジスタTR2のエミツタ・コレクタ間電圧を増す
こととなり、放熱の点で問題であり、また電力損
失も多い。
However, increasing the capacitance of the capacitor C 2 requires a large space, and also slows down the rise of the first smoothed output V 1 and constant voltage output V 2 when the AC primary input (V AC ) is energized. There is a problem with the starting timing of the control unit. Also, capacitor
Increasing the charging voltage of C2 increases the emitter-collector voltage of the series control transistor TR2, which is a problem in terms of heat dissipation and also causes a large amount of power loss.

しかるに上記構成によれば、コンデンサC1
容量をそれ程大としなくてもその充電電圧を高め
ておけば、十分に大きな電荷を蓄えることがで
き、トランジスタTR1、抵抗R2で発生する熱
も、AC一次入力(VAC)しや断時の瞬間的に発
生するだけであるため大きな問題とならない。
However, according to the above configuration, even if the capacitance of the capacitor C1 is not so large, if the charging voltage is increased, a sufficiently large charge can be stored, and the heat generated by the transistor TR1 and the resistor R2 can be reduced. This is not a major problem because it only occurs momentarily when the AC primary input (V AC ) is interrupted.

また、この第1の平滑回路としては、多くの電
子装置の場合、入出力部の電源回路として既に保
有している平滑回路および平滑出力をもつて代用
することができる。
Furthermore, in the case of many electronic devices, a smoothing circuit and a smoothing output that are already available as a power supply circuit of an input/output section can be used as the first smoothing circuit.

以上説明したように、本発明によれば簡単な回
路を追加するだけで、AC一次入力しや断時にお
ける停電処理時の電源の供給回路として、大きな
効果を生み出すものである。
As explained above, according to the present invention, by simply adding a simple circuit, a large effect can be produced as a power supply circuit for processing a power outage when the primary AC input is cut off.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電源回路を用いた演算制御装置
の構成を示すブロツク図、第2図は本発明の一実
施例における電源回路の構成を示す結線図、第3
図はその動作を説明するためのタイミングチヤー
トである。 RC1,RC2……整流器、C1〜C2……コンデン
サ、TR1〜TR4……トランジスタ、R1〜R6
…抵抗、ZD1,ZD2……定電圧素子。
FIG. 1 is a block diagram showing the configuration of an arithmetic and control device using a conventional power supply circuit, FIG. 2 is a wiring diagram showing the configuration of a power supply circuit in an embodiment of the present invention, and FIG.
The figure is a timing chart for explaining its operation. RC1, RC2... Rectifier, C 1 to C 2 ... Capacitor, TR1 to TR4... Transistor, R 1 to R 6 ...
...Resistance, ZD 1 , ZD 2 ... Constant voltage element.

Claims (1)

【特許請求の範囲】[Claims] 1 交流入力電圧を変圧して取り出して入力する
それぞれ整流器及びコンデンサからなる第1、第
2の平滑回路と、この第2の平滑回路の出力を定
電圧化するための定電圧制御回路と、上記交流入
力電圧のしや断時に、上記第2の平滑回路の出力
電圧の低下を検出する検出回路と、この検出回路
の出力により動作し、上記交流入力電圧しや断時
に、上記第1の平滑回路のコンデンサの充電電荷
を電流とし、抵抗を介して上記第2の平滑回路の
出力に印加する印加手段とを備え、上記第1の平
滑回路の入力電圧を上記第2の平滑回路より高く
したことを特徴とする電源回路。
1. First and second smoothing circuits each consisting of a rectifier and a capacitor that transform and take out and input the AC input voltage, a constant voltage control circuit for making the output of the second smoothing circuit a constant voltage, and the above-mentioned a detection circuit that detects a drop in the output voltage of the second smoothing circuit when the AC input voltage is interrupted; and applying means for converting the charge in the capacitor of the circuit into a current and applying it to the output of the second smoothing circuit via a resistor, the input voltage of the first smoothing circuit being higher than that of the second smoothing circuit. A power supply circuit characterized by:
JP57001990A 1982-01-08 1982-01-08 Power source circuit Granted JPS58119732A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57001990A JPS58119732A (en) 1982-01-08 1982-01-08 Power source circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57001990A JPS58119732A (en) 1982-01-08 1982-01-08 Power source circuit

Publications (2)

Publication Number Publication Date
JPS58119732A JPS58119732A (en) 1983-07-16
JPH0320974B2 true JPH0320974B2 (en) 1991-03-20

Family

ID=11516909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57001990A Granted JPS58119732A (en) 1982-01-08 1982-01-08 Power source circuit

Country Status (1)

Country Link
JP (1) JPS58119732A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5572223A (en) * 1978-11-27 1980-05-30 Matsushita Electric Ind Co Ltd Power circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5572223A (en) * 1978-11-27 1980-05-30 Matsushita Electric Ind Co Ltd Power circuit

Also Published As

Publication number Publication date
JPS58119732A (en) 1983-07-16

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