JPH0787684A - Power failure compensation circuit for electronic equipment - Google Patents

Abstract

PURPOSE:To extend backup time by inputting the output of a generator for outputting pulses according to a commercial power supply frequency which is connected to the primary side of a power supply transformer in parallel, judging that power failed when a pulse period is abnormal, and then switching to a low power consumption operation. CONSTITUTION:A commercial power supply voltage is transformed to, for example, 10V and 5V by a transformer 1, is rectified by diodes 2 and 4, is smoothed by capacitors 3 an 5, and then is supplied to each load, a backup capacitor 9, and a CPU 8. The series circuit of a resistor 11, a diode 12, and a photocoupler 10 is connected to the primary side of the transformer 1 in parallel to generate pulses according to a power supply frequency. The output of the photo coupler 10 is inputted to the CPU 8 for monitoring the powersupply state. When power fails, the output of the photocoupler 10 is interrupted immediately and the CPU 8 switches the load side to a low power consumption operation, thus operating only a parallel required circuit of the CPU 8 according to the output of the capacitor 9 for backup and hence positively extending backup time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power failure compensating circuit for electronic equipment, and more particularly to a power failure compensating circuit for quickly detecting a power failure such as a commercial power source and backing up the electronic equipment for a long time.

[0002]

2. Description of the Related Art A conventional power supply circuit for electronic equipment is shown in FIG. (31) is a transformer for stepping down the commercial power supply to a desired voltage such as 12V or 5V. It has two windings on the secondary side, and diodes (32) (34) for current output from each winding. , Two types of DC voltage are output by the capacitors (33) and (35) that smooth the rectified voltage. One of the DC voltage of 5V is a constant voltage IC (37)
It is stabilized to 5V by the power supply, and is supplied as the power supply for the IC and other electronic circuits as well as the power supply for the CPU (38). Further, the power supply terminal Vcc of the CPU (38)
A backup capacitor (39) having a large capacity is connected in parallel with. On the other hand, the DC voltage of 12 V is supplied to the electronic circuit as it is or after passing through a constant voltage circuit (not shown), and is also supplied to the power failure detection circuit (36), and the detection output of the power failure detection circuit (36) is the CPU. (3
It is connected to the operation mode switching terminal MOD of 8).

The power failure detection circuit (36) is configured to output an H level if the input is higher than the set power failure detection voltage, and the CPU (38) has the switching terminal MO.
When the D input is at the H level, normal operation is performed, and when the L level is input, the CPU (38) changes from the normal operation to C
The operation of a part of the internal circuit of the PU (38) is suspended and the mode is switched to the low power consumption operation mode. In the above circuit, the regulated 5V is applied to the CPU (38) during energization.
At the same time as the voltage is supplied, the backup capacitor (39) is charged, and the power failure detection circuit (36) continues to input the H level to the CPU (38), so that the normal operation is performed.

On the other hand, when a power failure occurs, the CPU (38)
Starts to be supplied with power by the current discharged from the backup capacitor (39), not from the constant voltage IC (37). At this point, the voltage of the 12V line is higher than the power failure detection voltage Vd due to the action of the smoothing capacitor (33), and the CPU (38) continues the normal operation. Then, the discharge voltage from the smoothing capacitor (33) decreases,
When the power failure detection voltage becomes equal to or lower than Vd, the power failure detection circuit (36) changes its output from H to L, and the switching terminal MOD of the CPU (38).
Goes to the L level, and the CPU (38) switches to the low power consumption operation mode.

[0005]

However, in the conventional power failure compensating circuit, the smoothing capacitor (3) is used in order to reduce the fluctuation rate of the smoothed DC voltage and the ripple.
The discharge time constant of 3) is large, that is, the capacitor (3
It is usual to design the capacity of 3) to be large. For that reason,
After the power failure, the voltage of the 12V line dropped gradually, and it took a long time from the power failure to the detection of the power failure. Meanwhile CP
Since U (38) normally operates only with the current from the backup capacitor (39), as shown in the timing chart of FIG. 4, the power A is wasted, resulting in a shorter backup time. To back up for a long time, a large capacity backup capacitor was needed. SUMMARY OF THE INVENTION In order to solve the above problems, it is an object of the present invention to provide a power failure compensation circuit for an electronic device that quickly detects a power failure, switches the CPU to a low power consumption operation, and backs up for a long time.

[0006]

In order to achieve the above object, the present invention provides a pulse output device for outputting a pulse corresponding to the frequency of a power source in a power failure compensating circuit for electronic equipment connected to a power source via a power transformer. And a CPU connected to the secondary side of the power transformer, inputting the output of the pulse output device to the CPU, and switching the operation mode of the CPU according to the presence or absence of the output pulse. Is characterized by.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. (1) is a transformer that steps down the commercial power supply to a desired voltage such as 12V or 5V, and has two windings on the secondary side,
Diodes (2) for rectifying the output from each winding
Two types of DC voltage are output by (4) and the capacitors (3) and (5) that smooth the rectified voltage. One of the DC voltage, 5V, is stabilized to 5V by a constant voltage IC (7) and supplied as a power source for the IC and the like.
It is also supplied as a power source for the CPU (8). Also the CPU
A large-capacity backup capacitor (9) is connected in parallel to the power supply terminal Vcc of (8), and acts as a backup power supply of the CPU (8) at the time of power failure.
On the other hand, the DC voltage of 12 V is supplied to an electronic circuit or the like as it is or through a constant voltage circuit (not shown). In addition, a resistor (1
The input terminal of the photocoupler (10) acting as a pulse output device is connected in parallel via 1) and the diode (12), and the output terminal of the photocoupler (10) is the CPU (8). Is connected to the pulse measurement terminal CNT.

Next, the operation will be described. When an electronic device equipped with the circuit of the present invention is connected to a commercial power source, an AC voltage of 100 V at 60 Hz or 50 Hz is stepped down by a transformer (1), and a diode (2) (4) and a capacitor (3).
The predetermined DC voltage rectified and smoothed by (5) and the CPU
It is supplied to the electronic circuit including (8), and the electronic device operates normally. During the energization, the sine wave alternating current of 60 Hz or 50 Hz of the timing chart (a) shown in FIG. 2 is input to the primary side of the transformer (1), and the photo coupler (10) switches the diode (12). Therefore, only the positive voltage portion of the sine wave is input.

Therefore, as the output of the photocoupler (10), a rectangular wave pulse corresponding to the positive voltage portion is output as shown in the timing chart (b). The pulse period is 60
If the commercial power source of Hz is about 17 msec, 50H
If z, it will be about 20 msec. And the pulse is C
Input to the pulse measurement terminal CNT of PU (8), CPU
(8) It is internally determined whether or not it is within the above cycle. That is, after the rising edge t0 of the pulse is input,
The time until the next pulse rise t1 is input is measured, and it is determined whether or not the time is within the above cycle. The pulse has the above cycle (17 msec or 20 m
sec), the CP
U (8) determines that the power is being supplied, and when it is determined that it is out of the cycle, it is determined that the power is out. The C
The PU (8) switches to the low power consumption operation immediately when it is determined that there is a power failure.

More specifically, the rising edge t2 of the pulse shown in the timing chart (b) is the CPU (8).
The CPU (8) determines whether the time from the input to the CNT terminal of the above until the input of the rising edge t3 of the next pulse is within 20 msec. When a power failure occurs between t2 and t3, Vt and the pulse output of the photocoupler (10) are stopped. At the time of Vt, the CPU (8) is measuring for 20 msec and has not yet detected the power failure, and continues the normal operation by the power supply from the backup capacitor (9). If the power failure still continues even when the rising edge of the next pulse is input, the CPU (8) does not input the rising edge of the next pulse within 20 msec, so that the CPU (8) determines that there is a power failure and reduces Vd and low consumption. The operation is switched to the power operation, and only a part of the circuit of the CPU (8) is operated by the power supply from the backup capacitor (9).

Therefore, the wasted power consumption due to the normal operation of the CPU (8) between the occurrence of the power failure Vt and the detection of the power failure Vd is the portion of the power B shown in the timing chart (c), and the power B is at maximum. It can be suppressed by only one pulse cycle.

[0012]

As described above in detail, according to the present invention, in the power failure compensating circuit for electronic equipment, by generating a pulse corresponding to the frequency of the commercial power source and measuring the period of the pulse, Since it is configured to detect a power failure, even if the time from the occurrence of a power failure to the detection of a power failure is the longest, it can be shortened to within one cycle of the pulse. Therefore, the CPU can be quickly switched to the low power consumption operation and the useless normal operation is performed. By doing so, the power consumption is eliminated, so that the CPU can be backed up for a long time even with the backup capacitor having the same capacity as the conventional one.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a power failure compensation circuit according to an embodiment of the present invention.

FIG. 2 is a timing chart of the circuit of FIG. 1 during energization and power failure.

FIG. 3 is a circuit diagram showing a power failure compensation circuit according to a conventional technique.

4 is a timing chart of the circuit of FIG. 3 during energization and power failure.

[Explanation of symbols]

 1 transformer 8 CPU 9 backup capacitor 10 photo coupler (pulse output device)

Claims (1)

[Claims] 1. A pulse output device for outputting a pulse according to the frequency of the power supply in a power failure compensation circuit of an electronic device connected to the power supply via the power transformer, and a CPU connected to the secondary side of the power transformer. An electronic equipment power failure compensating circuit, comprising: an output of the pulse output device to the CPU, and switching the operation mode of the CPU according to the presence or absence of the output pulse.