JPH03207138A - Clock path switching system - Google Patents

Clock path switching system

Info

Publication number
JPH03207138A
JPH03207138A JP2001925A JP192590A JPH03207138A JP H03207138 A JPH03207138 A JP H03207138A JP 2001925 A JP2001925 A JP 2001925A JP 192590 A JP192590 A JP 192590A JP H03207138 A JPH03207138 A JP H03207138A
Authority
JP
Japan
Prior art keywords
clock
node
transmission line
clockwise
counterclockwise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001925A
Other languages
Japanese (ja)
Inventor
Takayuki Taniguchi
谷口 孝之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2001925A priority Critical patent/JPH03207138A/en
Publication of JPH03207138A publication Critical patent/JPH03207138A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0641Change of the master or reference, e.g. take-over or failure of the master

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To secure a communication between nodes by sending out the free- running output of a clock oscillator which oscillates by itself in a normal direction by a subordinate node which is sited between two fault points and receives a clock sent back in the opposite direction from the normal direction. CONSTITUTION:A node B generates a clock signal of the same frequency with a received clock CK1 from a main node A through a clockwise transmission line 1R in subordinate synchronism with the clock CK1 and sends the clock signal out to a next node C through a clockwise transmission line 1S. If a clockwise transmission line to a next node D, however, is faulty and disconnected, the node C sends the received clock CK1 back to a counterclockwise transmission line 2S in the opposite direction from the normal direction and disconnects the faulty point. When the counterclockwise transmission line 2S is faulty and disconnected, the node D at a reception terminal oscillates a signal of the same frequency as the oscillation frequency before the node C disconnects the clockwise transmission line 2S by itself and sends its free-running output to the clockwise transmission line 1S while supplying the clock to its multiplexing device MX to serve as a main node temporarily. Consequently, the communication between the nodes C and D is secured.

Description

【発明の詳細な説明】 〔概要〕 クロックの基準発振器を持つ主ノードAからリング状に
配置された複数ノードの各多重化装置MXのために右回
りと左回りの2重化した伝送路を持ち該伝送路の受信ク
ロックの障害時に該障害の検出信号による送信側への転
送機能と該障害個所を切離す機能とを有する複数の従属
ノードB,C,Dから威るリングネットワークに間し、 リングネットワークのクロックが右回りの1個所と左回
りの他の1個所で障害となった2重障害時に、2mの障
害点に挟まれた従属ノードC,Dの間にクロックパスの
閉ループが発生するのを防止し該ノードC,Dの間の通
信が確保されるクロックパス切替方弐を目的とし、 各従属ノードに、受信したクロックを通常と反対方向に
折返して障害個所を切離した時には切離前の発振周波数
と殆ど同じ周波数の信号を多重化装置MXのクロックと
して自己発振するクロック発振器PLOを備え、リング
ネットワークのクロックが右回りの1個所と左回りの他
の1個所で障害となった場合に、2個所の障害点に挟ま
れ通常と反対方向に折返されたクロノクを受信した従属
ノードDが自己発振したクロック発振器PLOの自走出
力を通常方向に送出するように構或する。
[Detailed Description of the Invention] [Summary] A clockwise and counterclockwise duplex transmission line is provided for each multiplexer MX of a plurality of nodes arranged in a ring from a main node A having a clock reference oscillator. It is connected to a ring network that is connected to a plurality of subordinate nodes B, C, and D, and has a function of transmitting a detection signal of the failure to the transmitting side and a function of isolating the failure point when there is a failure in the receiving clock of the transmission line. , In the case of a double failure in which the ring network clock has a failure at one clockwise location and another counterclockwise location, a closed loop of the clock path is created between dependent nodes C and D sandwiched between the 2m failure point. For the purpose of clock path switching method 2 that prevents this from occurring and ensures communication between nodes C and D, the received clock is returned to each dependent node in the opposite direction to the normal direction and the fault is isolated. It is equipped with a clock oscillator PLO that self-oscillates a signal with almost the same frequency as the oscillation frequency before disconnection as the clock of the multiplexer MX, and the clock oscillator PLO is equipped with a clock oscillator PLO that self-oscillates as the clock of the multiplexer MX. In this case, the dependent node D, which received the clock that was sandwiched between two failure points and returned in the opposite direction to the normal direction, sends out the free-running output of the self-oscillated clock oscillator PLO in the normal direction. .

〔産業上の利用分野〕[Industrial application field]

本発明はディジタルハイ7ラーキに準じて主ノード門と
複数の従属ノードS,−S,がリング状に配置された例
えば光通信のリングネットワークに係り、特に各従属ノ
ードにおける多重化装置門×のために右回りと左回りを
現用系と予備系とし2重化した伝送路を持つ場合、光信
号の送受信部のみを2重化し多重化装置MXは1個の場
合の、現用系クロックパスと予備系クロックパスとのバ
ス切替方式に関する。
The present invention relates to, for example, an optical communication ring network in which a main node gate and a plurality of subordinate nodes S, -S are arranged in a ring according to the Digital High 7 Rarch. Therefore, if you have a duplex transmission line with the clockwise and counterclockwise sections as the working system and the backup system, the working system clock path and This article relates to a bus switching method with a backup clock path.

〔従来の技術〕[Conventional technology]

従来のリングネットワークは、第4図の如く、主ノード
門と複数の従属ノードSr’−’S .がリング状に配
置され、第5図の如く、主ノードHのマスタOSCのク
ロックが多重化装1iMXに供給され、各従属ノードS
,−S,の同期用クロックとして右回り(実線)のクロ
ックCK,と左回り(点線)のクロノクCK,の両クロ
ックを各従属ノードSt”−hに順に供給し、各従属ノ
ードは自ノードの引込発振器PLOaで主ノード阿から
の基準クロックCK,またはCK.の周波数に従属同期
する様になっている。
As shown in FIG. 4, a conventional ring network has a main node and a plurality of subordinate nodes Sr'-'S. are arranged in a ring shape, and as shown in FIG. 5, the clock of the master OSC of the main node H is supplied to the multiplexer 1iMX, and each subordinate node S
, -S, are sequentially supplied with clockwise (solid line) clock CK and counterclockwise (dotted line) clock CK to each subordinate node St"-h, and each subordinate node is connected to its own node. The lead-in oscillator PLOa is synchronized to the frequency of the reference clock CK or CK from the main node A.

そしてリングネットワークの各従属ノードにおいて、例
えば右回りクロックパスCK,を現用系として、現用系
クロックパスCK,の障害時に、左回りの予備系クロッ
クパスCK2に切り替える従来のクロックパス切替方式
の各従属ノードは、第6図の如く、現用系の受信器OR
+が受信した右回りの現用系クロックCK,の障害時に
、該現用系クロックCK,から予備系の受信器OR.の
受信した左回りの予備系クロックCK2に切り替える受
信用スイッチS−8と、多重化装置眩への送信信号のク
ロックを、右回りの現用系の送信器OS.へ送出してい
る状態から、その障害時に、左回りの予備系の送信器O
S2へ送出する状態に切り替える送信用スイッチS++
,とで構或される右回り/左回り切替盤S一によって、
現用系クロックCK.のバスと予備系クロックCK,の
パス切替が行われていた。
Then, in each dependent node of the ring network, each dependent of the conventional clock path switching method uses, for example, the clockwise clock path CK as the active system, and switches to the counterclockwise protection clock path CK2 when the active system clock path CK fails. As shown in Fig. 6, the node is the receiver OR of the working system.
When the clockwise working clock CK, received by OR. The receiving switch S-8 switches the received counterclockwise backup system clock CK2 to the clockwise clockwise active transmitter OS. If a failure occurs, the counterclockwise standby transmitter O
Transmission switch S++ to switch to the state of sending to S2
, and the clockwise/counterclockwise switching board S1,
Current system clock CK. Path switching between the bus and the standby clock CK was being performed.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

第5図の従来のクロツクバス切替方式は、単純に右回り
クロックCK,と左回りクロック(J2の何れか一方が
障害となった場合を考えたが、第7図のように、右回り
クロンクCK.が従属ノードCと従属ノードBの間■で
障害となり、左回りクロックCK2が従属ノードDと主
ノードAの間[2]で障害となった場合を考えると、各
障害点で伝送路を折り返すため、障害点[1][2]に
挟まれた従属ノードCと従属ノードDの間に、クロック
パスの閉ループが発生し、その従属ノードC,Dの間の
クロック同期が外れる事によって通信が断となるという
問題が起きる。本発明の課題は、主ノードAからリング
状に配置され複数ノードのクロック同期のために右回り
と左回りに2重化した伝送路を持ち該伝送路の受信クロ
ックの障害検出と検出信号による送信側への転送機能と
、伝送路の障害時に該検出信号により障害個所を切離す
機能とを有する複数の従属ノードB,C.Dから成るリ
ングネットワークにおいて、リングネノトワークのクロ
ックパスが右回りの1個所と左回りの他の1個所で障害
となった場合に、2個の障害点に挟まれた従属ノードC
,Dの間にクロツクバスの閉ループが発生するのを防止
し該従属ノードC,Dの間の通信が確保されるようなク
ロックパス切替方弐の提供にある。
The conventional clock bus switching method shown in FIG. . becomes a fault between dependent node C and subordinate node B, and counterclockwise clock CK2 becomes a fault between subordinate node D and main node A [2]. Because of this loopback, a closed loop of the clock path occurs between the dependent nodes C and D sandwiched between the failure points [1] and [2], and the clock synchronization between the dependent nodes C and D is lost, resulting in communication failure. The problem of this invention is to have a transmission line arranged in a ring from the main node A and duplicated clockwise and counterclockwise in order to synchronize the clocks of multiple nodes. In a ring network consisting of a plurality of dependent nodes B, CD, which has a function of detecting a fault in the received clock and transferring the detection signal to the transmitting side, and a function of isolating the faulty part using the detection signal when there is a fault in the transmission path, When the clock path of the ring network becomes a failure at one point in the clockwise direction and another point in the counterclockwise direction, a subordinate node C sandwiched between the two failure points
, D, thereby preventing the occurrence of a closed loop on the clock bus between the subordinate nodes C and D, and ensuring communication between the subordinate nodes C and D.

(課題を解決するための手段〕 この課題は、第1図の如く、リングネントヮークの主ノ
ードAからのクロンクに自局のクロックを従属同期させ
る各従属ノードB,C,Dに、通常は、ノード8の如く
、受信した例えば右回りクロックCK,に従属同期して
発振した従属出力を右回り伝送路の次ノードCに順に送
出するが、ノードCの如く、次ノードへの右回り伝送路
■が障害の時は、ノードDへの送信データを通常と反対
の左回り伝送路で次ノードDに折返して障害のを切離し
、折返された左回りのクロックCK,を受信する次ノー
ドDは、その先の左回りの伝送路■が障害の時は該障害
■を切離し、該切離の前の発振周波数と殆ど同じ周波数
の信号を高い安定度で自己発振するクロノク発振器(P
LO) 1を備え、リング不,トワークの右回りの1個
所■と左回りの他の1個所[2]でクロンクの伝送路が
障害となった2重障害の場合に、2個の障害点[1][
2]に挟まれたノードの一端のノードCが通常の右回り
の受信クロックCK,を反対の左回り伝送路2Sに折返
し、該折返された左回りクロンクCK,を受信する他端
の従属ノードDが左回り伝送路2Sの切離の前の発振周
波数と殆ど同じ周波数の信号を自己発振するクロック発
振器PLOの自走出力を通常の右回り伝送路に送出する
ようにした本発明によって解決される。
(Means for Solving the Problem) As shown in Fig. 1, this problem is solved by having each subordinate node B, C, and D synchronize their own clocks with the clock from the main node A of the ringtone network. , like node 8, sequentially sends out the dependent outputs oscillated in slave synchronization with the received clockwise clock CK, to the next node C on the clockwise transmission path. When transmission line ■ has a failure, the data sent to node D is looped back to the next node D via the counterclockwise transmission line opposite to the normal one, isolating the fault, and the next node receives the looped back counterclockwise clock CK. D is a chronograph oscillator (P) that disconnects the counterclockwise transmission line ■ when there is a failure, and self-oscillates with high stability a signal with almost the same frequency as the oscillation frequency before the disconnection.
LO) 1, and in the case of a double failure in which the Cronk transmission line becomes a failure at one point in the clockwise direction of the network [2] and another point in the counterclockwise direction [2], there are two points of failure. [1] [
2], the node C at one end of the node sandwiched between the nodes returns the normal clockwise clock CK to the opposite counterclockwise transmission line 2S, and the dependent node at the other end receives the looped counterclockwise clock CK. This problem is solved by the present invention, in which D sends out the free-running output of a clock oscillator PLO that self-oscillates a signal with almost the same frequency as the oscillation frequency before disconnection of the counterclockwise transmission line 2S to the normal clockwise transmission line. Ru.

本発明のクロックパス切替方式の基本構戒を示す第1図
の原理図において、 1は、リングネットワークの各従属ノードB,C,Dに
設けられる多重化装置MXのためのクロック発振器PL
Oであって、通常は、ノードBの如く、主ノードAから
の例えば右回り伝送路IRで受信したクロックCKIに
従属同期し同じ周波数のクロック信号を発生し自局の多
重化装置MXに供給し、右回り伝送路の次ノードCに順
に従属信号を送出するが、ノードCの如く、次ノードへ
の右回り伝送路■が障害で断の時は、受信したクロック
CK.を通常と反対方向の左回り伝送路2Sに折返して
障害個所■を切離す。そして左回り伝送路2Sに折返さ
れたクロックCK,を受信する左回りの次ノードDは、
その先の左回り伝送路■が障害で断の場合は、ノードC
が右回り伝送路2Sの切離前の発振周波数CK.と殆ど
同じ周波数の信号を自己発振し、自局の多重化装置MX
にクロンクとして供給すると同時に、通常の右回り伝送
路1Sに送出するように構戒する。
In the principle diagram of FIG. 1 showing the basic structure of the clock path switching method of the present invention, 1 is a clock oscillator PL for the multiplexer MX provided at each subordinate node B, C, D of the ring network.
Normally, a node B, such as a node B, generates a clock signal of the same frequency in synchronization with the clock CKI received from the main node A, for example, on a clockwise transmission path IR, and supplies it to the multiplexer MX of its own station. Then, the dependent signals are sent to the next node C on the clockwise transmission path in order. However, when the clockwise transmission path 2 to the next node is disconnected due to a failure, as in the case of node C, the received clock CK. is looped back to the counterclockwise transmission line 2S in the opposite direction to the normal direction, and the faulty point (■) is isolated. The next node D in the counterclockwise direction receives the clock CK, which is returned to the counterclockwise transmission path 2S.
If the counterclockwise transmission line ■ ahead is disconnected due to a failure, node C
is the oscillation frequency CK. of the clockwise transmission line 2S before disconnection. It self-oscillates a signal with almost the same frequency as the multiplexer MX of its own station.
At the same time, it is arranged to supply the signal to the clock as a clock and at the same time send it to the normal clockwise transmission line 1S.

〔作用〕[Effect]

本発明のクロック発振器1のPLOは、リングネットワ
ークの各従属ノードB, C, Dに設けられ、その出
力が各多重化装置MXの送信クロックとなるが、ノード
Bでは主ノードAからの右回り伝送路IRで受信したク
ロックCK,に従属同期し同じ周波数のクロ・7ク信号
を発生し、従属出力を右回り伝送路Isの次ノードCに
送出する。然しながらノードCでは、同じ右回り伝送路
1SO次ノードDへの伝送路のが障害で断となっている
ので、受信したクロックCK,を通常と反対方向の左回
り伝送路2Sに折返して障害個所のを切離す。そして左
回り伝送路2Sに折返されたクロックCK,を受信する
端のノードDが、その先の左回り伝送路2Sの一個所■
が障害で断となっているので、障害個所■からも切り離
される。そしてノードDは、ノードCが右回り伝送路2
Sを切離す前の、通常に主ノード^からの右回り伝送路
IRの受信クロックCK,に従属同期して発振した周波
数と殆ど同じ周波数の信号を高い安定度で自己発振し、
自局の多重化装置MXにクロックとして供給すると同時
に、その出力の自走出力を右回り伝送路1Sに送出して
一時的に主ノードの役目をする。したがって、本発明の
クロックパス切替方式は、リングネットワークの右回り
の一個所ので右回りクロックCK,が障害となり他の個
所[2]で左回りクロックC)hが障害となった2重障
害の場合に、2個の障害点[1][2]に挟まれた従属
ノードC,Dの、一端の従属ノードDが、そのクロック
発振器1の自走出力を自局の多重化装置MXにクロック
として供給すると同時に、右回り伝送路に送出する主ノ
ードの役目をするので、従属ノードC,Dの間にクロッ
クパスの閉ループが発生するのが防止され該ノードC,
Dの間の通信が確保されるので問題は解決される。
The PLO of the clock oscillator 1 of the present invention is provided at each subordinate node B, C, D of the ring network, and its output becomes the transmission clock of each multiplexer MX. It slave-synchronizes with the clock CK received on the transmission line IR, generates a clock signal of the same frequency, and sends the slave output to the next node C on the clockwise transmission line Is. However, at node C, the transmission line from the same clockwise transmission line 1SO to the next node D is disconnected due to a fault, so the received clock CK is looped back to the counterclockwise transmission line 2S in the opposite direction to the normal direction and is routed to the faulty point. to separate the Then, the node D at the end that receives the clock CK, which is returned to the counterclockwise transmission line 2S, is located at one point in the counterclockwise transmission line 2S beyond that.
Since it is disconnected due to the failure, it is also separated from the failure point ■. Then, node D is connected to clockwise transmission path 2.
Self-oscillates with high stability a signal of almost the same frequency as the frequency normally oscillated in slave synchronization with the reception clock CK of the clockwise transmission line IR from the main node ^ before disconnecting S.
It supplies the multiplexer MX of its own station as a clock, and at the same time sends its free-running output to the clockwise transmission line 1S, temporarily serving as a main node. Therefore, the clock path switching method of the present invention can prevent a double failure in which the clockwise clock CK is a failure at one point in the clockwise direction of the ring network and the counterclockwise clock C) is a failure at another point [2]. In this case, the dependent node D at one end of the dependent nodes C and D sandwiched between the two failure points [1] and [2] clocks the free-running output of its clock oscillator 1 to the multiplexer MX of its own station. At the same time, it serves as the main node that sends data to the clockwise transmission path, so that a closed loop of the clock path is prevented from occurring between the subordinate nodes C and D.
Since communication between D is ensured, the problem is solved.

〔実施例〕〔Example〕

第2図は本発明の実施例のクロツクバス切替方式の従属
ノードDの構威を示すブロック図であって、第3図はそ
の動作を説明するためのタイムチャートである。
FIG. 2 is a block diagram showing the structure of the subordinate node D of the clock bus switching system according to the embodiment of the present invention, and FIG. 3 is a time chart for explaining its operation.

第2図のブロック図において、従属ノードDのクロック
発振器1のPLOは、通常は、現用の受信器OR,が右
回り伝送路IRから受信した現用系クロックCK,を、
受信用スイッチSW*を介し分離装置DMUXを介して
、ゲートNANDで、予備の受信器OR,が左回り伝送
路2Rから受信した予備系クロンクCK2が無いことを
確認したのち、現用系クロックCK1に従属同期して発
振する。そしてクロック発振器PLOの出力の従属出力
を多重装置MUXを介し送信用スイソチSUSを介し現
用の送信器OS,から右回り伝送路1Sへ送出する。
In the block diagram of FIG. 2, the PLO of the clock oscillator 1 of the dependent node D normally uses the working system clock CK, which the working receiver OR, receives from the clockwise transmission path IR.
After confirming that there is no backup system clock CK2 received from the counterclockwise transmission line 2R by the backup receiver OR, using the gate NAND via the reception switch SW* and the separation device DMUX, the clock CK1 is transferred to the active system clock CK1. Oscillates in slave synchronization. Then, a dependent output of the output of the clock oscillator PLO is sent to the clockwise transmission line 1S from the current transmitter OS via the transmission switch SUS via the multiplexer MUX.

そして前位ノードCから現用の受信器OR,への右回り
伝送路IRで障害のが起きて現用系クロノクCK,の入
力が断となり、予備の送信器OS,から予備系クロンク
CKtを送出する左回り伝送路2Sで障害■が起きて予
備系クロノクCK,の出力が断となった2重障害の場合
、現用の受信器OR,の出力のクロックCK.は、第3
図のタイムチャートの(1)NG 1の如く時点t1で
断となり、前位ノードCへの返送情報は(2)SEND
Iの如く時点t2で返送される。
Then, a failure occurs in the clockwise transmission path IR from the previous node C to the active receiver OR, and the input of the active system clock CK is cut off, and the backup system clock CKt is sent from the backup transmitter OS. In the case of a double failure in which a failure (2) occurs in the counterclockwise transmission line 2S and the output of the backup system clock CK, is cut off, the clock CK. is the third
As shown in (1) NG 1 in the time chart in the figure, it is disconnected at time t1, and the information returned to the previous node C is (2) SEND
It is returned at time t2 as shown in I.

すると左回り伝送B2Rから予備の受信器ORgへ入力
する通常の予備系クロックCKtが、前位ノードCにて
右回り伝送路IRから左回り伝送路2Sに折返された現
用系クロックCK,に時点t,で変わり、予備の受信器
OR.の出力は(3)NG 2の如く、時点t3で予備
系クロックCK2から現用系クロックCL に変わる。
Then, the normal backup clock CKt input from the counterclockwise transmission B2R to the backup receiver ORg becomes the working clock CK, which was turned back from the clockwise transmission path IR to the counterclockwise transmission path 2S at the previous node C. t, and the spare receiver OR. As shown in (3)NG2, the output changes from the backup system clock CK2 to the active system clock CL at time t3.

すると予備の受信器OR,から出力され受信用スイッチ
SWIIを介し分離装IDMυXを介してゲートAND
に入力する一方の入力情報は(4)従属用クロ・7クの
如く、現用系クロックCK,と予備系クロツクCK.が
連続するが、もう一つの入力の、予備の受信器OR,の
出力NG 2と現用の受信器OR,の出力NG L 前
位ノードCへの返送情報SEND 1の論理積をとり反
転するゲー} NANDの出力が、(5)NAND出力
の如く、N,G 2の予備系クロックCKzから現用系
クロノクCX,に変わる時点t,にて“H”から“L″
に変化するので、(6)AND出力のPLO従属用クロ
ックの通常の現用系クロックCK,は時点t3に断とな
る,そしてそれまで現用系クロックCK+ に従属して
発振していたクロック発振器PLOは、(7)送信クロ
ックの如く、前記の時点t3から自己発振してその自走
出力を多重装置M[IXを介し送信用スイッチS6を介
し現用の送信器OS,から右回り伝送路1Sへ送出する
Then, it is output from the spare receiver OR, and is sent to the gate AND via the receiving switch SWII and the isolation device IDMυX.
One of the input information that is input to (4) slave clock 7 is the active system clock CK, and the backup system clock CK. are continuous, but the other input is the output NG of the backup receiver OR, the output NG of the current receiver OR, the output NG L of the return information to the previous node C. } Like (5) NAND output, the NAND output changes from "H" to "L" at the time t when it changes from the backup system clock CKz of N, G 2 to the active system clock CX.
(6) The normal active system clock CK, which is the PLO dependent clock of the AND output, is cut off at time t3, and the clock oscillator PLO, which had been oscillating in dependence on the active system clock CK+, is cut off at time t3. , (7) Like the transmission clock, it self-oscillates from the above-mentioned time point t3 and sends its free-running output from the current transmitter OS to the clockwise transmission line 1S via the multiplexer M[IX and the transmission switch S6. do.

したがって、第2図の本発明の実施例のクロックパス切
替方式は、リングネットワークの右回り伝送路1s−I
Rの一個所■で右回りクロックCLが障害となり左回り
伝送路2S−2Hの他の個所[2]で左回りクロックC
K,が障害となった2重障害の場合に、2個の障害点[
1][2]に挟まれた従属ノードC,Dの、一端の従属
ノードDが、そのクロンク発振器1の自走出力CKを自
局の多重化装置MXにクロックとして供給すると同時に
、右回り伝送路1Sに送出する主ノードの役目をするの
で、従属ノードC,Dの間にクロックパスの閉ループが
発生するのが防止され該ノードC,Dの間の通信が確保
されるので問題は無い。
Therefore, the clock path switching method according to the embodiment of the present invention shown in FIG.
The clockwise clock CL becomes a failure at one point ■ of R, and the counterclockwise clock C fails at another point [2] of the counterclockwise transmission line 2S-2H.
In the case of double failure where K, becomes a failure, two failure points [
1] The subordinate node D at one end of the subordinate nodes C and D sandwiched between [2] supplies the free-running output CK of the Cronk oscillator 1 as a clock to the multiplexer MX of its own station, and at the same time performs clockwise transmission. Since it serves as the main node for sending data to the path 1S, the generation of a closed clock path loop between the subordinate nodes C and D is prevented and communication between the nodes C and D is ensured, so there is no problem.

〔発明の効果〕〔Effect of the invention〕

以上説明した如く、本発明によれば、伝送路が現用系と
予備系で2重化されたリングネットワークにおいて、現
用系と予備系の両系とも障害となる2重障害時にも、該
障害点に挟まれたノード間の通信が維持されるので、リ
ングネットワークの通信の信頼度を向上する効果が得ら
れる。
As explained above, according to the present invention, in a ring network in which the transmission path is duplicated in the working system and the protection system, even in the event of a double failure in which both the working system and the protection system fail, the failure point Since communication between nodes sandwiched between nodes is maintained, the reliability of communication in the ring network can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明のクロックパス切替方式の基本構戒を示
す原理図、 第2図は本発明の実施例のクロックパス切替方式のノー
ドOの構戒を示すブロック図、第3図は本発明の実施例
の動作を説明するためのタイムチャート、 第4図は従来のリングネットワークのブロック図、 第5図は従来のクロンクパス切替方式のプロック図、 第6図は従来のリングネットワークの従属ノードのブロ
ック図、 第7図は従来のクロックパス切替方式のブロック図であ
る。 図において、1はクロツク発振器、Is, IRは右回
り伝送路、2S,2Rは左回り伝送路である。 L3 i宛8月の実於汐}の拳力作を吉ヒ8月するためのタイ
ム干?一ト第 3 図 ビLOo− づ1△発浪器 征釆のリンク゛守、,トワークの従属ノードのプロ,,
,ク図第6 図 征釆のクロックパスt刀晋方式のフ゛口・・ノフ図第7
FIG. 1 is a principle diagram showing the basic structure of the clock path switching method of the present invention. FIG. 2 is a block diagram showing the structure of node O in the clock path switching method of the embodiment of the present invention. A time chart for explaining the operation of the embodiment of the invention, FIG. 4 is a block diagram of a conventional ring network, FIG. 5 is a block diagram of a conventional Cronk path switching method, and FIG. 6 is a subordinate node of a conventional ring network. FIG. 7 is a block diagram of a conventional clock path switching system. In the figure, 1 is a clock oscillator, Is and IR are clockwise transmission lines, and 2S and 2R are counterclockwise transmission lines. L3 Is it time to make a successful August masterpiece by Shio Shio in August? 1st Figure 3 BiLOo- Zu1△Protect the link of the vagrant, , Pro of the dependent node of the network,,
, Figure 6 Figure 6: Clock path of the control system, front diagram of the Toshin method Figure 7
figure

Claims (1)

【特許請求の範囲】  クロックの基準発振器を持つ主ノード(A)から伝送
路でリング状に配置された複数ノード(B、C、D)の
各多重化装置(MX)のために前記伝送路を右回りと左
回りの2重化とし該伝送路の受信クロックの障害時に該
障害の検出信号による送信側への転送機能と該障害個所
を切離す機能とを有する複数の従属ノード(B、C、D
)から成るリングネットワークにおいて、 各従属ノードに、受信したクロックを通常と反対方向に
折返して障害個所を切離した時には切離前の発振周波数
と殆ど同じ周波数の信号を多重化装置MXのクロックと
して自己発振するクロック発振器(1)を備え、 リングネットワークのクロックが右回り伝送路(1S、
1R)の1個所[1]と左回り伝送路(2S、2R)の
他の1個所[2]で障害となった2重障害の場合、2個
の障害点[1][2]に挟まれたノードの一端の従属ノ
ード(C)が受信クロックを通常と反対方向に折返し、
他端の従属ノード(D)が前記折返された通常と反対方
向のクロックを受信して自己発振したクロック発振器(
1)の自走出力を通常方向(1S)に送出することを特
徴としたクロックパス切替方式。
[Claims] For each multiplexer (MX) of a plurality of nodes (B, C, D) arranged in a ring on a transmission line from a main node (A) having a reference clock oscillator, the transmission line A plurality of dependent nodes (B, C, D
) In a ring network consisting of It is equipped with a clock oscillator (1) that oscillates, and the clock of the ring network is connected to the clockwise transmission path (1S,
In the case of a double failure in one point [1] of 1R) and another point [2] of the counterclockwise transmission line (2S, 2R), the fault occurs between the two failure points [1] and [2]. The subordinate node (C) at one end of the received node returns the received clock in the opposite direction,
The dependent node (D) at the other end receives the folded clock in the opposite direction to the normal clock and generates a self-oscillated clock oscillator (
A clock path switching method characterized by sending out the free-running output of 1) in the normal direction (1S).
JP2001925A 1990-01-09 1990-01-09 Clock path switching system Pending JPH03207138A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001925A JPH03207138A (en) 1990-01-09 1990-01-09 Clock path switching system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001925A JPH03207138A (en) 1990-01-09 1990-01-09 Clock path switching system

Publications (1)

Publication Number Publication Date
JPH03207138A true JPH03207138A (en) 1991-09-10

Family

ID=11515177

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001925A Pending JPH03207138A (en) 1990-01-09 1990-01-09 Clock path switching system

Country Status (1)

Country Link
JP (1) JPH03207138A (en)

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