JP2636936B2 - Clock path configuration method in duplex ring network - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary of the Invention] Regarding a clock path configuration method in a duplex ring network, generation of a node without a clock due to isolation and generation of a loop between nodes when switching between a working system and a protection system are prevented. A ring network configured with a clock rate in line with the standard digital hierarchy and intended to maintain transmission / reception by reliably supplying a clock to each node even in the event of a failure, and positioned as part of a synchronous network In the clock path configuration method in
A switch that switches the clock in the ring to the clock from the detour system is provided to connect the detour transmission line, and even in the event of a double fault in the ring, a synchronization clock is supplied from the detour system into the ring to prevent the occurrence of isolated nodes. Configure to be possible.

[Industrial Application Field] The present invention relates to a clock path configuration / switching method in a ring network.

The transmission path of a LAN (Local Area Network) is ring-shaped in order to improve reliability and the like, and many of the transmission lines have a duplex configuration in anticipation of a failure. All nodes operate in synchronization with the clock generated at the master station in the ring.

The form of configuring a loop-type network for each management area is increasing for users who construct a private communication network,
Since the private communication network is a wide area network, there are forms such as connection with the core transmission equipment, connection with other communication equipment (NTT high-speed digital line, digital micro, etc.) from inside the loop, and connection between loops by different companies. I have.

The present invention relates to a clock path configuration method in such a duplicated ring network.

[Conventional technology]

Fig. 13 shows the outline of the LAN configuration. M is a master node, S1 to SN are slave nodes, solid arrows connecting these nodes indicate working transmission lines, and dotted arrows indicate protection transmission lines. The master station M generates a clock, and each node obtains a clock by extracting a clock component included in data transmitted from an adjacent node. Thus, each node operates in synchronization with the clock of the master node.

When a failure occurs in the transmission line, switching is performed as shown in FIG. That is, when a failure occurs in the active system as shown in (a), the system is switched to the standby system and the clock is supplied through the path of M → S3 → S2 → S1. As shown in (b), when the standby system is faulty and the active system is healthy, switching is not performed. As shown in (c), when a failure occurs in both systems at the active side of the master station, a clock is supplied by the standby system. If the active system and the standby system fail at a distance from each other as shown in (d), clocks are supplied by the active system and the standby system. However, the node S2 cannot receive the clock supply from any system and becomes isolated, and Communication is not possible because synchronization is not achieved.

FIG. 15 shows a configuration example of a wide area LAN to be connected to other communication equipment. This is a ring network adopting a hierarchy and a frame configuration based on the concept of the conventional private communication network. 10, 20 are ring networks,
The frequency is 6M for the former and 32M for the latter. 12 is 100M or 4
00M optical line, 14 is 32M optical line, μ is micro line, D
μ is a digital micro line, MPLX is a multiplexer,
16 is an NTT high-speed digital line.

As shown in FIG. 16, the transmission path of the ring network is duplicated. There is a working system between the nodes M and S3, and there is a "" passing through the nodes M, S1 and S2 as a standby system.
There is an active system between nodes M, S3, and S2.
There is a reserve '' through M, S1. Although not shown, the working system and the protection system (right-handed / left-handed transmission lines) are connected to all other nodes.
Therefore, the transmission path is duplicated, and consideration is made so that communication between nodes is not interrupted as much as possible even if a transmission path failure occurs.

The spare transmission line in FIG. 16 is not a physical object such as an optical fiber or a radio line, but a handling group (HG) using 6CH as one unit. Each node constituting the ring network communicates leftward / rightward in units of HG, and all nodes operate in synchronization with the same clock. The clock path within the ring is shown in FIG.

As shown in FIG. 17, station M is the master oscillator in the ring.
It has an OSC, and has a transmission line interface board MX for interfacing with an adjacent node, and sends out a signal to the transmission line based on a clock supplied by the master oscillator OSC. In the node S3, the interface panel MX uses the node M
The clock component included in the transmission path is extracted, and the clock is reproduced by the oscillator PLO including the PLL. The clock reproduced by the PLO is synchronized with the clock of the node M, and the node S3 sends out a signal from the interface board MX for the node S2 using this clock. The same applies to the nodes S2 and S1, whereby all nodes in the ring transmit / receive data in synchronization with the clock of the master node M. In the event of a transmission line failure, the switch SW is switched as shown in FIG. 18, and the subordinate of the clock is changed from the N side to the E side. Thus, clock transmission is performed using the standby system, and clock synchronization in the ring is maintained.

[Problems to be solved by the invention]

In a simple working / standby duplex system, an isolated node S2 occurs in the case of a dual system failure as shown in FIG. 14 (d), and this isolated node S2 cannot communicate.

Further, the switch SW is switched due to the transmission path failure, and the clock path switching is performed. The trigger of the switch switching operation is usually a clock cutoff. That is, focusing on the node S3 in FIG. 18, the failure of the transmission path from M → S3 causes the interface
The MX input is turned off, and the extracted clock is turned off. With this clock interruption, the switch SW of the node S3 switches from the N side to the E side. However, even if a failure occurs between MS and S3, the PLO of node S3
The normal state is maintained between S3 and S2 by the generated clock
In S2, the clock SW does not occur, so that the switch SW is not switched and remains on the N side. This state is shown in FIG.

In the state of FIG. 19, PLO of node S3, MX transmission of S3,
2 MX receive, S2 PLO, S2 MX transmit, S3 MX receive, S3 PL
There is a problem that a loop called O is generated, and oscillation occurs, so that synchronization within the ring cannot be maintained.

The present invention prevents the occurrence of a node without a clock due to isolation and the occurrence of a loop between nodes at the time of switching between the active system and the standby system, and reliably supplies a clock to each node even in the event of a failure to maintain transmission / reception. It is intended to do so.

[Means for solving the problem]

In the present invention, as shown in FIG. 1, the provided bypass route 30 for supplying a clock, and a switch SW _C for switching the clock in the ring to the clock from the bypass system.

The node provided with the detour system and the changeover switch may be one arbitrary slave node, but may be provided in a plurality of frame nodes so as to cope with triple, quadruple, failure, and the like.

The detour system clock needs to be synchronized with the clock output by the master node M, but the LAN is not configured as a part of the synchronization network, and operates on its own clock by forming a closed loop by itself. Therefore, in order to apply the present invention to a LAN, it is necessary to set the clock rate in accordance with the digital hierarchy of the CCITT recommendation in order to position the LAN as a part of the synchronous network. In this sense, the ring network that is the object of the present invention is not a LAN, but a WAN (Wide Area Network).
k) or MAN.

In the present invention, as shown in FIG. 1 (b), in order to prevent the occurrence of a loop between nodes, when a clock loss is detected on the node side, it is transferred to a downstream node. The transfer of the clock interruption (failure information) is performed by using the empty bits in the frame format and by giving a specific pattern to the bits in the frame format.

[Action]

As shown in FIG. 1 (a), if a clock is supplied to the nodes S2 and S3 that become isolated due to the failure of the working system and the standby system through another alternate route, the isolation of these nodes is prevented, and Transmission / reception can be connected.

Also, as shown in FIG. 1 (b), when a clock loss is detected, it is transferred to the next node, and if a switch is switched, the occurrence of a loop between nodes can be prevented. For example, the slave node S3 that detects the clock disconnection in FIG. 19 notifies the slave node S2 of the disconnection, and the switch SW
Is switched from N side to E side, PLO, MX of S3, MX of S2,
No loop of MX, SW, and PLO of SW, PLO, MX, and S3 is configured, and both nodes S2 and S3 can be switched to the standby system.

〔Example〕

FIG. 2 shows clock paths in various states. (A) is a normal state, in which the clock is supplied in the active system as shown by the thick line, and is counterclockwise from the master station M. The master station M and the slave stations S1, S2,... Have the same configuration, and include a switch SW _C for the clock sources CLK ₁ and CLK ₂ , a duplicated PLO, and a switch for the output. Clock CLK ₁ to select the master station M is in the loop clock.

FIGS. 2 (b) to 2 (d) show the above state, and in case 1 (b), it is assumed that a failure has occurred in the working system at the illustrated position. In this case, the input side of node S2 downstream from the point of failure
The clock loss is detected by HGAIS, and the switch SW is switched from the N side to the E side. As a result node S3, S2 will be the clock CLK ₁ from the master station through the standby system is supplied. Slave station S1 is in as before, is supplied with the clock CLK ₁ through the current system.

In case 2 of FIG. 2 (c), a failure has occurred for the slave station S3 in both the active system and the standby system. In this case, the node S3 with the proviso that both systems fault switches the switch SW _C to another detour system side, the clock thereto CLK ₂ from another bypass system. The clock CLK ₂ is synchronized with CLK _1, the node S3
Can continue sending / receiving at this clock. Nodes S1, S2
Is the same as normal, using the clock CLK ₁ from the master station M.

In case 3 of FIG. 2D, a failure has occurred in the active system and the standby system at the same position to the left of the slave station S3. In this case, switching the active system disorders, node S3 on condition that the backup system normally a switch SW from the N side to the N side, the node S3 are to receive the clock CLK ₁ the master station M through the protection system. Nodes S1 and S2 are the same as in the normal state.

As shown in FIG. 3, the ring network includes RNW ₁ , RNW ₂ ,
...... a plurality of time configured through the line L ₃ connecting these slave node and another bypass system. The master nodes M of the ring networks RNW ₁ and RNW ₂ are also connected to the slave nodes S3 and S2 of the ring network RNW ₁ through the lines L ₁ and L ₂ , so that these ring networks RNW _{1 to} RNW ₃ are connected to the ring network RNW ₁ Operates in synchronization with the clock of the master node M. Slave node S1 is isolated failure in the working and standby systems in the ring network RNW ₂ is generated, S1 and S2 are isolated, if ...... like that by enabling another bypass system L _3, RNW All _two nodes can communicate.

In FIG. 3, the master station M of the ring network RNW ₁
Has a clock source with rubidium (Rb), cesium (Cs), etc., and supplies the entire system clock. A plurality of ring networks are also connected to the ring networks RNW ₂ and RNW ₃ , respectively, and may form a tree as a whole. Another bypass system L ₃ are those connecting the appropriate node of these RNW.

HGATS is a transmission path fault signal output by the interface MX. HGAIS of each input side MX of working system and standby system
If the input MX of the active system generates HGAIS and the standby MX does not generate HGAIS, the switching of FIG. 2B is performed, and the input MX of the active system and the input MX of the standby system both generate HGAIS. If this occurs, the switching shown in FIG. 2 (c) is performed, and the other conditions are the same.

If the clock path is switched due to a failure, there may be cases where transmission or reception of data is hindered. However, if this is not done, transmission / reception will be completely impossible due to the clock interruption.

As means for notifying the downstream node of the clock interruption, a separate transmission path may be provided. However, this increases the cost because a separate transmission path is provided.

As the above-mentioned means, it is conceivable to use the transfer of the alarm ALM. Communication between nodes is performed in handling group (HG) units, and has ALM transfer in HG units. Since ALM called HGAIS is transferred in all HGs in the interface board MX, it is distributed to all nodes as failure information. However, HGAIS cannot be detected unless the line is down.

To explain this with reference to FIG. 4, when a failure occurs at the position shown in the figure, the node S3 detects a clock interruption and switches the switch SW from the N side to the E side. However, since there is no opposition to the node M on the down line of the node S2, HGAIS cannot be detected, and the switch of the node S2 forms a loop until the N side. HGAIS cannot be detected unless there is a dropped line across the faulted section.

Even if the line is down, the transfer may be caused by the occurrence of a failure outside the ring, and it cannot be distinguished from HGAIS in which a failure occurs in the ring.

Furthermore, HGAIS also occurs during line setup, but of course this should not be switched. There are various disadvantages in the method using HGAIS.

As a means for notifying the downstream node of the clock interruption, it is effective to define a signal bit for switching. The nodes in the ring are based on traditional hierarchy and frame configurations (32M,
6M, 1.5M). Since there are extra bits in the frame, by defining these bits as bits of the switching signal, the clock paths of all nodes in the ring can be switched without any trouble. This is shown in FIG.

In FIG. 5 (Embodiment 2 of the present invention), when a failure occurs in the illustrated position of the working system, the input side MX of the node S3 detects the clock loss, and in response, the switch SW is switched and the output is output.
MX sends the switching signal CSEL. At the next node S2,
MX detects CSEL, switches switch SW, and outputs
Have MX send CSEL. Similarly, the downstream nodes are successively switched from the active system to the standby system. Switching signal CS
EL is sent to the master station M last, but the master station
Does not send.

FIG. 6 shows another embodiment, in which there is a wireless device or another ring (6M ring) in the ring. Since the bit rate of the radio is low, 32M is reduced to 6M, and divided and transmitted. The switching device CSEL detects by the incoming DMUX and sends it out by the outgoing MX. Since there is no empty bit in this MX, the SEND bit
The switching signal CSEL is transmitted by setting a specific code such as 1/0 alternation. Of course, SEND detection has protection,
SEND is not detected. CSEL transfer is based on TSI (Time Slot Inter
change). HW indicates a highway.

FIG. 7 shows an example of CSEL transfer in a 6M ring. If a failure occurs in the working system at the position shown in the figure, the incoming MX of the node S3 detects the clock loss, switches the switch SW, and outputs the MX.
Sends CSEL. In response, the next node S3 performs the same operation. The master station M only detects the CSEL and does not perform switch switching or CSEL transmission. The switching signal CSEL uses the SEND bit, and is set to CSEL in a 1010 or 0101 pattern, and set to SUND in 1111.

Fig. 8 shows the switching operation when connecting to other equipment (NTT network).
When a failure 1 occurs at the illustrated position, the node S1 detects this and sends out a switching signal CSEL, and the nodes S1, S2, M 'are switched to the standby system, and M' becomes the master. Obstacle 2 at position shown
Occurs, the master node M detects this, and the switching signal
CSEL is transmitted, whereby all nodes are switched to the standby system, and M 'becomes the master. Nodes M and M 'do not perform transfer when receiving CSEL.

FIG. 9 shows the path of the switching signal CSEL. Is between 32M light, is between MX3 "", is MX2
These are paths of surplus bits between "", and any of these can be defined as switching signals. The same applies to 1.5M. The following table summarizes the switching signal paths.

FIG. 10 shows a 32M frame configuration. There are six multis, and frames 1 to 6 are repeated. One third frame has 64 units of G, 1, 2,... 63, and each unit has 5 digits, for a total of 320 digits. When the G pulse of each frame is extracted, the G pulse train is as shown in the figure. All five G pulses of the first frame are defined as the frame synchronization pulse FSP, and three of the G pulses of the third to sixth frames are designated by stuffing. (S) Defined as a pulse. 1 H ₁ to H ₉ G-pulses of each two and the sixth frame of the G pulses of the second to fifth frames are auxiliary (H) pulses, of which H ₁ is used as the low-order switching signal ( when transmitting "1", during non-transmission "0"), H ₃ is had as the inter-station information (when transmitting "1", during non-transmission "0"), since such H ₅ to H ₉ is empty , Can be used as a switching signal CSEL.

Note that the “variable time slot” in the figure indicates the insertion position of the S pulse, and is used for SYS-12G frames and 1G units.
V ₁ , SYS-2 3G frame, V ₂ ... In the 1G unit are insertion positions. Since it is 32M, there are 5 systems of 6M, but SYS-
1, -2,... Indicate the first system, the second system,.

FIG. 11 shows a 6M frame configuration. Time slot TS
Are 99 blocks, each of which is a block, and thus there are 6 blocks. There are 16 HGs and their status (ST) is TS97
And enter 98. The frame F has 5 bits such as 1100D, and its SEND bit S can be defined as a switching signal. Usually, this is all 1, but this is used as a switching signal CSEL in a 1/0 alternating pattern, for example. In this figure, D is a bit that becomes "0" when the data link is not used and "1" when it is used, C is a CRC bit, and Y is fixed to "1" in reserve.

FIG. 12 shows a 1.5M frame configuration. There are 25 TS, TS
24 contains the status. Frame pulse F is FP, C
RC and D, and this D is set to a pattern other than all 1 and is used as a switching signal CSEL. D is set to "0" when the data link is not used, and all "1" at the time of SEND ALM.

When a clock signal is cut off, the node that detects the unused signal in the frame format or a switching signal configured by giving a specific pattern to the bit in the frame format is transmitted to the downstream node, and the HGAI
Clock paths can be reliably switched without any problems, such as the case of using S, which cannot be detected unless there is a dropped line, HGAIS that indicates a failure outside the ring or HGAIS that occurred during line setting, etc. This can contribute to high reliability of the network.

〔The invention's effect〕

As described above, according to the present invention, an isolated node that may occur in the event of a double failure can be relieved by providing a bypass route and supplying a clock from the bypass route. By preventing a loop between nodes that may be generated by switching, clock synchronization can be stably maintained even in the event of a transmission line failure, and effects such as contributing to high network reliability can be obtained.

[Brief description of the drawings]

FIG. 1 is a principle diagram of the present invention, FIG. 2 is an explanatory diagram of a clock path switching device, FIG. 3 is an explanatory diagram of a detour system, FIG. 4 is an explanatory diagram in a case where HGAIS is used for switching, FIG. Is an explanatory diagram in the case of using the switching signal CSEL, FIG. 6 is an explanatory diagram of an example 1 of a transfer path of the switching signal, FIG. 7 is an explanatory diagram of an example 2 of a transfer route of the switching signal, and FIG. FIG. 9 is an explanatory diagram of an example 4 of a transfer path of a switching signal, FIG. 10 is an explanatory diagram of a 32M frame configuration, FIG. 11 is an explanatory diagram of a 6M frame configuration, FIG. 12 is an explanatory diagram of a 1.5M frame configuration, FIG. 13 is an explanatory diagram of a LAN configuration, FIG. 14 is an explanatory diagram of active / standby switching, FIG. 15 is an explanatory diagram of a wide area LAN configuration, FIG. Is an explanatory diagram of the ring network duplication, FIG. 17 is an explanatory diagram of the clock path in the ring, FIG. 18 is an explanatory diagram of the working / standby switching operation, and FIG. It is explanatory drawing which shows the state of a part. M is the master node in Figure 1, S1, S2, ...... is Suremunodo, 30 bypass route, SW _C is switched switch.

Claims (1)

(57) [Claims] A clock path configuration method in a duplicated ring network of a synchronous network in which a duplicated ring network and another network are connected, wherein the clock path is connected to the duplicated ring network. Terminal has a switch (SWc) capable of selecting the clock of the other network, and a terminal connected to the duplex ring network, when the clock cannot be received. A clock from the other network is selected and input by the switch (SWc).