JPH0320558U - - Google Patents

Info

Publication number
JPH0320558U
JPH0320558U JP8081089U JP8081089U JPH0320558U JP H0320558 U JPH0320558 U JP H0320558U JP 8081089 U JP8081089 U JP 8081089U JP 8081089 U JP8081089 U JP 8081089U JP H0320558 U JPH0320558 U JP H0320558U
Authority
JP
Japan
Prior art keywords
bit rate
circuit
latch circuits
bits
shift register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8081089U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8081089U priority Critical patent/JPH0320558U/ja
Publication of JPH0320558U publication Critical patent/JPH0320558U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Time-Division Multiplex Systems (AREA)
JP8081089U 1989-07-11 1989-07-11 Pending JPH0320558U (US07223432-20070529-C00017.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8081089U JPH0320558U (US07223432-20070529-C00017.png) 1989-07-11 1989-07-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8081089U JPH0320558U (US07223432-20070529-C00017.png) 1989-07-11 1989-07-11

Publications (1)

Publication Number Publication Date
JPH0320558U true JPH0320558U (US07223432-20070529-C00017.png) 1991-02-28

Family

ID=31626192

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8081089U Pending JPH0320558U (US07223432-20070529-C00017.png) 1989-07-11 1989-07-11

Country Status (1)

Country Link
JP (1) JPH0320558U (US07223432-20070529-C00017.png)

Similar Documents

Publication Publication Date Title
JPH02141135U (US07223432-20070529-C00017.png)
EP0903885A3 (en) Clock recovery circuit
JPH0320558U (US07223432-20070529-C00017.png)
JPH0221941U (US07223432-20070529-C00017.png)
JPH028248U (US07223432-20070529-C00017.png)
JPH0381334B2 (US07223432-20070529-C00017.png)
JPS6413826U (US07223432-20070529-C00017.png)
JPH0681133B2 (ja) クロツク非同期デ−タ検出方式
JPH0227826A (ja) フレーム構成分解用集積回路
JPH01124729U (US07223432-20070529-C00017.png)
JPS62129841U (US07223432-20070529-C00017.png)
JPS6420718A (en) Pulse width modulation circuit
JPS6264048U (US07223432-20070529-C00017.png)
JPS61128841U (US07223432-20070529-C00017.png)
SU1566476A2 (ru) Цифровой фазовый модул тор
JPH0221942U (US07223432-20070529-C00017.png)
JPS5811357U (ja) 出力回路
JPS62138379U (US07223432-20070529-C00017.png)
JPH02120933U (US07223432-20070529-C00017.png)
JPS58164336U (ja) パルス列変換回路
JPS6286740U (US07223432-20070529-C00017.png)
JPH0238838U (US07223432-20070529-C00017.png)
JPH0226823U (US07223432-20070529-C00017.png)
JPS57207457A (en) Sc bit superimposing system
JPH0831836B2 (ja) スタツフ多重受信回路