JPH03202369A - Optical printer device - Google Patents

Abstract

PURPOSE:To execute multi-gradation light emitting element drive control using a simple circuit even in the application of a high speed printer by inhibiting a succeeding data from being inputted when each image data has been inputted into each serial shift resister, and turning on each light emitting element for a period corresponding to logical values in an internal state stored in the seial shift register in response to a clock signal of required frequency. CONSTITUTION:A conjunction output of a second serial signal CLK2 and a synchronizing signal SYNC is determined and inputted into a parallel/serial converter P/S103 and second AND-gate Gb. When a set signal is generated, a transfer clock CLK2 is inhibited from being inputted into a LED head 100. Only when an ENABLE signal is HIGH, a clock signal CLK3 is fed to the LED head 100. And when data are transferred, the clock signal CLK2 is outputted to be supplied to the LED head 100 and when the LED is turned on, the clock signal CLK3 is outputted to be supplied to the head 100.

Description

Detailed Description of the Invention [Industrial Field of Application] The present invention is an optical printhead that has an optical print head formed by arranging a plurality of light emitting elements, and that transfers an image by controlling the current flowing to each light emitting element. The present invention relates to a printer device, and more particularly to an optical printer device for multi-gradation printing that is capable of high-speed printing and has a simple circuit configuration and control.

[Prior art]

Recently, many optical printer devices have been developed that perform image processing by arranging a large number of minute LEDs (light emitting diodes) and emitting light from the required LEDs corresponding to the density of the original image to expose the photoreceptor. ing.

Since this optical printer device has a small number of mechanical forward scanning parts, it can print extremely quickly and quietly, and has come to be widely used as a printing means for facsimile machines and computer terminals.

For example, as shown in FIG. 5, the image forming section of the optical printer device includes a photoreceptor drum 500 whose surface is covered with a photoreceptor material.
A charger 501 is provided around the photoreceptor drum 500 to uniformly charge the surface of the photoreceptor drum 500, and the surface of the photoreceptor drum 500 charged by the charger 501 is exposed to light according to image information to generate an electrostatic latent. Printer head 502 that forms an image
, a developer 503 that visualizes the electrostatic latent image formed by the gutter 502 on the printer, an eraser 504 that removes the residual charge on the photoreceptor drum 500 after the transfer process, and an eraser 504 that removes the residual charge on the photoreceptor surface after the transfer process. A transfer paper conveyance path is formed in contact with one surface (transfer section) of the photosensitive drum 500, and a large number of transfer papers are stored at one end of this path. The paper feed cassette 506 (506a is a paper feed roller for feeding transfer paper sheet by sheet from the paper feed cassette 506) transfers the transfer paper fed by the paper feed roller 506a to the transfer unit at a predetermined timing. A registration roller 508 that sends the image to the transfer paper, a transfer device 509 that transfers the image onto the transfer paper in the transfer section, a fixing device 510 that fixes the transferred image on the transfer paper, and the fixing device 510
an ejection tray 50 to which the transfer paper after image fixation is ejected;
7 are provided respectively.

In the above configuration, the operation thereof will be explained. The photosensitive drum 500 rotates in the direction of the arrow in the drawing, and the LED of the printer head 502 is turned on by a signal derived from a document image reading means (not shown), and is charged. An electrostatic latent image is formed on the surface of the processed photoreceptor drum 500.

This latent image is made into a visible image by adhering toner in the next developing device 503, and then transferred to the paper feeding cassette by a transfer device 509.
The image is transferred onto the transfer paper conveyed from the gutter 506.

The transfer paper onto which the toner image has been transferred is heated and fixed by a fixing device 510, and then guided to a paper discharge tray 507. On the other hand, the surface charge of the photosensitive drum that has completed the transfer is removed by an eraser 504, residual toner is removed by a cleaner 505, and the drum is uniformly charged by a charger 501 for forming the next latent image.

By the way, when using an optical printer head in which a large number of LEDs are arranged as the printer head 502 as in this example,
The LED is turned on or off in response to a binary digital image signal, and in order to accurately reproduce the intermediate density of an image, a dither method has been commonly used.

The dither method is to divide a document image into a fine matrix using a dither matrix as shown in FIG. The photoreceptor is irradiated with light to produce white or black, and intermediate density gradations are expressed by a collection of minute dots.The number of black dots is changed according to the density of each pixel. This realizes multi-level tone expression.

However, when such a dither method is used, if the number of matrix dots is small, the resolution decreases and it becomes difficult to reproduce a clear image.

Conventionally, therefore, a method has been proposed in which the brightness of each light emitting element is modulated at 2n gradations for an n-bit digital image signal to express the light and shade of each pixel.

For example, Japanese Patent Application Laid-Open No. 59-127467 describes a method for modulating the brightness as described above, in which when driving a light emitting element, the value of a resistor inserted in series with each light emitting element is switched to control the drive current to the light emitting element. However, a multi-gradation printing driving means based on so-called dynamic lighting control of light emitting elements is described, which controls the exposure intensity to the photoreceptor by controlling the luminance of light emitted from the photoreceptor.

Furthermore, Japanese Patent Laid-Open No. 60-64870 similarly proposes a method for controlling the lighting time of a light emitting element according to image density as a dynamic lighting control means for a light emitting element. means for varying the control pulse width of the LED drive driver for driving each of the plurality of light emitting elements, a gate circuit for controlling the lighting time of the light emitting elements, a data selector for selecting the light emitting element to be lit;
A lighting time control signal generating section that controls the gate circuit to generate a signal for varying the light emitting time, and a gate circuit that takes the logical product of the lighting time control signal and the lighting light emitting element selection signal are adopted. The lighting time of the light emitting element is varied based on the results of determining the original image density in several stages.

[Problem to be solved by the invention]

However, all of the above conventional means have the problem that the circuits are complicated and it is difficult to reduce the cost of the device itself.

In other words, the first conventional example requires as many light emitting element drive circuits as the number of gradations to be expressed, so as the number of gradations increases, the circuit becomes more complex and there are problems with processing speed. In order to apply it to a high-speed printer, it is necessary to have a more complicated circuit configuration.

Furthermore, in the second conventional example, in order to achieve a high-speed printer, it is necessary to add a lighting time control signal generating section to all of the light emitting elements, so when the number of light emitting elements or light emitting element blocks increases, Accordingly, the circuit configuration becomes more complicated.

The present invention has been made in view of the above, and aims to realize multi-gradation light emitting element drive control that can be easily reduced in cost with an extremely simple circuit configuration even when applied to high-speed printers. purpose.

[Means to solve the problem]

In order to achieve the above object, the present invention provides an optical printer device that has an optical print head formed by arranging a plurality of light emitting elements and transfers an image by controlling the current flowing to each light emitting element. In an optical printer device capable of expressing an image density of 2n gradations in response to an n-bit digital image signal representing a pixel, the decoder converts the n-bit image data into 2n-bit image data and corresponds to the light emitting element. and a control means for controlling input of the 2n bit image data to the serial shift register, and when each image data is input to each serial shift register, The present invention provides an optical printer device that prohibits the input of image data and lights up each light emitting element for a time corresponding to the logical value of the internal state stored in the serial shift register using a clock signal of a required frequency. .

Another object of the present invention is to provide an optical printer device in which the frequency of the clock signal generated for lighting the light emitting element can be changed according to the logical value of the internal state of the serial shift register.

[Effect]

According to the present invention, the optical printer device prohibits the input of the next image data when each image data is input to each serial shift register, and also prevents the input of the next image data by a clock signal of a required frequency. Each light emitting element is turned on for a time corresponding to the logical value of the state.

Furthermore, the frequency of the clock signal is changed to arbitrarily adjust the lighting time of the light emitting element.

〔Example〕

Embodiments of the present invention will be described in detail below based on the drawings.

FIG. 1A is a circuit diagram showing an embodiment of the LED head drive control section of the optical printer device according to the present invention.

In the figure, reference numeral 101 is an image memory M that stores image data composed of 2 focuses per pixel, and 2-bit image data D, , D, synchronous with clock CLK1 are stored.
is output to the 2-line/4-line decoder DC102,
The signal converted into 4 lines externally is transmitted to parallel/serial converter P/S 103.

The output S of this parallel/serial converter P/S 103
. LIT is input to the LED head (HEAD) 100, and this point will be described later.

In addition to the above configuration, three AND gates G1, G,
, G, an OR gate G, and a NAND gate G. 2 clock signal CL
The AND output of K2 and the synchronization signal 5YNC is calculated, and the above parallel/serial converter P/S 103 and the second AND
It is input to gate G.

The second AND gate Gb is a set control gate for LED headline data, and in addition to the above signals, a set signal S
ET is input, and its output becomes one input of the OR gate Gc, and when a set signal is generated, input of the transfer lock CLK2 to the LED head 100 is prohibited.

The third AND gate Gd is an LED lighting time control gate, and outputs an AND signal of the clock CLK3 and the ENABLE signal to the OR gate Gc,
Clock signal CLK3 is supplied to the LED head 100 only when the E signal is HIGH.

The OR gate G is a gate that controls the first and second clock signals CLKI and CLK2, and depending on the generation timing of the set signal SET and the ENABLE signal, the clock signal CLK2 becomes low or low during data transfer.
When the ED lights up, a clock signal CLK3 is outputted and supplied to the LED head 100.

The fifth NAND gate G0 is a logical inversion gate of the ENABLE signal, and is input to each of the shift register control AND gates in the LED head.

Next, the internal configuration of the LED head 100 will be explained.

In FIG. 1, S, -S are the same number of light emitting elements L1 to L.
, the signal from the OR gate Gc is given as a clock signal to each of the 4-bit shift registers 104 provided correspondingly to Through the above 4-bit parallel/serial converter P/S 103
The output S. ut has been input.

Further, the outputs of the previous shift registers are sequentially supplied to the other input terminals of the AND gates G, , G, , and the 4-bit output of each shift register 104 is connected to the 4-input OR. Gates G, 1 to G9. The same number of A
ND gate G1. ~GhlI, and its output is further supplied to the light emitting element LI''L- via the LED drivers D, ~D, and LED drive current limiting resistors -1 to R.

At this time, the ENABLE signal is supplied to the other input terminal of the AND gates ch+ to GhlI, and when this signal is )(ICH), the LED drivers D, to D, are turned off.
N and is configured to light up the light emitting elements L1 to L.

The operation of the above configuration will be described in detail with reference to FIG. 1B and the timing chart shown in FIG. 2.

The symbols in FIG. 2 are the same as those in FIG. 1, and the horizontal axis indicates the passage of time.

5YNC (Figure 2 (a)) is a synchronizing signal for parallel/serial conversion of image data, and its HIGH level width is four times (1/4 in frequency) that of data transfer lock signal CLK2.
).

When 5YNC is at HIC, H level, a clock signal CLK2 is output from the AND gate G (FIG. 2 (c)), and this clock causes the 4-bit serial image data S to be output from the parallel/serial converter P/S 103. . u
At the same time that t is output to the first AND gate G,1 of the LED head 100 (FIG. 2(C)), the image transfer lock signal CLK2 is outputted to each shift via the AND gate Gb and OR gate Gc. The data for one pixel is inputted to the registers S1 to S, and while the image synchronization signal 5YNC becomes HIGH, data for one pixel is sequentially input and transferred from the shift registers S to S in accordance with the clock signal CLK2.

Image signal S output at this time. The order of U starts with the data L for the last shift register S, and finally the data L1 of the shift register S1 is output, completing the scanning of -lines.

In this state, that is, when data for all of the light emitting elements L1 to L is output, the SET signal is not generated.
e)) During this period, no data is output to the LED head using the clock signal CLK2.

Furthermore, the ENABLE signal is output at the timing of lighting one line of the LED head, and is erased when the SET signal is reset (Fig. 2 (e), (f)).
.

Furthermore, the clock signal CLK3 is supplied to each shift register 104 of the LED head 100 when the ENABLE signal is at HIGH level, and the clock signal CLK3 is supplied to each shift register 104 of the LED head 100.
The lighting time of the LED light emitting element is controlled according to the recording state set to 04.

That is, the above 4-pin parallel/serial converter P/S
From 103, one pulse is output to any one of the four bits between the maximum value and minimum value (MSB, LSB) corresponding to the image density, so it is determined which bit of each shift register is selected. Depending on the position of the pulse, the lighting time of the light emitting element controlled by the input of the clock signal pulse differs. Therefore, Figure 2 (b) and (
i) The lighting time of the light emitting element is shorter in (c).

This part will be explained in more detail using FIG. 1B.

A 2-bit digital signal (
2" = 44 gradations D+, Do is output to the 2-line/4-line decoder DC102, and the 4-line (
rloooJ, "0100", "0OIOJ, rooo
The converted signal is sent to a parallel/serial converter P.
/S 103, the above data is taken into the shift register 104 as serial data, and each
shifted twice. The shifted data passes through an OR gate and the width of each pulse is determined.

The lighting time of the light emitting element is controlled based on the determined pulse width. That is, as shown in the figure, "1000
" is one pulse width, "0100" is two pulse widths,
"roolo" is three pulse widths, and "roool" is four pulse widths. The larger the pulse width is, the longer the lighting time of the light emitting element becomes.

As described above, the present invention is characterized in that the exposure time of the photoreceptor is increased or decreased by controlling the lighting time of the light emitting elements, thereby expressing the intermediate gradation of the transferred image.

Incidentally, in the above embodiment, a case of four gradations is shown, but it goes without saying that image transfer of three gradations or five or more gradations is also possible using a similar method.

Furthermore, it is also possible to use the conventional dither method in combination with the above method, and even more precise multi-gradation expression can be realized.

Next, a second embodiment of the present invention will be described.

FIG. 3 is a circuit diagram showing a second embodiment of the present invention, and FIG. 4 is a tie shorting chart for explaining its operation.

Incidentally, since the main parts of this embodiment are almost the same as those in FIGS. 1 and 2 described above, only the different parts will be explained.

In FIG. 3, the difference from FIG. 1 is the clock generation circuit 300 which allows the clock signal CLK3 to be switched to a certain frequency, and the rest is the same as in FIG. 1.

Also, in FIG. 4, (a) to (i) are the same as in FIG. 2, and only (j) to (1) are different.

A clock generation circuit 300 in FIG. 3 is a clock signal generation circuit for controlling a shift register when an LED light emitting element is turned on, and generates the above-mentioned clock signal CLK3 using 3-bit clock control signals C0CLKI to C0CLK3 from a main control section (not shown). It is characterized by changing the frequency.

Since the specific configuration of the circuit portion can be fully realized using existing technology, a detailed explanation thereof will be omitted, but for example,
The frequency division ratio of the variable frequency divider may be changed using the 3-bit control signal.

As described above, the operation when changing the frequency of the clock signal is as shown in U) to (1) in FIG. 4, for example, considering the case where the frequency of the clock signal CLK3 is halved. Since the time that is shifted when the LED is turned on is doubled, the time that the LED is turned on is also doubled. The degree of change at this time is not limited to doubling, but can be set arbitrarily; if more detailed changes are required, increase the supplied clock frequency and set the division ratio in small increments. That's fine.

With this configuration, the lighting time of the light emitting element can be arbitrarily adjusted, so that, for example, when the luminance of the light emitting element such as an LED decreases due to aging,
It is possible to compensate for the decrease in the amount of light emitted by increasing the lighting time.

Such correction is effective in compensating for not only characteristic deterioration of the light emitting element but also characteristic changes of the photoreceptor or other peripheral devices.

〔Effect of the invention〕

As explained above, the optical printer device according to the present invention has the following features:
2′ corresponding to an n-bit digital image signal representing one pixel.
In an optical printer device that can express gradation image density,
a decoder for converting the n-bit image data into 27-bit image data; and 2 decoders provided corresponding to the light emitting elements.
The apparatus includes an n-bit serial shift register and a control means for controlling input of the 2n-bit image data to the serial shift register, and when each image data is input to each serial shift register, the control means controls the input of the next image data. In addition to prohibiting input, the clock signal of the required frequency lights up the light emitting elements for a time corresponding to the logical value of the internal state stored in the serial shift register, even when applied to a high-speed printer. With an extremely simple circuit configuration, it is possible to realize multi-gradation light emitting element drive control that is easy to reduce costs.

[Brief explanation of drawings]

FIG. 1A is a circuit diagram showing the structure of an optical printer device according to the present invention, FIG. 1B is a partial explanatory diagram of FIG. 1A, and FIG. 2(a)
~(i) is a timing chart explaining the operation of the above embodiment, FIG. 3 is a circuit diagram showing a second embodiment of the present invention, and FIGS. 4(a) to (1) are a timing chart for explaining the operation of the above embodiment. FIG. 5 is a side sectional view showing an example of the main part configuration of an optical printer, and FIG. 6 is an explanatory diagram showing an example of a dither matrix in the dither method. Description of symbols 100 ---, LED head 1, 01-11 --- Image memory 102 --- Decoder 103 --- Parallel/serial converter 104
------Shift register 300-----Clock generation circuit CLKI, LK2. CLK3 --- Clock signal 5
ET-...-Set signal G,, Gb, Ga Gt+~G1, G1~G knee・-
AND gate Gc, G, ~G, 1---OR gate G, --
-N A N D gate L1 to LII・----L E D Fig. B

Claims (2)

[Claims] (1) An optical printer device that has an optical print head formed by arranging a plurality of light emitting elements and transfers an image by controlling the current flowing to each light emitting element, and has an n-bit digital image signal representing one pixel. In an optical printer device capable of expressing an image density of 2^n gradations corresponding to the above, a decoder for converting the n-bit image data into 2^n-bit image data, and a decoder provided corresponding to the light emitting element. The apparatus includes a 2^n-bit serial shift register and a control circuit that controls input of the 2^n-bit image data to the serial shift register, and when each image data is input to each serial shift register, the next An optical printer device characterized in that input of image data is prohibited, and each light emitting element is turned on for a time corresponding to a logical value of an internal state stored in the serial shift register using a clock signal of a required frequency. . (2) The optical printer device according to claim 1, wherein the frequency of the clock signal generated for lighting the light emitting element can be changed according to a logical value of an internal state of the serial shift register.