JPH03196622A - Reactive ion etching device - Google Patents

Reactive ion etching device

Info

Publication number
JPH03196622A
JPH03196622A JP33964089A JP33964089A JPH03196622A JP H03196622 A JPH03196622 A JP H03196622A JP 33964089 A JP33964089 A JP 33964089A JP 33964089 A JP33964089 A JP 33964089A JP H03196622 A JPH03196622 A JP H03196622A
Authority
JP
Japan
Prior art keywords
etching
film thickness
film
etched
function section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33964089A
Other languages
Japanese (ja)
Inventor
Ken Kobayashi
研 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP33964089A priority Critical patent/JPH03196622A/en
Publication of JPH03196622A publication Critical patent/JPH03196622A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve the uniformity between a thick film and a wafer by adding a film thickness measuring function part, an operating function part, and an operation control part and interlocking them so as to measure the etching rate of the film to be etched and calculate the etching time automatically and continuously. CONSTITUTION:A wafer is loaded on an etching function part, and pilot etching is performed under the conditions that the residual film thickness surely becomes thicker than the film thickness D1 that one want to leave finally, and first and second PSG film 32 and 33 are etched by the thickness DELTAd0. Next, residual film thickness 360' is measured, and by an operating function part, pilot-etched film thickness DELTAd0 is calculated, and using the etching rate calculated from the DELTAd0 and the etching time, the etching time required for etching the difference between the residual film thickness d0' measured in advance and the film thickness that one wants to leave finally, that is, additional etching film thickness DELTAd1 is calculated. This way, the etching time is decided by confirming the thickness of the film to be etched and the etching rate this way, so the uniformity of the film thickness can be realized efficiently.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は反応性イオンエツチング装置に関し、特に膜厚
測定機能を有する反応性イオンエツチング装置に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a reactive ion etching apparatus, and more particularly to a reactive ion etching apparatus having a film thickness measurement function.

〔従来の技術〕[Conventional technology]

従来の反応性イオンエツチング装置は、膜厚測定機能が
設けられていないため、エツチングは固定時間で行なわ
れていた。そのため、エツチング条件として被エツチン
グ膜とその下地の材料層とのエツチングレートの比を充
分大きくとれるように設定するか、あるいはエツチング
条件に合わせ乞 て製造プロセス奈設計する等の手法が用いられていた。
Conventional reactive ion etching equipment is not equipped with a film thickness measurement function, so etching is performed for a fixed time. For this reason, methods have been used, such as setting etching conditions such that the etching rate ratio between the film to be etched and the underlying material layer is sufficiently large, or designing the manufacturing process to suit the etching conditions. .

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の反応性イオンエツチング装置を使用した
エツチングでは、被エツチング膜とその下地の材料層と
のエツチングレートの比を充分に大きくし、下地材料層
をエツチングのストッパーとしてオーバーエツチングを
することにより、置を用いて、例えば層間絶縁層のエッ
チバックのように、同一材料層の途中でエツチングを終
止させる場合には、エツチングレートの変動や被エツチ
ング膜の膜厚のばらつきがそのままエツチング後の被エ
ツチング膜の残膜厚に反映されるという欠点がある。
In etching using the conventional reactive ion etching apparatus described above, the etching rate ratio between the film to be etched and the underlying material layer is made sufficiently large, and over-etching is performed using the underlying material layer as an etching stopper. When etching is stopped in the middle of the same material layer, for example, when etching back an interlayer insulating layer, the fluctuations in the etching rate and the thickness of the film to be etched will affect the film after etching. This has the disadvantage that it is reflected in the remaining film thickness of the etched film.

例えば、膜厚1μm±0.1μmの被エツチング膜をエ
ラチングレー)50nm/―±5nm/winの条件で
エツチングし、被エツチング膜のエツチング後の膜厚な
0.5μmにする場合を考える。この時のエツチング時
間は、被エツチング膜の膜厚1.0μm、エツチングレ
ート50nm/winとそれぞれの中央値から10分間
となる。被エツチング膜の最小膜厚0.9μmと最大エ
ツチングレート550n m /winの組み合わせの
場合は、エツチング後の被エツチング膜の膜厚は最小値
0.35μmとなり、同様に最大値は、それぞれ1,1
μmと450nm/iの組み合わせの場合で、0,65
μmとなる。被エツチング膜の成膜ばらつき及びエツチ
ングレートのばらつきをそれぞれ±10%の範囲に設定
しても、被エツチング膜のエツチング後の膜厚は、0.
5μm±0.15μmと±30%のばらつきとなる。
For example, consider a case in which a film to be etched with a thickness of 1 μm±0.1 μm is etched under conditions of an etching rate of 50 nm/−±5 nm/win to reduce the thickness of the film to 0.5 μm after etching. The etching time at this time is 10 minutes from the median values of the film thickness of the film to be etched of 1.0 μm and the etching rate of 50 nm/win. In the case of a combination of the minimum film thickness of the film to be etched, 0.9 μm, and the maximum etching rate of 550 nm/win, the film thickness of the film to be etched after etching is the minimum value of 0.35 μm, and similarly, the maximum value is 1 and 1, respectively. 1
In the case of a combination of μm and 450nm/i, 0.65
It becomes μm. Even if the film formation variation of the film to be etched and the variation of the etching rate are each set within the range of ±10%, the film thickness of the film to be etched after etching is 0.5%.
The variation is 5 μm±0.15 μm, which is ±30%.

エツチング後の膜厚のばらつきを少なくすることは、作
業毎に被エツチング膜の膜厚とエツチングレートの確認
を行なってエツチング時間を決めることにより、ある程
度可能である。しかし、この方法では、作業者の工数が
多くなったり、スループットが低下するという欠点があ
る。なおこの方法でも、ウェハ1枚毎に確認することは
現実的に不可能であり、例えば、100枚単位で確認す
るものと仮定すると、最小単位100枚の中でのウェハ
間のばらつきは残ることになる。
It is possible to reduce variations in the film thickness after etching to some extent by checking the film thickness of the film to be etched and the etching rate for each operation and determining the etching time. However, this method has drawbacks such as increased man-hours for the operator and decreased throughput. Even with this method, it is realistically impossible to check each wafer. For example, assuming that 100 wafers are checked, there will still be variations between wafers within the minimum unit of 100. become.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の反応性イオンエツチング装置は、半導めのエツ
チング機能部と、前記半導体ウェハを前記膜厚測定機能
部とエツチング機能部間に移動させる双方向ウェハロー
ダ−と、前記膜厚測定機能界 部の測定結喬を演算処理し動作制御部に信号を送る演算
機能部と、前記膜厚測定機能部の動作を制御すると共に
前記演算機能部からの信号により前記エツチング機能部
の動作を制御する動作制御部とを含んで構成される。
The reactive ion etching apparatus of the present invention includes a semiconductor etching function section, a bidirectional wafer loader for moving the semiconductor wafer between the film thickness measurement function section and the etching function section, and a film thickness measurement function interface section. an arithmetic function section that processes the measured results and sends a signal to an operation control section; and an operation that controls the operation of the film thickness measurement function section and controls the operation of the etching function section based on the signal from the arithmetic function section. The control unit is configured to include a control unit.

〔実施例〕〔Example〕

第1図は本発明の第1の実施例のブロック図である。 FIG. 1 is a block diagram of a first embodiment of the present invention.

枚葉型反応性イオンエツチング装置は、膜厚測定器等か
らなる膜厚測定機能部12とCPU等からなる動作制御
部14及び演算回路等からなる演算機能部15とから主
に構成されている。エツチング機能部13と膜厚測定機
能部12は双方向ウェハローダ−11により接続され、
双方向のウェハの移動が可能となっている。エツチング
機能部13.膜厚測定機能部12.双方向ローダ−11
及び演算機能部15の動作は動作機能部14ですべて制
御できるシステム構成となっている。
The single-wafer type reactive ion etching apparatus is mainly composed of a film thickness measurement function section 12 consisting of a film thickness measuring device, an operation control section 14 consisting of a CPU, etc., and an arithmetic function section 15 consisting of an arithmetic circuit, etc. . The etching function section 13 and the film thickness measurement function section 12 are connected by a bidirectional wafer loader 11.
Bidirectional wafer movement is possible. Etching function section 13. Film thickness measurement function section 12. Bidirectional loader-11
The system configuration is such that the operation of the arithmetic function section 15 can be completely controlled by the operation function section 14.

第3図(a)〜(d)は、上述の第1の実施例の使用方
法を説明するための半導体チップの断面図である。
FIGS. 3(a) to 3(d) are cross-sectional views of a semiconductor chip for explaining how to use the first embodiment described above.

まず、第3図(a)に示すように、シリコン基板31上
に多結晶シリコン34.第1PSG膜3゛2及び第2P
SG膜33を形成したウェハを膜厚測定機能部12内に
ロードし、所望の位置の被エツチング材料であるヨ第1
PSG膜32及び第2PSG膜33の膜厚d、を1例え
ばウェハ内で5ケ所測定し、演算機能部14において平
均値を算出する0次に双方向ウェハローダ−11により
工。
First, as shown in FIG. 3(a), polycrystalline silicon 34. The first PSG film 3'2 and the second PSG film 3'2
The wafer on which the SG film 33 has been formed is loaded into the film thickness measuring function section 12, and the first layer of the material to be etched is placed at a desired position.
The film thicknesses d of the PSG film 32 and the second PSG film 33 are measured at, for example, five locations within the wafer, and the calculation function section 14 calculates the average value using a zero-order bidirectional wafer loader 11.

チング機能部13にこのウェハをロードし、残膜厚が最
終的に残したい膜厚dIより必ず厚くなる条件でパイロ
、トエッチングを行ない、第3図(b)に示すように、
第1及び第2のPSG膜を厚さΔd0だけエツチングす
る。次にエツチング機能部13から再度膜厚測定機能部
12にウェハーを移動し、残膜厚36(dO’)を測定
し、演算機能部15により、パイロットエツチングによ
りエツチングされた膜厚Δd0を算出し、そのΔd0と
エツチング時間からエツチングレートを算出する。
This wafer is loaded into the etching function section 13, and pyro-etching is performed under conditions such that the remaining film thickness is always thicker than the final film thickness dI, as shown in FIG. 3(b).
The first and second PSG films are etched to a thickness of Δd0. Next, the wafer is transferred from the etching function section 13 to the film thickness measurement function section 12 again, the remaining film thickness 36 (dO') is measured, and the calculation function section 15 calculates the film thickness Δd0 etched by pilot etching. , the etching rate is calculated from the Δd0 and the etching time.

このエツチングレートな用いて先に測定した残膜厚d0
′と最終的に残したい膜厚diの差すなわち第3図(C
)に示した追加エツチング膜厚(Δd、=do’  d
+)をエツチングするために必要なエツチング時間t1
を算出する。
The remaining film thickness d0 measured earlier using this etching rate
’ and the final film thickness di that you want to leave, that is, the difference in Figure 3 (C
) The additional etching film thickness (Δd, = do' d
+) Etching time t1 required for etching
Calculate.

次に再度エツチング機能部にウェハをロードして先に算
出した時間t1だけエツチングを行ない、第3図(d)
に示すように最終的な被エツチング膜の残膜厚d1を得
た。ここで第3図(a)における初期膜厚(do)の測
定と第3図(b)におけるパイロットエツチング後の膜
厚(do’ )の測定は同この第2の実施例は、膜厚測
定機能部12及び双方向ウェハローダ−24がエツチン
グ機能部13のチャンバー21内に設けられている。エ
ツチング機能部13と膜厚測定機能部12及び双方向ウ
ェハローダ−24は、開閉可能で気密性の高いシャッタ
ー27で仕切られている。これらのシステム全体は、動
作制御部14Aにより制御され、演算機能部15Aによ
りデータ処理を行なうシステム構成としている点は第1
の実施例と同様である。
Next, the wafer is loaded into the etching function section again and etched for the previously calculated time t1, as shown in Fig. 3(d).
The final remaining film thickness d1 of the film to be etched was obtained as shown in FIG. Here, the measurement of the initial film thickness (do) in FIG. 3(a) and the measurement of the film thickness after pilot etching (do') in FIG. 3(b) are the same. A functional section 12 and a bidirectional wafer loader 24 are provided within a chamber 21 of the etching functional section 13. The etching function section 13, film thickness measurement function section 12, and bidirectional wafer loader 24 are partitioned off by a shutter 27 that can be opened and closed and has a high airtightness. The first point is that these systems have a system configuration in which the entire system is controlled by the operation control section 14A and data processing is performed by the calculation function section 15A.
This is similar to the embodiment.

この第2の実施例では、チャンバー21内にウェハをロ
ードして1度排気を行なえばエツチング機能部13のウ
ェハ側電極22上と膜厚測定機能部12のウェハステー
ジ25上とのウェハの往来が、チャンバー21の真空度
を低下させることなく行なうことが可能となり、相対的
にチャンバー21の排気に要する時間が短縮できるとい
う利点がある。
In this second embodiment, once a wafer is loaded into the chamber 21 and the chamber is evacuated once, the wafer can be moved back and forth between the wafer-side electrode 22 of the etching function section 13 and the wafer stage 25 of the film thickness measurement function section 12. However, this can be carried out without reducing the degree of vacuum in the chamber 21, and there is an advantage that the time required to evacuate the chamber 21 can be relatively shortened.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、反応性イオンエツチング
装置に膜厚測定機能部と演算機能部と動作制御部とを付
加して連動させることにより、自動的かつ連続的に被エ
ツチング膜のエツチングレートの測定及びエツチング時
間の算出ができるため、エツチング後の被エツチング膜
の膜厚のウェハ間の均一性を飛躍的に向上させることが
できるという効果がある。
As explained above, the present invention automatically and continuously adjusts the etching rate of the film to be etched by adding and interlocking a film thickness measurement function section, a calculation function section, and an operation control section to a reactive ion etching apparatus. Since it is possible to measure and calculate the etching time, it is possible to dramatically improve the uniformity of the thickness of the film to be etched between wafers after etching.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第1の実施例のブpワク図、第2図は
本発明の第2の実施例の模式図、第3図は本発明の第1
の実施例の動作手順を説明する半導体チップの断面図で
ある。 11・・・・・・双方向ウェハローダ−12・・・・・
・膜厚測定機能部、13・・・・・・エツチング機能部
、14゜14A・・・・・・動作制御部、15.15A
・・・・・・演算機能部、21・・・・・・チャンバー
 22・・・・・・ウェハ側電極、23・・・・・・対
向電極、24・・・・・・双方向ウェハローダ−25・
・・・・・ウェハステージ、26・・・・・・膜厚測定
器、27・・・・・・シャッター 31・・・・・・シ
リコン基板、32・・・・・・第1PSG膜、33・・
・・・・第2PSG膜、34・・・・・・多結晶シリコ
ン、35・・・・・・初期膜厚(do)、36・・・・
・・残膜厚(do’)、37・・・・・・パイロットエ
ツチング厚(Δdo)、38・・・・・・追加エツチン
グ厚(Δd+)、39・・・・・・残膜厚(dl)。 第 1 図
FIG. 1 is a schematic diagram of the first embodiment of the present invention, FIG. 2 is a schematic diagram of the second embodiment of the present invention, and FIG. 3 is a schematic diagram of the first embodiment of the present invention.
FIG. 3 is a cross-sectional view of a semiconductor chip for explaining the operation procedure of the embodiment. 11...Bidirectional wafer loader-12...
・Film thickness measurement function section, 13... Etching function section, 14° 14A... Operation control section, 15.15A
......Arithmetic function section, 21...Chamber 22...Wafer side electrode, 23...Counter electrode, 24...Bidirectional wafer loader 25・
... Wafer stage, 26 ... Film thickness measuring device, 27 ... Shutter 31 ... Silicon substrate, 32 ... First PSG film, 33・・・
... Second PSG film, 34 ... Polycrystalline silicon, 35 ... Initial film thickness (do), 36 ...
...Residual film thickness (do'), 37... Pilot etching thickness (Δdo), 38... Additional etching thickness (Δd+), 39... Residual film thickness (dl ). Figure 1

Claims (1)

【特許請求の範囲】[Claims] 半導体ウェハ上に形成された膜の厚さを測定するための
膜厚測定機能部と、前記膜をエッチングするためのエッ
チング機能部と、前記半導体ウェハを前記膜厚測定機能
部とエッチング機能部間に移動させる双方向ウェハロー
ダーと、前記膜厚測定機能部の測定結果を演算処理し動
作制御部に信号を送る演算機能部と、前記膜厚測定機能
部の動作を制御すると共に前記演算機能部からの信号に
より前記エッチング機能部の動作を制御する動作制御部
とを含むことを特徴とする反応性イオンエッチング装置
A film thickness measurement function section for measuring the thickness of a film formed on a semiconductor wafer, an etching function section for etching the film, and a method for moving the semiconductor wafer between the film thickness measurement function section and the etching function section. a bidirectional wafer loader that moves the wafer to the film thickness measurement section; a calculation function section that processes the measurement results of the film thickness measurement function section and sends a signal to an operation control section; and an operation control section that controls the operation of the etching function section based on signals from the reactive ion etching apparatus.
JP33964089A 1989-12-26 1989-12-26 Reactive ion etching device Pending JPH03196622A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33964089A JPH03196622A (en) 1989-12-26 1989-12-26 Reactive ion etching device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33964089A JPH03196622A (en) 1989-12-26 1989-12-26 Reactive ion etching device

Publications (1)

Publication Number Publication Date
JPH03196622A true JPH03196622A (en) 1991-08-28

Family

ID=18329413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33964089A Pending JPH03196622A (en) 1989-12-26 1989-12-26 Reactive ion etching device

Country Status (1)

Country Link
JP (1) JPH03196622A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6596551B1 (en) 1998-12-01 2003-07-22 Hitachi, Ltd. Etching end point judging method, etching end point judging device, and insulating film etching method using these methods
JP2006261633A (en) * 2005-02-18 2006-09-28 Tokyo Electron Ltd Treatment method of substrate, manufacturing method of solid image pickup
CN107452642A (en) * 2017-08-31 2017-12-08 长江存储科技有限责任公司 A kind of detection method of epitaxial structure etching rate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6596551B1 (en) 1998-12-01 2003-07-22 Hitachi, Ltd. Etching end point judging method, etching end point judging device, and insulating film etching method using these methods
JP2006261633A (en) * 2005-02-18 2006-09-28 Tokyo Electron Ltd Treatment method of substrate, manufacturing method of solid image pickup
CN107452642A (en) * 2017-08-31 2017-12-08 长江存储科技有限责任公司 A kind of detection method of epitaxial structure etching rate
CN107452642B (en) * 2017-08-31 2019-12-03 长江存储科技有限责任公司 A kind of detection method of epitaxial structure etching rate

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