JPH03196196A - Muting circuit for electronic musical instrument - Google Patents

Abstract

PURPOSE:To prevent a clicking noise occurring by imparting a mute to a musical sound signal when a musical sound waveform signal goes to a low level. CONSTITUTION:Since latch control signals LLD, RLD are supplied corresponding to the time division output timing of the musical sound waveform signal from a latch control signal generating means 23 in an ordinary operation, the musical sound waveform signal from a musical sound signal formation circuit 11 is outputted sequentially in time division fashion via latch means 21a, 21b. Meanwhile, when a mute signal is supplied from the outside to the muting circuit 28, latch control signal prohibiting means 22, 23 prohibit the output of the latch control signal LLD, RLD corresponding to a detection signal from the low level detection circuit 22 when a signal which instructs muting arrives. Therefore, the latch means 21a, 21b stop the latching of the musical sound waveform signal sequentially, then, the musical sound signal set at the low level can be held. In such a way, the muting can be performed without generating the clicking noise according to the level change of musical sound.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a mute circuit for an electronic musical instrument provided after a musical tone signal forming circuit.

[Prior art]

Conventionally, this type of circuit has provided a gate means in the signal path of the musical sound waveform signal output from the musical tone signal forming circuit, and controlled the gate means to be non-conductive when switching effects, etc., to remove unnecessary signals from the acoustic converting means. was made so that it would not be emitted.

[The problem that the invention tries to solve! ! [] However, in the above-mentioned conventional circuit, the gate means is controlled to be non-conductive at the same time as the effect is switched, so if the instantaneous value of the musical waveform signal output from the musical tone signal forming circuit is large at the time of the non-conductive control, However, there was a problem in that click noise was generated from the acoustic conversion means. The present invention has been made to solve the above problem, and its purpose is to provide a mute circuit for an electronic musical instrument that prevents the occurrence of click noise. [Means for Solving the Problem] In order to achieve the above object, the structural features of the present invention are as follows:
A mute circuit provided on the output side of a musical tone signal forming circuit that time-divisionally outputs a musical tone waveform signal representing an instantaneous value of a musical tone waveform, the muting circuit being interposed in the signal path of the musical tone waveform signal and muting when a latch control signal arrives. and a latch means for capturing and storing the musical tone waveform signal and outputting the stored musical tone waveform signal. low level detection means for detecting that the tone waveform signal passing through the signal path is at a low level and outputting a detection signal; and latch control for the latch means in response to time-division output timing of the tone waveform signal. latch control signal generation means for outputting a signal, and said latch control signal generation means for inhibiting output of said latch control signal in response to a detection signal from said low level detection means when a signal instructing mute arrives. The latch control signal inhibiting means for controlling the latch control signal is provided. [Operation 1] In the present invention configured as described above, the latch means captures and stores the musical waveform signal from the musical tone signal forming circuit upon arrival of the latch control signal, and outputs the stored musical waveform signal. In such a case, normally, the latch control signal is supplied from the latch control signal generating means in accordance with the time-division output timing of the musical tone waveform signal, so that the musical waveform signal from the musical tone signal forming circuit is sequentially supplied via the latch means. Time-division output is performed. On the other hand, when a mute signal is supplied to the mute circuit from the outside, the latch control signal inhibiting means outputs the latch control signal in response to a detection signal from the low level detection circuit when a signal instructing mute arrives. Therefore, the latch means stops latching the tone waveform signals one after another, and holds the tone waveform signal that has reached a low level. As a result, after the tone waveform signal becomes low level, the latch means continues to output the tone waveform signal at a low level, and the tone signal is substantially muted. Effects of the Invention As can be understood from the above description of the operation, according to the present invention, when muting is instructed, the music waveform signal waits until the tone waveform signal becomes low level, and when the signal becomes low level, Since muting is applied to the musical tone signal, muting can be achieved without generating click noise due to changes in the level of the outputted musical tone. (Example) Below, one example of the present invention will be described with reference to the drawings.
FIG. 152 schematically shows the entirety of an electronic musical instrument to which the mute circuit according to the same embodiment is applied. This electronic musical instrument has a keyboard circuit 10. It is equipped with a musical tone signal forming circuit 11 and an output circuit 12, and is configured to produce musical tones such as #board performance sounds in stereo from left and right speakers 13a and 13b. The keyboard circuit 10 consists of a group of key switches corresponding to a plurality of keys constituting the keyboard, and a key press/release detection circuit that detects the press/release of each key by opening/closing the key switch group. Key information regarding the released key is supplied to the tone signal forming circuit 11, and an any-key-on pulse signal AKOP is output when any key is pressed. Based on the supply of the key information, the musical tone signal forming circuit 11 generates a digital musical sound waveform signal TSIG having the pitch of the key pressed on the keyboard.
is divided into left and right channels and output in a time-division manner. Note that this digital music waveform signal TSIG is given a tone selected by a tone selection switch (not shown), and is also given a tone selected by an effect selection switch 14 (actually,
There are several effects, but only one is shown as a representative). As will be described later, the output circuit 12 includes a D/A converter, converts the left and right channel digital musical sound waveform signals TSIG supplied in the time-division manner into analog musical sound waveform signals, and spatially separates the digital musical sound waveform signals TSIG. Left and right amplifier 15a,
left and right speakers 13 a, respectively via 15 b;
13b, respectively. In addition, this output circuit 12 has a built-in mute circuit, and the mute circuit includes the output Q of the prep-prop 16.
(mute instruction signal MUTE)
, 15b controls whether or not an analog musical waveform signal is output. A delay circuit DLL and an exclusive OR circuit E are connected to the set input terminal S of the flip-flop 16.
An effect switching detection circuit 17 consisting of an XOR1 is connected, and the preamp flop 16 is set when the effect selection switch 14 is switched. Reset input for flip-prop 16! H is connected to the output of an AND circuit ANDI which inputs the mute instruction signal MUTE, the left and right mute control signals ML and MR supplied from the output circuit 12, and the any-key-on pulse signal AKOP. 1
6 is reset by the output of the AND circuit ANDI. # Board circuit 10. Musical tone signal forming circuit 11 and output circuit 12
Although the configuration and function of the circuits are as described above, the clock signals φ[, φi, φ1, and φ2 that control the operation timing of each of these circuits 10, 11, and 12 will be explained below. The clock signals φL and φ■ function as master clock signals and mutually form two-phase signals, and the clock signals φi and φ2 are the same as the clock signal φL.
, φA, which also form a two-phase compensation signal, and these clock signals φL, φi, φ1 . φ2
The timing relationship is shown in Figure 3. Next, to explain the output circuit 12 in detail, the circuit 12
The details are as shown in Figure 1. It has latch circuits 21 a and 2 l b arranged in parallel on the signal path of the digital musical waveform signal TSIG. This digital musical sound waveform signal TSIG displays each instantaneous value of the musical sound waveform in multiple bits, for example, 13-bit "two's complement", and the waveform signal on the left channel side is counted by a counter 25, which will be described later, at step 5 TEP.
It is assigned to the timing of O-3TEP31(7), and the timing of steps 5TEP32 to 5TEP63 in which the right channel side waveform signal is counted by the counter 25. latch circuit 21a,
2 lbs each intake! 11 go! Upon arrival of the latch control signals LLD and RLD to the LD and LD, the digital musical tone waveform signal TSIG at that time is captured and stored, and the stored signal TSIG is output. These latch control signals LLD and RLD are supplied from a latch control circuit 23 controlled by a level detection circuit 22. The level detection circuit 22 receives a digital musical waveform signal TSI.
It includes a NOR circuit N0RI and an AND circuit AND2 that detect that the absolute value of G is within a predetermined small value. NOR circuit N0RI is a digital music waveform signal: I”S
It detects a small range on the positive side of IG, and the same signal TS
When a plurality of upper bits of IG, for example all upper 8 bits, are at low level "0", a high level signal "1" is output. The AND circuit AND2 detects a small range on the negative side of the digital musical waveform signal TSIG, and all of the upper 8 bits of the signal TSIG are at a high level.
1", a high level signal "1" is output. Each output of the NOR circuit N0RI and the AND circuit AND2 is the OR circuit O.
It is connected to the input of RI, and the output of the circuit ORI is a latch circuit 22a. 22b, respectively. The latch circuit 22a captures and stores the supplied signal in synchronization with the latch control signal LLD, and outputs it as a left channel hold signal HL via the delay circuit DL2. The latch circuit 22b latches the supplied signal! The signal is captured and stored in synchronization with the 119 signal RLD, and is outputted as the right channel hold signal HR via the delay circuit DL3. Delay circuit DL2. DL3 captures and stores an input signal in synchronization with clock signal φ1, and outputs it in synchronization with clock signal φ2. The latch control circuit 23 receives the hold signal HL. NAND circuit N in which HR is input to each input
AND1. It is equipped with NAND2. A mute instruction signal MUTE is supplied to the other input of each of these NAND circuits NANDI and NAND2, and the NAND circuit NA
The outputs of NDI and NAND2 are output from an AND circuit AND3. AN
each input of D4. AND circuit AN
The other inputs of D3 are supplied with the clock signal φ1, the write enable signal WEN, and the signal WLR for left and right distribution, and the output thereof is the latch s of the left channel.
l! It is designed to be output as a control signal LLD. For the other inputs of the AND circuit AND4. The clock signal φ1, the write enable signal WEN, and the left/right distribution are each supplied with a signal obtained by inverting the signal WLR by an inverter circuit NVI, and the output thereof is output as the right channel launch control signal RLD. Write enable signal WEN and left/right swing signal W
LR is supplied from the timing control circuit 24,
The control circuit 24 receives step 5TE from the counter 25.
Based on the 6-bit count signal representing PO-8TEP63, as shown in FIG. 4, the write enable signal WEN is set to high level "1" at step 5TEP26. The left/right swing amount which becomes "1" forms the signal WLR.The counter 25 inputs the clock signals φL and φH and consists of steps 5TEPO to 5TEP63 which change according to the timing relationship as shown in FIGS. 3 and 4. The 6-bit count signal is output.Each digital musical waveform signal from the latch circuits 21a and 2lb is supplied to both inputs A and B of a selector 26, and the selector 26 controls each selection. When the high level signal "1" is supplied to the inputs SA and SB, the digital musical waveform signals supplied to the human inputs A and B are respectively outputted.The selection control inputs SA and SB each have the following: The most significant bit signal MSB of the 6-bit output of the counter 25 and a signal obtained by inverting the signal MSB by the inverter circuit INV2 are respectively supplied.The digital musical waveform signal selected and output by the selector 26 is subjected to D/A conversion. The D/A converter converts the supplied digital musical waveform signal into an analog musical waveform signal and outputs the signal as a conversion output signal DACO, and also sets the reference level of the analog musical waveform signal. The reason for generating this reference voltage signal Cv is that the D/A converter 2
This is because 7 is a single voltage M (outputs only positive or negative voltage). The converted output signal DACO is output as left and right channel analog tone waveform signals SQL and SOR via analog gate circuits Gl and G2 provided in parallel. These analog gate circuits Gl. The conduction of G2 is controlled by inverted mute control signals ML and MR, which are inverted versions of the mute control signals ML and MR from the analog mute control circuit 28. Moreover, the analog gate circuit Gl. G2 includes an analog gate circuit G3.G2 whose respective output terminals are connected in common. G4 are connected in parallel, and each gate circuit G3. A reference voltage signal Cv is supplied to each input of G4. These analog gate circuits G3. G4 inputs the inverted mute control signals ML and MR to an inverter circuit INV3. Conduction is controlled by mute control signals ML and MR inverted by INV4. The analog mute control circuit 28 includes an AND circuit AND5 for forming the inverted mute control signals ML and MR.
．． Equipped with AND6. The AND circuit AND5 receives the most significant bit signal MSB of the counter 25 and the hold signal H.
The output of the NAND circuit NAND3, which inputs L, HR, and mute instruction signal MUTE, and the output of the OR circuit OR2, which inputs the lower 5 bits of the counter 25, are input, and the AND of each input signal is inverted for the left channel. Output as mute control signal ML. The AND circuit AND6 inputs the most significant bit signal MSB of the counter 25 to the inverter circuit IN.
and the signal inverted by V2. The output of the NAND circuit NAND3 and the OR circuit OR
2, and outputs the AND of each input signal as an inverted mute control signal (2) for the right channel. Furthermore, the inverted mute control signals ML and MR are
Inverter circuit INV5. Via INV6, it is outputted to the outside as mute control signals ML and MR. Next, the operation of the embodiment configured as described above will be explained. When a key press/release operation is performed on the keyboard, the keyboard circuit 10 outputs key information corresponding to the key press/release operation to the musical tone signal forming circuit 11, and the musical tone signal forming circuit 11 responds to the key press/release operation. A corresponding digital musical tone waveform signal TSIG is formed and output to the output circuit 12. This digital musical waveform signal T
In SIG, the one for the left channel is step 5.
Those output during the period of TEPO-8TEP31 and for the right channel are steps 5TEP32 to 5TEP63.
(See Figure 4). Now, without the effect switch 14 being changed or operated,
When the mute instruction signal MUTE is at a low level "On," a low level signal "0" is always supplied to one input of each of the NAND circuits NANDI and NAND2 in the latch control circuit 23 in the output circuit 12. , the same NAND circuits NANDi and NAND2 are each AND circuit A.
A high level signal "1" is supplied to ND3°AND4. As a result, the AND circuit AND3. AND4 supplies the latch control signals LLD and RLD for the left and right channels synchronized with the clock signal φ1 to the respective capture control terminals LD and LD of the latch circuits 21a and 21b at the timing of each step 5TEP26 and 5TEP58. The latch circuits 21a and 21b sequentially output the stored digital tone waveform signals while updating and storing the digital tone waveform signals for the left and right channels at each timing. On the other hand, the most significant bit signal MSB of the counter 25 is a signal that becomes low level "0" at steps 5TEPO-8TEP31 and becomes high level "1" at steps 5TEP32-5TEP63, so the selector 26 latch circuit 21a
D/A converts the digital musical waveform signal for the left channel stored in the ! 27 and step 5TE
PO-5TEP31 period niratch circuit 2 l b G
,: Outputs the stored digital music waveform signal for the right channel to the D/A converter 27. and. The D/A converter 27 converts the digital music waveform signal for the left and right channels into an analog music waveform signal in each period, and outputs the analog music waveform signal alternately to the left and right channels as a converted output signal DACO to the analog gate circuits Gl, G.
Supply to 2. Note that the D/A converter 27 always sends the reference voltage signal Cv to the analog gate circuit G3. Supplied to G4. In addition, in parallel with these operations, analog mu) $1
11 circuit 28 is an inverted mute control signal ML. Analog gate circuits 01 to G4 are controlled to be conductive or non-conductive in accordance with MR and mute si control signals ML and MR. In the analog mute control circuit 28, as mentioned above, the mute instruction signal MUTE is always at the low level "0".
”, the NAND circuit jlNAND3 always supplies a high level signal “1” to each of the AND circuits AND5 and AND6.Thereby, the AND circuit AND5 receives the most significant bit signal MSB of the counter 25 and the OR circuit OR2. Steps STE P33-5 according to the output of
Inverted mute for the left channel that becomes high level “1” during TEP63 period! Since the #l#lI signal ML is output, the signal representing the instantaneous value of the musical sound waveform for the left channel during the above period and representing the reference voltage CV during the other periods is as follows.
The analog tone waveform signal SQL for the left channel is output from the analog gate circuits Gl and G3. Further, the AND circuit AND6 performs inverted mute control for the right channel, which becomes high level "1" in the period from steps 5TEPI to 5TEP31Q, in accordance with the inverted signal of the most significant bit signal MSB of the counter 25 and the output of the OR circuit OR2. Since the signal MR is output, the signal representing the instantaneous value of the musical sound waveform for the right channel during the period and representing the reference voltage Cv during the other periods is output to the analog gate circuit G2. It is output from G4 as an analog musical waveform signal SOR for the right channel. Each of these analog musical waveform signals SQL, S. R is connected to speaker 1 via amplifiers 15a and 15b.
3a, 13b, and the same amplifiers 15a, 15
A capacitor (not shown) in b and speaker 13a
, 13b, and output as a performance sound signal. On the other hand, when the effect switch 14 is switched, the exclusive OR circuit EXORI outputs a high level signal "1".
", the flip-flop 16 is set and the mute instruction signal MUTE becomes high level "1". As a result, the NAND circuit NA in the latch control circuit 23
NDI, NAND2 and analog mute control circuit 28
Each output of NAND3 in the circuit becomes dependent on the hold signals HL and HR from the level detection circuit 22. In such a case, if the level of the digital tone waveform signal TSIG is high, the NOR circuit N0R1 and the AND circuit AND2
Both outputs are at a low level II O'', and the OR circuit ORI, the latch circuits 22a and 22b, and the delay circuit DL
2. NAND circuit NANDI, NAND2 via DL3
Since the signals supplied to both are low level “O”,
Similar to the case where the mute instruction signal MUTE is at the low level "O", musical tones are output from the speakers 13a, 13.
It is pronounced from b. On the other hand, for example, when the digital tone waveform signal TSIG for the right channel becomes a low level, a detection signal representing a high level +1" is output from the NOR circuit N0RI or the AND circuit AND2 during the period from steps 5TEP32 to 5TEP63. This detection The signal is the latch control signal RL for the right channel synchronized with the timing of step 58 described above.
is taken into the latch circuit 22b by D, and the delay circuit jI
Step 5TE is delayed by one step by NDL3.
A high level "1" signal is output from the timing of P59. Now, since the mute instruction signal MUTE is at the high level "1" as described above, the NAND circuit NAN
D2 starts outputting a low level "□H" signal from the timing of step 5TEP59, and outputs the AND circuit AND.
4 to prevent the generation of the latch control signal RLD for the right channel. As a result, the high level "1" signal in the latch circuit 22b is maintained, and the latch control signal RLD is no longer generated. - On the other hand, at this time, the latch circuit 21b captures and stores the digital musical tone waveform signal when the low level is detected by the NOR circuit N0RI or the AND circuit AND2 in accordance with the latch control signal RDL synchronized with the timing of step 58. , thereafter, it continues to output digital musical waveform signals corresponding to the low level. Then, this digital tone waveform signal is sent to the selector 26 as in the case described above. The signal is outputted via the D/A converter 27 and the analog gate circuit G2, but since the signal becomes a direct current signal, no musical tone is produced from the left speaker 13b. That is, muting is achieved for the left channel. In addition, in such cases, muting is achieved when the musical waveform signal reaches a low level, so
No click noise occurs due to sudden level changes in musical tones when muted. Note that even in such a case, the NAND circuit NA in the analog mute control circuit 28
The output of ND3 is that the hold signal HL is low level “0”
Therefore, the mute instruction signal MUTE is at a high level "1", similar to the case where the mute instruction signal MUTE is at a low level nQn. On the other hand, for the left channel, muting is not achieved until its musical waveform signal becomes low level. When the digital tone waveform signal TSIG for the left channel becomes a low level, the low level is detected by the NOR circuit N0RI or the AND circuit AND2, as in the case of the right channel, but in such a case, the timing of step 5TEP26 is The low level detection signal is taken into the latch circuit 22a, and the latch circuit 22a, delay circuit DL2, NAND circuit NANDI, and AND circuit AND3 prevent the generation of the latch control signal LLD from the timing of the next step 5TEP27. be done. As a result, the low level digital musical tone waveform signal TSIG is transmitted to the latch circuit 21.
maintained within a. Mute for the left channel is realized. In this case as well, no click noise is generated, as in the case described above. Furthermore, when digital muting of both channels is achieved in this manner, both stomach hold signals HR and HL from the level detection circuit 22 become high level "1". As a result, the output of the NAND circuit NAND3 in the analog mute control circuit 28 becomes low level "0", and the output of the AND circuit AND5. Since AND6 always outputs the inverted mute I' control signals ML and MR of low level "0", the analog gate circuits Gl and G2 are always controlled to be non-conductive, and the analog gate circuits G3. G4 is always controlled to be conductive. As a result, the analog musical waveform signals SQL and SOR of the left and right channels are both at the reference voltage C.
V is maintained, and muting can also be realized in an analog manner. Next, the mute release operation will be explained. Note that when muting is completed both digitally and analogously as described above, the mute instruction signal MU
TE is set to high level "1" and mute control signal ML. MR is also set to high level "1". In this state, when any key is pressed on the keyboard, the keyboard circuit 10 outputs an any-key-on pulse signal AKOP in response to the pressed key, and all inputs of the AND circuit ANDI become high level "1". Therefore, the circuit ANDI supplies a high level signal nVt to the reset input terminal R of the flip-flop 16. This makes flip-flop 1
6 is reset and sets the mute instruction signal MUTE to a low level tlolt, so that the electronic musical instrument is unmuted. It should be noted that the width of low level detection in the above embodiment is varied in accordance with the number of bits representing the digital musical tone waveform signal TSIG. Further, in the above embodiment, the present invention is applied to an electronic musical instrument that produces musical tones in two channels, but the present invention is also applicable to an electronic musical instrument that produces musical tones in more channels, or an electronic musical instrument that produces musical tones in one channel. Needless to say, it can also be applied to musical instruments.

[Brief explanation of drawings]

FIG. 1 is a detailed circuit diagram of an output circuit of an electronic musical instrument equipped with a mute circuit showing an embodiment of the present invention, FIG. 2 is an overall block diagram of the electronic musical instrument, and FIGS. 3 and 4 are diagrams of the electronic musical instrument. 2 is a time chart of various signals used in Explanation of symbols 10... Keyboard circuit, 11... Musical tone signal forming circuit, 1
2... Output circuit, 14... Effect switch, 16...
-Flip-flop, 17...effect switching detection circuit, 21a, 2lb, 22a. 22b...Latch circuit, 22...Level detection circuit,
23... Latch control circuit, 24... Timing control circuit, 26... Selector, 27... D/A converter,
28...Analog mute control circuit, NANDI, N
AND2... NAND circuit, AND3. AND4...
AND circuit.

Claims (1)

[Scope of Claims] A mute circuit provided on the output side of a musical tone signal forming circuit that time-divisionally outputs a musical tone waveform signal representing an instantaneous value of a musical tone waveform, the mute circuit being interposed in the signal path of the musical tone waveform signal. a latch means that captures and stores the musical tone waveform signal upon arrival of a latch control signal and outputs the stored musical tone waveform signal; and a detection signal that detects that the musical tone waveform signal passing through the signal path is at a low level. low level detection means for outputting a latch control signal to the latch means in accordance with the time-division output timing of the musical waveform signal; A mute circuit for an electronic musical instrument, comprising latch control signal inhibiting means for controlling the latch control signal generating means to inhibit output of the latch control signal in response to a detection signal from the detecting means.