JPH03194962A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve injection efficiency of an emitter, to improve channel mobility of a carrier to improve current driving capacity and to enable high speed operation by forming a base region of a bipolar transistor of a mixture of Si and Ge and by introducing Ge to a channel region of a MOSFET. CONSTITUTION:In a semiconductor device having a bipolar transistor and an insulating gate type field effect transistor in the same silicon substrate 1, a base region 14 of the bipolar transistor is formed of a mixture of silicon and germanium, and germanium is introduced to channel regions 15, 16 of the field effect transistors. For example, a P-type diffusion layer 14 is formed by Ge-ion implantation to a surface of an N-type semiconductor region 5. Furthermore, since the channel regions 15, 16 whereto Ge is introduced can be formed by Ge-ion implantation to a surface of an Si epitaxial layer 3 and a surface of the N-type semiconductor region 5 of both MOSFETs, they can be formed in the same process as formation of the P-type diffusion layer 14.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention is directed to Bi-MOS or Bi-CMO8
The present invention relates to the structure of semiconductor devices such as the following.

[Conventional technology]

FIG. 4 is a sectional view of a conventional semiconductor device such as Bi-CMO5.

As shown in the figure, a highly concentrated N-type buried layer 2 is selectively formed on the surface of a P-type silicon (Si) substrate 1, and a P-type buried layer 2 is selectively formed on the surfaces of the St substrate 1 and the N-type buried layer 2. A Si epitaxial layer 3 is formed, and a thick oxide film 4 is selectively formed on the surface of this Si epitaxial layer 3 to separate device regions into island shapes.

An N-type semiconductor region 5 is formed in a part of the Sl epitaxial layer 3 in the element region separated into island shapes, and a base region of a bipolar transistor is further formed in a part of the surface of this N-type semiconductor region 5. A certain high concentration P type diffusion layer 6
is formed, and a heavily doped N-type impurity region 7 serving as an emitter region is formed in a part of the surface of this P-type diffusion layer 6.

In addition, a high concentration N-type diffusion layer 8 is formed in a part of the N-type semiconductor region 5.
is formed, and the N-type buried layer 2, the N-type semiconductor region 5, and the N-type diffusion layer 8 constitute the collector region of the bipolar transistor.

Furthermore, a gate electrode 10 is formed on a part of the surface of the N-type semiconductor region 5 and a part of the surface of the Si epitaxial layer 3 with a gate oxide film 9 interposed therebetween. A P-type impurity diffusion layer 11 is formed on the surface of the St epitaxial layer 3 on both sides of the gate electrode 10.
Channel-to-channel O8 field effect transistor (hereinafter NMO8F)
An N-type impurity diffusion region 12 is formed which becomes the source and drain of the ET.

However, 13 in FIG. 4 is an electrode wiring layer.

Next, the operation of the NPN type bipolar transistor portion of the semiconductor device shown in FIG. 4 will be explained.

5 and 6 are diagrams showing the energy band structure for explaining the operation of the NPN type bipolar transistor,
Figure 5 shows the equilibrium state, and Figure 6 shows the operating state. , where Ec is the energy level at the bottom of the conduction band, Ev is the energy level at the top of the valence band, and Ep is the Fermi level.

First, in the equilibrium state shown in Figure 5 (no bias voltage is applied), there is a potential difference Vo between the emitter region and the base region, and the flows of electrons and holes are equal and opposite to each other. Since the value is extremely small, almost no current flows as a whole.

Next, in the operating state shown in FIG. 6, when a reverse bias voltage (V, .) is applied between the base region and the collector region, a small current I flows through the circuit in the collector region.

(Collector reverse current) flows, and when a forward bias voltage (vBE) is applied between the emitter region and the base region, electrons are injected from the emitter region to the base region (emitter current).

A portion of these electrons becomes a base current, but most of them reach the base-collector junction, where they are absorbed by the collector region by the electric field caused by the reverse voltage and become a collector current. This characteristic means that a large collector current can be controlled with a small base current, resulting in a current amplification effect.

[Problem to be solved by the invention]

In conventional semiconductor devices, as mentioned above, the bipolar transistor parts are the emitter and base.

Since it is a so-called homojunction bipolar transistor in which each region of the collector is entirely made of St, carrier recombination at the emitter and base junctions cannot be avoided, resulting in a reduction in emitter injection efficiency. .

Furthermore, in the MOSFET part, since the channel region is made of Si, there is a problem in that the effective mobility of carriers decreases as the device becomes smaller, making it difficult to improve the current drive capability.

This invention was made to solve the above-mentioned problems, and aims to improve the emitter injection efficiency in the bipolar transistor part, and to increase the carrier channel mobility in the MOSFET part to improve the current driving capability. The purpose is to obtain a semiconductor device capable of high-speed operation.

[Means to solve the problem]

A semiconductor device according to the present invention includes a bipolar transistor and an insulated gate field effect transistor in the same silicon substrate, in which a base region of the bipolar transistor is formed of a mixture of silicon and germanium, and the field effect transistor is formed of a mixture of silicon and germanium. It is characterized by the introduction of germanium into the channel region of the transistor.

[Effect]

In this invention, since the base region of the bipolar transistor is formed of a mixture of silicon and germanium, the injection of holes at the emitter-base junction is restricted more than before, carrier recombination is reduced, and emitter injection efficiency is improved. Moreover, by introducing germanium into the channel region of the insulated gate field effect transistor,
Channel mobility of carriers becomes larger than before, and current driving ability improves.

〔Example〕

FIG. 1 is a sectional view of one embodiment of the semiconductor device of the present invention.

The difference between FIG. 1 and FIG. 4 is that the P-type diffusion layer 6
Instead of germanium (G) on the surface of the N-type semiconductor region 5,
A high concentration P-type diffusion layer 14 containing St and Ge is formed, and the base region is formed of a mixture of St and Ge, and both M
Ge is introduced into each of the channel regions 15 and 16 below the gate electrode 1o in the O5FET.

At this time, the P-type diffusion layer 14 can be formed by implanting Ge ions into the surface of the N-type semiconductor region 5 in the bipolar transistor portion.

In addition, the channel regions 15 and 16 into which Ge is introduced have both M
It can be formed by implanting Ge ions into the surface of the N-type semiconductor region 5 and the surface of the St epitaxial layer 3 of the O3FET, and is formed in the same process as the formation of the P-type diffusion layer 14, which is the base region of the bipolar transistor. Is possible.

Next, the operation of the NPN type bipolar transistor portion shown in FIG. 1 will be explained.

Figure 2 shows the energy band structure in the equilibrium state, and Figure 3 shows the energy band structure in the operating state. G
The junction surface between a P-type semiconductor and an N-type semiconductor including e is shown, and E
is the energy level at the bottom of the conduction band, Ev is the energy level at the top of the valence band, and EP is the Fermi level.

Further, the forbidden band width Eg is the difference in energy level between EC and Ev, and is a value specific to a material. For example, in Si, Eg-1
, 12eV, for Ge it is Eg -0°66eV, and for S
It is generally known that in the case of a mixture of i and Ge (SfGel), the forbidden band width Eg changes continuously as the composition ratio changes.

Therefore, like the P-type diffusion layer 14 which is the base region, Ge
The forbidden band width Eg of Si containing
Since it is smaller than the case where only St is used as in the type diffusion layer 6, as shown in FIG. The energy barrier v2 for holes is larger than the energy barrier v1 for electrons (Vl × V2
) state can be realized.

On the other hand, as shown in FIG. 3, when a forward bias (VBE) is applied between the emitter region and the base region in the operating state, electrons are injected from the emitter region into the base region containing Ge. It passes through the base region, passes through the base-collector junction to which reverse bias VcB is applied, and is absorbed into the collector region, becoming a collector current.

At this time, some of the electrons injected from the emitter region to the base region recombine with the holes injected from the base region to the emitter region and become a base current, but as mentioned above, there is an energy barrier to the holes. Since v2 is larger than the energy barrier v1 for electrons, hole injection is restricted compared to the conventional method, and most of the injected electrons reach the base-collector junction and are absorbed in the collector region by the electric field caused by the reverse bias VcB. become.

In this way, due to the limitation of hole injection, compared to the conventional method,
Elimination of carriers in the base region can be reduced, emitter injection efficiency can be improved, and current amplification characteristics of the transistor can be improved.

Next, the operation of the MO3FET portion will be explained.

The current drive capability of MOSFET is proportional to the carrier mobility μ in the channel part, and the electron mobility in Sf is 1500eJ/V.s1 The hole mobility is 600c-/v.
-8, and the electron mobility in Ge is 3900c
j/V-s, hole mobility is 1900cj/V・S
It is.

Furthermore, it is generally known that in a mixture of St and Ge, the mobility changes continuously depending on the composition ratio, and as in both MOSFETs in FIG.
．． By introducing Ge into 16, the carrier mobility can be increased compared to the conventional case of using only Si, and the current driving ability can be improved.

Note that in the above embodiment, the bipolar transistor and the CM
A semiconductor device in which an O8FET and an NMOSFE are formed on the same substrate has been explained, but a bipolar transistor and an NMOSFE are also formed on the same substrate.
The present invention can be implemented in the same way even when a T or pibora transistor and a PMO5FET are formed on the same substrate.

〔Effect of the invention〕

As described above, according to the present invention, since the base region of the bipolar transistor is formed of a mixture of silicon and germanium, the injection of holes at the emitter-base junction is more restricted than before, and carrier recombination is reduced. This makes it possible to improve emitter injection efficiency and improve current amplification characteristics. Furthermore, by introducing germanium into the channel region of the insulated gate field effect transistor, carrier channel mobility can be increased compared to conventional transistors. It becomes possible to improve current drive capability, and a semiconductor device capable of high-speed operation can be obtained.

[Brief explanation of drawings]

FIG. 1 is a sectional view of an embodiment of the semiconductor device of the present invention, FIGS. 2 and 3 are energy band structure diagrams of the bipolar transistor portion of FIG. 1 in an equilibrium state and an operating state, respectively, and FIG. 4 is a conventional 5 and 6 are energy band structure diagrams of the bipolar transistor portion of FIG. 4 in an equilibrium state and an operating state, respectively. In the figure, 1 is a Si substrate, 14 is a P-type diffusion layer (base region), and 15 and 16 are channel regions. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] (1) In a semiconductor device having a bipolar transistor and an insulated gate field effect transistor in the same silicon substrate, the base region of the bipolar transistor is formed of a mixture of silicon and germanium, and the channel region of the field effect transistor is formed of a mixture of silicon and germanium. A semiconductor device characterized by incorporating germanium.