JPH0319038A - Data transmission/reception device - Google Patents

Abstract

PURPOSE:To inprove the test coverage for an abnormality check function and its after-process by adding a data conversion means to a return circuit means and converting the data to send it to a reception circuit when a return test is carried out by a transmission/ reception device. CONSTITUTION:A data conversion means is added to a return circuit means 1A. When a return test is carried out between a transmission circuit 18 and a reception circuit 19, the data conversion means converts the data received from the circuit 18 and sends it to the circuit 19 with an instruction of a host processor (CPU) 11. In this case, the abnormal result of comparison is produced by the function of a circuit 1A. Thus the operation can be shifted to the process of an abnormal system with no intervention given to the process of a microprogram from the CPU 11. Thus the test coverage is improved together with improvement of the reliability for the processes of the abnormal system such as the recovery of the retry and data, the analysis of the error factor, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a data transmitting/receiving device, and particularly to improving the operation confirmation of its components by repeating tests.

[Conventional technology]

Conventionally, in data transmission and reception, control of an interface function unit (hereinafter referred to as an adapter) between an external device and a system device has relied on a central processing unit (hereinafter referred to as a CPU) of the system device. However, in recent years, CP
The trend towards distributed processing is increasing due to the need to reduce U-control and create more highly functional system devices. In other words, the intelligence of adapters as interfaces with external devices has progressed, and a dedicated processing unit (hereinafter referred to as a local processor: LPU to compare with the CPU of a system unit) that controls the adapter and a memory (main memory) used by the LPU 16 have been developed. (hereinafter referred to as local memory 17 to distinguish it from the local memory 17) has become mainstream. What actually controls these hardware is the LPU microprogram, which is provided to the LPU 16 by either residing in the ROM 14 or loading it into the RAM 15 from the system device at the time of system startup.

In recent years, the scale of these microprograms has increased, making it possible to perform more complex and detailed control, and it has become important to verify LPU control using these microprograms.

Before such adapters became highly intelligent, the scale of microprograms was small, so verification was focused on the validity of the hardware's logic. Therefore, the programs used to test these devices deeply intervened in the adapter's operation, and the mainstream was to take over the processing that is currently performed by microprograms. However, in contrast to the verification of recent adapters that have large-scale microprograms, test programs created using conventional concepts can verify hardware logic but cannot verify microprograms.

The O8 and application program on the CPU side that operate such an adapter leave most of the adapter control to the microprogram. Therefore, the actual operating environment described above differs greatly from the time of test execution, which is also a serious problem.

An example of microprogram verification will be given below. LPU16, the currently mainstream high intelligence adapter
The microprogram and microprogram are designed to recognize that they must operate in the data loop test mode based on instructions from the CPU II side, that is, the test program (such as a 10 command).

FIG. 2 is a schematic flowchart of microprogram processing when this test mode is designated by the CPU II. The microprogram first performs data check processing such as parity and CRC on the transmission data, ie, test data, given from the CPU II side in process 21.Actually, this is done by calling process 20. Second, in process 22, the operations of the transmitting circuit 18 and the receiving circuit 19 are controlled, and the received data is stored in the local memory 17. Process 23 performs the same data check process on the received data as in process 20. First process 24 compares whether the sent and received data check calculations match, and a judgment process in process 25 detects abnormalities in the received data. .

At this time, if it is determined in process 25 that there is an abnormality, analysis of the cause of the error, retry, etc. are performed in process 27. Processing 20, which is data check processing of such a microprogram, is the same as that when operating under the above-mentioned actual operating environment. By the way, regarding the test function using these microprograms, Japanese Patent Application Laid-Open No. 63-6133
No. 6.

If a test is conducted based on the concept described in Publication No. 63-66642, the following problems occur.

That is, in the above-mentioned known example, the transmission data is transmitted through the short line IB.
The data will be received as is. This does not require the test program to intervene in the actual operating environment of the adapter. However, from the standpoint of microprogram test coverage, the data check calculation by process 20,
Since the comparison 9 judgment by processing 24 and 25 always determines normality, abnormality processing 27 is never entered. Therefore, with the technique according to the known example, it is not possible to achieve 100% test coverage of the microprogram. This processing 27 occupies most of the scale of a microprogram, and unless the coverage of this part is improved, the reliability of the microprogram will not be sufficient. Conventionally, in order to improve the coverage of this abnormal system processing 27,
The common method was to perform a long heat run test and wait for a sudden abnormality in the received data to occur. Alternatively, the test program had no choice but to intervene during the execution of processes 24 and 25, and in the end, the adapter control of the microprogram had to be unique to testing.

[Problem to be solved by the invention]

The above has described the verification of the microprogram itself using the data check function as an example. Therefore, the above-mentioned conventional technology has the following two problems.

First, unless the CPU 1 intervenes in microprogram processing, the coverage of abnormality processing 27 centered on the data check function cannot be improved. Moving away from the operating environment under O8 and application programs.

Second, in the above-mentioned known example, since the transmitted data and the received data are the same, it is completely impossible to improve the coverage of the abnormality processing 27 unless the CPU II intervenes in the microprogram.

A first object of the present invention is to provide a data transmitting/receiving device that can sufficiently improve verification accuracy without intervening from the CPU 11 side in microprogram processing, that is, even when the entire adapter is viewed as one black box. A second object is to provide a means that enables automatic conversion of transmission data, which is necessary for solving the second problem, directly from the CPU II side without making the LPU 16 and the microprogram recognize it. As a result, for the data return test, it is possible to enter the abnormal system processing 27 without intervening in the microprogram module, which is set to match the check results of transmitted and received data.

[Means to solve the problem]

The above purpose is to be connected between the upper processing unit and the line to send and receive data, and to
In a transmitting/receiving device having a local processing device operated under the control of the microprogram, a transmitting circuit, a receiving circuit, and a folding circuit between the transmitting circuit and the receiving circuit, the folding circuit means is provided with data conversion means, By configuring the data transmitting/receiving device, the data converting means converts data from the transmitting circuit and transmits the converted data to the receiving circuit according to an instruction from the higher-level processing device when performing a return test by the transmitting/receiving device. achieved.

[Effect]

Prior to instructing the adapter, ie, the microprogram, to enter the data loopback test mode, the test program on the CPU 1l side enables the interface arithmetic circuit IA. As a result, when the LPU 16 side, ie, the microprogram, starts data transmission, the text part, which is the main body of the transmission data, is converted by the circuit IA. The converted data becomes reception data via the short line IC, and is received by the reception circuit 19. The microprogram compares the result of the check operation of the received data with that of the transmitted data in a process 24. At this time, the comparison result becomes abnormal due to the action of the circuit IA, so that the processing can be transferred to the abnormality processing 27 without intervening in the processing of the microprogram from the CPU II side. Therefore, test coverage for the abnormality processing 27 that performs retries, data recovery, error cause analysis, etc. can be improved, and reliability can be improved. When the test program on the CPU 11 side receives a report of an abnormality in the received data, it performs the same logical operation on the transmitted data as in circuit IA in process 32. If the result of this operation and the received data all match, the test program is normal. shall be. Thereby, in addition to the validity of the abnormality processing 27 of the microprogram, the validity of the transmitting/receiving circuits 18 and 19 can be verified at the same time without interfering with the operation of the adapter 10.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail using the drawings. FIG. 1 is a block diagram showing the hardware configuration. Of these, 10 are the adapters to be tested,
11 is a CPU, 12 is a main memory, 13 is an interface circuit between the CPU II and the adapter 10, 14 is a ROM, and 15 is a RAM in which the microprogram is stored. Further, 16 is an LPU that controls 10, 17 is a local memory for storing transmitted and received data, 18.19 is a transmitting and receiving circuit, IA is a logic operation circuit for transmitting data conversion which is the key point of the present invention, IB and Ic are The shorting wires for shorting the transmitting and receiving circuits are the conventional one according to the above-mentioned known example, and the IC according to the present invention.

Appropriate logical operations should be added to the IA depending on which check method is adopted by the data check processing 20 performed by the LPU 16 and the microprogram.

The operation sequence of the present invention will now be described.

First, the CPU 1 and the test program inform the LPUI 6 and the microprogram via the interface circuit 13 that a test will be performed by primary data loopback, which will enable the logical operation circuit IA for converting the transmitted data. .

Then, transmit data, that is, test data is specified.

On the LPUI e side, the transmission data is (stored) in a certain area of the local memory 17.
is activated, performs a data check operation on the transmitted data, and stores the result in 17. When this is completed, the transmitting/receiving operation is performed in process 22. At this time, the transmitting circuit 18
Since the data output from the IA has been subjected to a certain logical operation by the IA, it enters the receiving circuit 19 as data different from the transmission data, that is, the test data.

The LPUI 6 stores the received data in a certain area within the LPUI 17 as in the case of transmission. The micro program is L so far.
When the control of the adapter 10 by the PUI 6 is completed, a process 23 activates the process 20 to perform a data check operation, and the result is stored in 17.A next process 24 compares the results of the data check operation of the transmitted and received data. Then, in a process 25 to determine whether or not they match, if they match, a process 26 reports successful reception to the CPU11.
In the present invention, if the transmitting/receiving circuits 18 and 19 are normal, the data has been converted by the IA, so abnormality processing 27, which was previously impossible, is entered. Here, the cause of the error is analyzed, a retry is executed, and if recovery is not possible, the abnormality of the received data is reported to the CPU 11 side.

On the CPUII side, that is, in the test program, the LPUI
When receiving a reception completion report from the 6 side, it is determined in a process 31 whether the report content indicates that the received data is abnormal.In the case of this embodiment of the present invention, the received data has been changed to a microprogram.

In other words, one of the purposes is to point out that there is an abnormality. Therefore, if the received data is abnormal, the first check is normal and the second check is performed.

Process 32 and subsequent steps are entered. In process 32, the test data given as transmission data to the LPUI 6 is converted by the same logical operation as the IA. Next, a process 33 reads the received data stored in the local memory 17 and compares it with the data converted by 32, and a determination process 3
According to 4, if all the compared data match, then
This means that the processing centered on the abnormal data check by the microprogram and the operation of the transmitting/receiving circuits 18 and 19 functioned normally. At this point, the test program displays on a CRT or the like that the test has been successfully completed in step 35, and ends the process.

In addition, when it is determined in process 31 that the report content due to the end of the reception operation is other than the above, or when there is a mismatch between the transmitted data and received data after conversion in process 34, the cause of the error is analyzed in detail. Therefore, the factor analysis process 36 is entered. As a result, the process 37 displays the occurrence of the error and its cause, and ends the process.

In the factor analysis process 36, the microprogram checks the contents of the reception completion report and performs processes 32, 33, and 34 to analyze the cause of the error. FIG. 4 is a matrix diagram summarizing the relationship between the results and error causes. That is, only when the microprogram points out an abnormality in the received data and all the results of the comparison process 33 of the transmitted and received data match, the process is considered to have ended normally. In the case where the microprogram reports that the comparison process 33 is normal and the received data is not abnormal, it can be determined that there is a defect in the data check processes 21, 23, 24, and 27 by the microprogram. Furthermore, in the case where the process 33 reports an inconsistency in the transmitted and received data, and the microprogram reports an abnormality in the received data, it is considered that processes 21, 23, 24, and 27 have operated correctly. Here, control processing 2 of transmission/reception operation
2 seems to be defective. Furthermore, even in a case where the process 33 indicates that there is a data mismatch and the microprogram indicates that there is no abnormality in the received data, it is likely that the process 22 is defective.

As described above, it can be seen that according to this embodiment, the coverage of the abnormal process 27 can be expanded, and the cause can be isolated for all other microprogram processes.

Therefore, the above four cases and processing 27. By analyzing the data and local memory 17, the cause of the malfunction can be analyzed in more detail. Therefore, the control function of the adapter 10 can be verified effectively without interfering with the microprogram.

〔Effect of the invention〕

Since the transmitting/receiving device of the present invention is configured as described above, it produces the effects described below.

First, there is no need to intervene in the processing of the microprogram that controls the adapter, so tests can be executed in a form that closely resembles the actual operating environment.

Second, it is possible to improve the test coverage of the microprogram abnormality check function and subsequent processing, and to increase the reliability of its operation.

Third, by adding to the test program a process to determine whether the microprogram has pointed out an abnormality in the received data, which is the opposite of the conventional method, it has become possible to more precisely isolate the cause of the failure.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a device for explaining the transmission/reception operation confirmation method according to the present invention, Fig. 2 is a flow chart of microprogram processing, Fig. 3 is a flow chart of test program processing, and Fig. 4 is a judgment based on the test program. FIG. 3 is a matrix diagram showing the relationship between error causes and error causes. 11...CPU, 12...Main memory (main memory)
. 13... An interface circuit between the CPU and the adapter 10. 14...RAM, 15...ROM. 16...Local processor that controls the adapter 10. 17...Memory (local memory) for the adapter 10. 8... Transmission circuit, 19... Receiving circuit. A... Transmission data conversion circuit according to the present invention. B: Short line according to conventional technology. C: Short line according to the present invention. 2nd Prisoner Akikuni

Claims (1)

[Claims] 1. A microprogram, a local processing device that operates under the control of the microprogram, a transmitting circuit, a receiving circuit, and the transmitting circuit, which are connected between a host processing device and a line and perform data transmission and reception. and a loopback circuit between the receiver circuit, the loopback circuit means is provided with data conversion means, and when a loopback test is performed by the transmitter and receiver, the data conversion means converts the data between the transmitter circuit and the receiver circuit according to an instruction from the higher-level processing device. A data transmitting/receiving device characterized by converting data from and transmitting the converted data to the receiving circuit.