JPH03190146A - Connection of semiconductor chip to pad - Google Patents

Abstract

PURPOSE:To make it possible to realize a highly reliable high-density connection by a method wherein bumps on the individual pads of a semiconductor chip mounted providing the pads on its upper surface are fitted in through holes in a wiring film and the bumps are fused to connect the individual wiring patterns of the wiring film to the pads on the upper surface of the chip. CONSTITUTION:In respect to the side of a semiconductor chip 20 in a wiring film 40, bumps 23 are fitted in through holes 44 and the individual holes 44 are positioned in such a way as to oppose to pads 22 and are fixed by adhesion. Also in respect to the side of a package 30 in the film 40, bumps 32 are fitted in through holes 45 in the same way and the individual holes 45 are positioned in such a way as to oppose to wiring patterns 31 and are fixed by adhesion. Then, the bumps 23 and 32 are temporarily heated at the melting point or higher of the bumps 23 and 32 through a reflow furnace. Thereby, the bumps 23 and 32 are fused, the holes 44 and 45 are filled and at the same time, the fused bumps cover the sides of the openings in the upper surfaces of the holes and are welded to wiring patterns 43 at the peripheral parts of the holes 44 and 45.

Description

[Detailed Description of the Invention] [Summary] With regard to the method of connecting wires to the pads of semiconductor chips, the purpose of this invention is to form multiple wiring patterns on the surface of a synthetic resin film with the aim of realizing highly reliable and high-density connections. h
A wiring film is used in which each wiring pattern has a through hole at the end thereof, and the through holes are lined up in a position corresponding to the pads on the semiconductor chip.
The through hole of the wiring film is fitted into the bump on each pad of a semiconductor chip mounted with the pad as the top surface, and the bump is melted. Each wiring pattern of the wiring film is configured to be connected to a pad of the semiconductor chip.

(Industrial Application Field) The present invention relates to a method for connecting a semiconductor chip to a pad.

A semiconductor chip is mounted within a package with its pads and inner lead portions of the package electrically connected.

In recent years, semiconductor chips have become larger and have more pins.
Along with this, the pitch of pads has become narrower, and the development of a high-density interconnection method has been desired.

[Conventional technology]

Methods that allow high-density connection using commonly used wire bonding methods include the flip-chip method shown in FIG. 9 and the rAB method shown in FIG. 10.

In the flip-chip method, as shown in FIG. 9(A), bumps 3 provided on pads 2 of semiconductor chip 1 are butted against bumps 6 provided on wiring pattern 5 on package (or substrate) 4. By heating, the bumps are melted and connected as an alloy lump 7, as shown in FIG. 9(B).

In TABa, as shown in FIG. 10, the bumps 12 on the pads 11 of the semiconductor chip 10 are placed face up.
The pad 11 is connected to one end of the lead 13 by being brought into contact with the lead 13 and heated, and then, with the face down, the other end of the lead 13 is brought into contact with the wiring pattern 15 on the substrate 14 and heated to form an alloy layer. formed and connected.

[Problem to be solved by the invention]

With the Noritsubu chip method, alignment is performed face-down, which makes alignment difficult, and when the bumps become dense,
Reliability decreases.

In addition, in the TAB method, since the lead 13 itself requires mechanical alignment, the lead 13 needs to have a certain degree of thickness and width. There is a limit to how narrow it can be. Also lead 1
Since the leads 3 are independent from each other, misalignment is likely to occur at the tip of the lead.

Therefore, the TAB method cannot sufficiently cope with high-density wiring.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for connecting pads of a semiconductor chip, which makes it possible to realize highly reliable and high-density connections.

[Means to solve the problem]

The invention of claim 1 has a plurality of wiring patterns on the surface of a synthetic resin film, a through hole is provided at the end of each wiring pattern, and the through holes are lined up in an arrangement corresponding to pads on a semiconductor chip. The semiconductor chip has a bump on each pad, and the through hole of the wiring film is applied to the bump on each pad of the semiconductor chip mounted with the pad as the top surface. The configuration is such that each wiring pattern of the wiring film is connected to a pad of the semiconductor chip by fitting the holes and melting the bumps.

The invention according to claim 2 has a plurality of wiring patterns on the surface of a synthetic resin film, a through hole at the end of each wiring pattern, and the through hole is arranged to correspond to a pad on a semiconductor chip. The above semiconductor chip has a bump on each pad, and the above wiring is placed on the top surface of the semiconductor chip mounted with the above pads as the top surface. bonding the film with the adhesive layer,
The through hole of the wiring film is fitted into the bump on each pad, and the bump is melted to connect each wiring pattern of the wiring film to the pad of the semiconductor chip.

[Effect]

In the wiring film according to the first aspect, by forming the wiring pattern on the film, it is possible to narrow the pitch of the wiring pattern.

Fitting the through holes at the ends of the wiring patterns to the bumps on the pads on the semiconductor chip facilitates positioning of each wiring pattern with respect to the pads.

In order to connect the wiring pattern to the pad by melting the bump, a simple and inexpensive method such as reflow is used.

The adhesive layer on the back surface of the wiring film in claim 2 improves the fixing strength of the wiring film to the semiconductor chip, and prevents stress from concentrating on the connection portion between the wiring pattern and the pad.

〔Example〕

FIG. 1 shows a method of connecting a semiconductor chip to a pad according to an embodiment of the present invention.

As shown in FIG. 2A, the surface 20 of the semiconductor chip 20
Pads 22 are formed in a row along each side 21-1 to 21-4 at a narrow pitch p1.

Regarding this semiconductor chip 20, as shown in FIGS. 1(B) and 2, bumps 23 made of a pb-8n alloy are formed on each pad 22.

The size of this bump 23 is determined in relation to the size of the through hole in the wiring film, which will be described later. The diameter d is the dimension at which the through hole fits and the height h is the size at which the top of the bump 23 is the through hole. It has a more protruding dimension.

Package (substrate) 30 on which the semiconductor chip 20 is mounted
On the top, a wiring pattern 31 is formed with a pitch D2 (>pI) as shown in FIG. 1(C).

This package 30 also has bumps 3 at the ends of the wiring pattern 31 as shown in FIG. 1(D).
form 2.

In FIGS. 1(G) and 5, the wiring film 40 is made smaller.

As shown in FIGS. 1(G) and 5, the wiring film 40 includes a polyimide resin film 41 as a support for supporting a wiring pattern, which will be described later, and a silicone adhesive on the lower surface 41a. 1142, and a plurality of A! on this upper surface 41b! wiring pattern 43 and each wiring pattern 43
It consists of through holes 44 and 45 formed at both ends.

The wiring pattern 43 has a pitch of p+ at one end and a pitch of p2 at the round end, so that the wiring pattern 43 is parallel/v, the through holes 44 are arranged at a pitch of p+, and the through holes 45 are arranged at a pitch of p2.

This wiring film 40 is produced by depositing Ae on the upper surface 41b of the film 41 shown in FIGS. 1(E) and 3 to form an Ae film, and etching this.
) and forming a wiring pattern 43 as shown in FIG.
It is manufactured through a step of forming through holes 44 and 45 at both ends using a laser.

The above Aell is extremely thin, and the wiring pattern 43
can be formed with a pitch narrower than the lead pitch of the A8 method, and furthermore, the presence of the film 41 prevents the wiring pattern 43 from shifting.

Therefore, the pitch p of the pads 22 on the semiconductor chip 20 is
1 is narrow, the wiring pattern 43 can be formed with a pitch sufficiently corresponding to this.

Further, the wiring film 40 has a length 1 corresponding to the length 2 of the side 21-1 of the semiconductor chip 2o, and the length 2 of the side 40C corresponds to the length 2 of the side 21-1 of the semiconductor chip 20.
A number of wiring patterns corresponding to the number 2 are formed. As a result, the pads 22 lined up on one side of the semiconductor chip 20
As will be described later, only one wiring film 40 is needed to connect all of the wires.

Connections to the pads 22 on the semiconductor chip 20 are made as described below.

First, as shown in FIG. 1H, the semiconductor chip 20 is fixed to the package 30 with its surface 20a facing upward.

Next, as shown in FIG. 1H and FIG. 6, the wiring film 40 is oriented so that the wiring pattern 43 faces upward, and one end is attached to the semiconductor chip 20 using the adhesive layer 42 on the bottom surface. The package 20a on the - side 21-1 side is glued, and the other end is glued on the package 30.

On the semiconductor chip 2o side, the wiring film 40 is
The through holes 44 are fitted with the bumps 23, and each through hole 44 is positioned so as to face the pad 22 and fixed with adhesive.

Similarly, on the package 30 side, the through hole 4
5 is fitted with the bump 32, each through hole 45 is positioned so as to face the wiring pattern 31, and fixed by adhesive.

Through hole 44.45 with bad 22. Wiring pattern 4
3, it is sufficient to fit the through holes 44.45 into the pans 123.32, and this can be done relatively easily and with high precision.

The tops 23a, 328 of each pan 123.32 are inserted through through holes 44.45 into the upper surface of the wiring film 40 with dimensions C.
It stands out.

Regarding other wiring films 40A, 40B, and 40C,
Similarly to the above, the remaining sides 21 to 21- of the semiconductor chip 20
4. Glue and fix.

2. Next, the bread is passed through a reflow oven and temporarily heated to a temperature higher than the melting point of the bread 123.32.

As a result, the bumps 23 and 32 are melted, and as shown in FIG.
As shown in FIG. 7, the wiring pattern 43 fills the through hole 44.45 and covers the opening side of the upper surface, and is welded to the wiring pattern 43 around the through hole 44.45.

As a result, the wiring to each pad 22 of the semiconductor chip 20 is completed, and at the same time, the wiring pattern 31 of the package 30 is completed.
The connection to is completed.

Here, the wiring pattern 43 will be compared with the lead 13 in FIG.

Since each lead 13 is independent, the lead 13 itself requires a certain level of mechanical strength, a certain degree of thickness,
It is necessary to have a width, and there is naturally a limit to narrowing the width.

On the other hand, in the case of the wiring pattern 43, mechanical strength is not required for the wiring pattern 43 itself due to the presence of the noilum 41, and the wiring pattern 43 can be made much thinner than the lead 41.

Therefore, etching becomes easier and the wiring pattern 43
The pitch can be made even narrower than that of the beam 41.

As a result, 1. it becomes possible to connect wires at a higher density than in the past.

Further, the wiring film 40 has bumps 23A.

In addition to the anchoring effect of 32A and through holes 44 and 45, it is fixed by adhesion by contact@E42.

Since most of the thermal stress is absorbed by the adhesive layer, the thermal stress is absorbed by the bump 23A.

32A, and reliability is improved accordingly.

Further, as can be seen from FIG. 1()-1), since the wire connection portion is on the top surface, the wire connection portion can be seen, making it easy to inspect the wire connection state.

It is also possible to repair the connection part.

Further, the semiconductor chip 20 has a pad 22 on the top side,
Since the lower surface is in close contact with the package 30, the heat dissipation of the semiconductor chip 20 is good.

Note that the pitch p2 of the wiring pattern 31 of the package 30 is
Since this is larger than the pitch p1 of the bumps 23 on the semiconductor chip 20, a method other than the above-mentioned embodiment may be used for connection to the wiring pattern 31.

FIG. 8 shows another embodiment of the invention.

In the figure, parts corresponding to those shown in FIG. 1 are given the same reference numerals.

The wiring film 50 shown in FIG. 8(B) is similar to the wiring film 50 shown in FIG.
1) Four wiring films inside 40.40A.

It has a configuration in which 40B and 40G are combined into one sheet.

Wiring butter 1 is attached to each wiring film part 50 to 50-4. - is formed.

This wiring film 50 is connected around the center opening 50a to the bumps 23 on the pads 22 of the semiconductor chip 20,
The outer circumferential side is connected to the wiring pattern on the package.

[Efficacy of invention Song Dynasty]

As explained above, according to the invention of claim 1, 'V'4
Even if the pads on the physical chip are dense, the wiring pattern on the wiring film can be formed with a corresponding degree of padding, and the positioning can be done by fitting with the bumps of the through holes, so each The ends of the wiring pattern can be easily and reliably positioned on each pad, and the bumps are melted by reflow to electrically connect the wiring pattern and the pads, making it easy to make electrical connections. It can be done by method.

Therefore, wiring to pads on the semiconductor chip can be easily and reliably connected.

Further, according to the invention of claim 2, since the fixing strength between the wiring and the film is improved by adhesion, stress is less likely to be applied to the electrical connection between the pad and the wiring pattern, and the connection to the pad is difficult. Reliability can be further improved.

[Brief explanation of drawings]

FIG. 1 shows an embodiment of the method of connecting wires to the pads of a semiconductor chip according to the present invention; FIG. 2 is an enlarged view of a part of FIG. 1 (B); and FIG. A diagram showing the film in Figure (E), Figure 4 is a diagram showing the film in Figure 1 (
Figure 5 shows the film on which the wiring pattern of Figure 1 (G) is formed, Figure 6 shows the positioning state of Figure 1 (H). FIG. 7 is an enlarged view showing the completed state of connection in FIG. 1 (1). FIG. 8 is a view showing another embodiment of the present invention. FIG. 9 is a conventional example. FIG. 10 is a diagram showing another conventional example. 44.45 indicates through holes.

Claims (1)

[Claims] (1) A synthetic resin film (41) has a plurality of wiring patterns (43) on its surface, and each wiring pattern has a through hole (44) at the end thereof, and the through hole Using wiring films (40, 50) arranged in a manner corresponding to the pads (22) on the semiconductor chip (20), the semiconductor chip (20) has bumps (23) on each pad (22). a semiconductor chip (20) having a configuration having the above-mentioned pads and mounted with the pads facing upward;
The bumps (23) on each pad (22) of the wiring film (40) are fitted into the through holes (44) of the wiring film (40), the bumps (23) are melted, and each of the wiring films (40) is A method for connecting a semiconductor chip to a pad, the method comprising connecting a wiring pattern (43) to a pad (22) of the semiconductor chip (20). (2) A plurality of wiring patterns (43) are provided on the surface of the synthetic resin film (41), and a through hole (44) is provided at the end of each wiring pattern, and the through hole is formed on the semiconductor chip (20). The wiring film (42) is arranged in a manner corresponding to the pad (22) of
40), the semiconductor chip (20) has a bump (23) on each pad (22), and the semiconductor chip (20) is mounted with the pad as the top surface.
The wiring film (40) is placed on the top surface of the adhesive layer (4).
2) and glue the bumps (2) on each pad (22).
23) by fitting the through hole (44) of the wiring film (40) into the bump (23) and melting the bump (23).
A method for connecting a semiconductor chip to a pad, the method comprising connecting each wiring pattern (43) of the wiring film (40) to a pad (22) of the semiconductor chip (20).