JPH0318975A - Data storage - Google Patents

Abstract

PURPOSE:To easily retrieve uncertain secret or normal data by reading out successively the secret and normal data and displaying both data in a secret mode. CONSTITUTION:A CPU 20 contains a RAM 21, a switch input part 22, and a display part 25. Then the CPU 20 detects whether an input password is coincident with the prescribed one or not. If so, the secret and normal data stored in the RAM 21 are successively read out and displayed. Thus it is possible to easily retrieve the uncertain secret or normal data without deteriorating the secrecy of the secret data.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention stores a large amount of data, receives key operations, etc.
The present invention relates to a data storage device that sequentially displays such data.

[Prior art and its problems] A conventional data storage device 1, such as an electronic watch with a data puncture machine f@, has a normal mode and a secret mode as modes related to the data bank function, and the normal mode requires secrecy. In secret mode, it displays data that you do not want others to know, that is, data that requires secrecy. To maintain confidentiality, entering the secret mode from the normal mode requires inputting a password known only to the user.

By the way, in this type of device, data set as normal data can be displayed only in normal mode, and data set as secret data can be displayed only in secret mode. Therefore, if you forget whether data has been set as normal or secret data, it is necessary to switch modes and search for data in both modes, which is extremely troublesome.

[Purpose of the Invention] The present invention has been made in view of the above-mentioned circumstances, and is capable of retrieving data for which one has forgotten whether it has been set as normal data or secret data, without compromising the confidentiality of the secret data. The purpose of the present invention is to provide a data storage device that can easily perform the following operations.

[Summary of the Invention] In order to achieve the above object, the present invention provides a reading unit 11m that sequentially reads and displays secret data and normal data in secret mode.

[Example] The present invention will be specifically described below based on an example shown in the drawings. In this embodiment, the present invention is applied to an electronic wristwatch equipped with a data bank function that is equipped with a liquid crystal display panel and displays various data stored therein.

Figure 1 shows the appearance of this embodiment, and the figure (&) shows the lid body 1.
The figure shows the closed state on the switch device part 7, and the same figure (b)
1 shows an open state of the lid 1 which is attached to the switch device E part 7 by a pin 6 so that it can be opened and closed. That is, on the front side of the lid l, a pointer display section 2 having an hour hand 31 and a minute hand 4 is arranged. A liquid crystal display panel 5 is disposed on the back side of the lid 1. The liquid crystal display panel 5 includes a first display section 5a in which dot displays are arranged in a matrix and displays characters, etc., and a 7-segment display section in two stages.
It consists of a second display section 5b that displays the time, telephone number, etc., arranged in two digits. Further, a secret mode indicator 5C that is lit in the secret mode is arranged at the lower left of the second display section 5b, and a secret indicator 5d that is lit when the data being displayed is secret data is arranged at the lower right. Below the liquid crystal display panel 5, in the vicinity of both of the display bodies, characters or marks representing the respective display bodies are printed and displayed. On the upper surface of the switch device section 7, there are a number of key switches, such as a left arrow mark key 8a and an up arrow mark key 8b, which will be described later.
, an up arrow mark key 8C, a right arrow mark key 8d, a data type change key 8f, a set key 8g, etc. are arranged in a matrix on the sheet switch 8.

FIG. 2 shows the circuit configuration of this embodiment. The oscillation circuit 11 is a circuit that always sends out a signal with a constant frequency, and the frequency division circuit 12 divides the frequency of the signal to a predetermined frequency. Above, it is connected to the motor drive circuit 13 and the time counting circuit 1.
This is the circuit that sends the signal to 8. The motor drive circuit 13 receives the sent signal and drives the step motor 14, and the step motor 14 is driven by the motor drive circuit 13 to move the pointer 16 via the wheel train mechanism 15. Note that the time adjustment mechanism 17 is a mechanism that adjusts the position pointed by the hand 16 via the wheel train mechanism 15.

The time counting circuit 18 counts the signal from the frequency dividing circuit 12 to obtain the current time, and sends this to the display section 25, and also sends a day carry signal to the date counting circuit 19 every time it counts 12:00 p.m. The 0 date counting circuit 19, which is the sending circuit, is
This circuit counts the day carry signal from the time counting circuit 18 to obtain the date and sends it to the display section 25.

The CPU 20 sends control signals to each circuit section.

This is a circuit unit that controls these and processes and sends data from each circuit unit. The RAM 21 is a storage circuit having the configuration described below and exchanging data with it under the control of the CPU 20. The key power unit 22 is a circuit unit that includes various key switches of the switch device unit 7 described above and other switches, and sends a corresponding key power signal to the CPtJ 20 when any of these is operated. The power supply control circuit 24 is a circuit unit that receives a control signal from the CPU 20 and controls the power supply to the display unit 25. The display switching circuit 25a selects one of the data from the time counting circuit 18, the date counting circuit 19, and the CPU 20 based on the control signal from the CPU 20, and selects the data from the decoder driver 25.
This is the circuit section that sends the signal to b. The decoder driver 25b is a circuit that drives the display device 25c to display the sent data. Further, the display device 25c includes the above-mentioned liquid crystal display panel 5, and is driven by the decoder driver 25b.
This is a circuit section that displays normal data or secret data consisting of letters and numbers.

FIG. 3 shows the configuration of the RAM 21 mentioned above, namely:
The RAM 21 consists of a register section MR and a data storage section MD.The register section MR is provided with various registers, and the data storage section MD is configured to store data from a large number of rows, each of which is given a row address starting from row address 1. Each line consists of a flag area MF, a character area M[, and a number area MII.

In the register section Ml, the mode register M is a register that specifies the mode; when set to 0, it is a data bank mode in which normal or secret data is displayed on the liquid crystal display panel 5, and when set to l, it is a data bank mode that displays normal or secret data on the liquid crystal display panel 5. The time modes for displaying the current time and date on the liquid crystal display panel 5 are respectively designated. The mode register N is a register that specifies whether the data bank mode is a lower mode, normal or secret, and is set to O in the normal mode and l in the secret mode. Pointer P is a pointer that specifies each row of the data storage section MO by its row address. The normal data number register NT is a register that stores the number of normal data stored in the data storage unit M(+), and the total data number register AT stores the number of total data stored in the data storage unit MD. This is a register for

Each row of the data storage section Mo has l data.

For example, l's telephone number data, l's schedule data, etc. are stored. The flag area ME of each row is an area where a flag is set when the data stored in that row is secret data (hereinafter referred to as row address l, 2.3, . . . ... respectively as flags M 11, M 2 I, M
3 I, ...), character area M of each line
1 is an area for storing the character data portion of the data of that line. Further, the numeric area Ms of each row is an area for storing the numeric data part of the data of that row.

Figure 4 is a general flowchart showing an overview of the operation of this embodiment, and Figure 5 is a data bank mode display process (step s6) in the general flowchart.
FIG. 6 is a flowchart showing in detail the data bank mode key processing (Stella 7'S 17) in the general flowchart. In addition, Fig. 7, Fig. 8, Fig. 9 and Fig. 1
FIG. 0 shows the display changes on the liquid crystal display panel 5 in response to various key operations. Hereinafter, operations in various states will be explained with reference to these drawings.

l Operation associated with the first key When a predetermined period of time has elapsed after any key operation, the power supply to the display section 25 is stopped (see Figure 2) and the display on the liquid crystal display panel 5 is stopped. has been stopped (
7 (a) and 8 (a)), that is, in this case, it is in a state where it is waiting for key human power (step S1). When there is key human power from any key, , Proceeds from this step 51 to step S2, starts power supply to the display section 25, sets the data bank mode (step S3), sets the data bank mode to the normal mode (step S4), and then switches the data bank mode to the normal mode (step S4). Please confirm that the mode is set (step S5),
Proceed to the data bank mode display process of step S6, that is, the flowchart of FIG. 5, and then step 320
Then, confirm that the mode is normal, and in step 321, the value of the normal data number register NT is set to O.
In other words, it is determined whether normal data is stored, and if it is stored, the process proceeds to step S22, and in this step, the flag area M of the row of the data storage unit MD specified by the value of the pointer P is It is determined from the flag (that is, the flag M p l) whether the data in that row is normal data, and if it is not normal data,
Execute increment processing to add 1 to pointer P (
Step 323), and then checks whether the value of pointer P is thicker than the value of total data count register AT, that is, whether pointer P has reached the point where it specifies an unrecorded line (step 524), and checks whether it has not reached yet. If the time is reached, the process directly returns to step S22, but if the pointer P has been reached, 1 is set (step 525) to specify the line with the line address l, and then the process returns to step S22. Repeat steps 522-525),
When the pointer P specifies the line storing normal data, from step S22 to step 329
Then, the data of that row is displayed on the liquid crystal display panel 5 (see FIG. 7(b)).
In step S8 of the figure, it is confirmed that there is no key input after that, and in step S9 it is confirmed that a certain period of time has not yet elapsed since the start of the above display, and the process returns to step S5. From then on, steps 520 to S22.329
, S8, S9, and S5 are repeated, and when the above-mentioned certain period of time has elapsed, the process proceeds from step S9 to step S10,
The power supply to the display section 25 is stopped, and the display on the liquid crystal display panel 5 is stopped (see FIGS. 7(b) and 7(a)).

Note that the data bank mode display process (step S6)
), if it is determined in step 521 (FIG. 5) that normal data is not stored in the data storage unit MO, the process proceeds to step S26, the value of the total data count register AT is checked, and the data storage unit MD is Check to see if no data is stored, not just normal data (in other words, check if secret data is stored), and if secret data is stored, the LCD panel 5 displays the secret data. A display as shown in FIG. 8(b) is displayed to indicate that the
, In addition, when the secret data is not stored and no data is stored in the data storage unit MQ, the process advances from step 526 to step 530, and a message indicating that there is no data is displayed on the liquid crystal display panel 5. A display is made. Note that the display that the secret data is stored and the display that all the data is not stored are also no longer displayed after a certain period of time (step S9.510).
).

(2) When the normal data is displayed in sequence, when the first normal data is displayed on the liquid crystal display panel 5 by the first key operation, the other normal data are sequentially displayed on the liquid crystal display panel. 5 and check them, operate the above-mentioned up arrow mark key 8b or up arrow mark key 8C while normal data is displayed on the liquid crystal display panel 5. In this case, each time the above operation is performed, steps S8 to Sit,
After passing through S16, the process proceeds to step S17, which is the data bank mode key process, that is, the flowchart in FIG.
Step S40. Step 34B or S5 via S45
Step S5 detects the key operation and confirms that the normal data is stored in the data storage unit MO.
47 or 556), while not incrementing the pointer P by +1 or decrementing it by -1,
The data in the row specified by pointer P is sequentially checked to find normal data, but after the pointer P specifies the final data by the above increment process, it returns to specifying the data in row address l, and vice versa. After the pointer P specifies the data in the row with the row address l through the decrement process, it returns to specify the final data (step 34
8 to 351 or steps S57 to 560), when normal data is newly searched for as described above, the process proceeds from step 517 in FIG. (Steps 320 to S22.529). Therefore, when the down arrow mark key 8C is operated, the display in FIG. 9 (J
As shown in L), (b), and (C), the stored normal data is displayed on the liquid crystal display panel 5 for the mth order.

3 Operation in secret mode To switch the mode from normal mode to secret mode, as described above, when normal data is displayed on the liquid crystal display panel 5 (i.e., in FIG. 7(b)
), or when a display mode indicating that normal data is not stored in the data storage unit MD but secret data is stored is displayed on the liquid crystal display panel 5 (i.e. 8), first operate the secret key 88, and then input the password using the numeric keypad of the seat switch 8. At this time, the process goes through steps S8, Sll, and S16 to step 317, that is, the flowchart of the sixth UgJ, to detect the operation of the secret key 8e (step 540), to confirm that it is still in the normal mode (step 541), and to confirm that the input Execute password input processing to set a password in a predetermined register (Step 542), then check whether the input password matches a preset password (Step 543), and if it matches, enter the mode register. Set N to 1 to enter secret mode. Thereafter, the process proceeds to step S6, that is, the flowchart of FIG. 5, via step S5 of FIG. When the normal data displayed on the display panel 5 (steps S20, S28.529) is stored in the data storage section MQ and the mode is switched during the display as shown in FIG. 7(b), , the normal data continues to be displayed on the liquid crystal display panel 5 (see FIG. 7(d)), and since no normal data is stored in the data storage section MO, the liquid crystal display panel 5 continues to display the normal data as shown in FIG. 8(b). ) is displayed and the mode is switched, the secret data specified by the pointer P in the previous secret mode is displayed on the liquid crystal display panel 5, and the data being displayed is also secret data. In order to indicate this, the aforementioned secret display 5d is lit (see FIG. 8(C)).

In the above state, when the up arrow mark key 8b or the down arrow mark key 8C is operated, the pointer P is incremented by +1 or decremented by -1 each time. The normal data and secret data stored in are sequentially and cyclically designated (step 56).
5 to S69 or steps 570 to 374), the specified data is sequentially displayed on the liquid crystal display panel 5 (steps S5.320, 328.329), for example, by operating the down arrow mark key 8C. 1st O
As shown in the figure, the data stored in each row of the data storage unit MO is sequentially displayed on the liquid crystal display panel 5 starting from the lowest row address.
As shown in (d), when secret data is displayed, the secret display body 5d is lit.

When changing the data already stored in the data storage unit MD from normal data to secret data or from secret data to normal data, display the data on the liquid crystal display panel 5 in the secret mode ( In other words, specify it with pointer P).

Then, operate the data type change key 8f (see FIG. 1(b)). At this time, the operation of the data type change key 8f is detected in step S75, and the process goes through step 376 to step 377, where it is determined whether the data specified by the pointer P at that point is normal data or secret data, and whether the data is changed to normal data or If so, it is treated as secret data, and if it is secret data, it is treated as normal data (steps 57B, 579).

Also, how to set data in the data storage unit Mp.

In the secret mode, operate the set key 8g (see FIG. 1(b)), and then
This is done by operating the numeric keypad etc. (Step 3)
80).

(0 Other operations When switching from data bank mode to time mode,
In the data bank mode, when normal or secret data is displayed on the liquid crystal display panel 5, the mode switching key ah (see FIG. 1(b)) is operated. At this time, in response to the operation, it is detected that the data bank mode is still in the data bank mode in step 512 through steps S8 to Sll, and the mode register M is set to 1 to switch to the time mode (step 513), and then step S5 is executed. Then, in step S7, the time and date are displayed on the liquid crystal display panel 5 (see FIG. 7(c)), and when there is no other key operation for a certain period of time, the liquid crystal display panel 5 is displayed as shown in FIG. Although the display of is stopped (step S9.510
), if the mode switching key 8h is further operated during that time, the mode returns to the normal mode of the data bank mode (steps 38 to S12.314.315).Further, in the time mode, the left arrow mark key 8a, the up arrow When the mark key 8b, numeric keypad, etc. are operated, the process goes from step S8 to step 31B via 311 and Si2, where clock mode key processing such as time adjustment is performed.

It should be noted that the present invention is not limited to the above-mentioned embodiments, and can be modified and applied in various ways without departing from the scope of the present invention.

[Effects of the Invention] As described above in detail, the present invention relates to a data storage device provided with a read control means for sequentially reading out and displaying secret data and normal data in the secret data mode. To provide a data storage device capable of easily searching for data for which one has forgotten whether it has been set as normal data or secret data with a difference of l or x, without impairing data confidentiality.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the appearance of one embodiment of the present invention, FIG. 2 is a diagram showing the circuit configuration of the above embodiment, and FIG. 3 is a diagram showing the RA in FIG. 2.
4 is a general flowchart showing an overview of the operation of this embodiment, and FIG. 5 is a flowchart showing details of the data bank mode display process in FIG. 4.
FIG. 6 is a flowchart showing details of the data bank mode key processing in FIG. 4, and FIGS. 7 to 10 are diagrams showing display changes accompanying various key operations. l... Lid body, 2... Pointer display section, 5.
...Liquid crystal display panel, 5a...First display section, 5b...Second display section, 5C...Secret mode display body, 5d... ... Secret display body, 6 ... Bin, 7 ... Switch device section, 8a ... Left arrow mark key 8b ...
...Up arrow mark key, 8C...Up arrow mark key, 8d...Right arrow mark key, 8e...
...Secret key, 8f...Data type change key 8g...Set key, 8h...
...Mode switching key 20...CPU, 21...
...RAM, 24...power supply control circuit,
25...Display unit, 25a...Display switching circuit, 25b...Decoder dryer I, 25c
... Display device, NT ... Normal data number register, AT ... Total data number register,
M[...Flag area, ML...Character area, MN...Numeric area. Patent Applicant Casio Computer Co., Ltd. Figure (a) Figure 7 (L) ↓ Kino (Buch Figure ↓ Maki - ↓ (b) V Key Figure ↓ Maki - ↓ Maki - Figure 10

Claims (1)

[Scope of Claims] Storage means for storing at least two groups of data, a first and a second group; and a first reading means for sequentially reading out and displaying the first group of data stored in the storage means. a password input means for inputting a password; a detection means for detecting whether the password input from the password input means matches a predetermined password; and when a match is detected by the detection means. and second reading control means for sequentially reading and displaying the first and second groups of data stored in the storage means.