JPH03187584A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To easily and efficiently execute two-dimensional filtering processing by rearranging the list of signal charges read out in parallel on a signal read-out line through a switch matrix in accordance with the positional relation of photoelectric converting parts of n-line and m-column, and using it for multiplication processing with a filter factor. CONSTITUTION:A signal corresponding to the signal charge stored in each designated photoelectric converting part 2 of n-lines and m-rows is read out in parallel through nX-mpieces of the signal read-out lines. Then, after the signals from the respective photoelectric converting parts 2 of n-line and m- column read out through these signal read-out lines are controlled and replaced with each other into arrangement order to meet the positional relation of the respective photoelectric converting parts 2 of n-line and m-column through the switch matrix 6, these respective signals of n-lines and m-rows are multiplied by prescribed factors respectively by using plural multipliers 7a to 7c, and the total sum of each multiplied value by the multiplier is obtained through an adder 9. Thus, the two-dimensional filtering processing can be executed easily and efficiently.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state imaging device that has a two-dimensional filter function and is capable of obtaining a video signal subjected to filtering processing in real time.

[Prior Art] Recently, various technologies have been developed for electronically capturing and inputting images of objects using solid-state image sensors such as CCD image sensors and MOS image sensors, and various technologies have been realized as video cameras, electronic still cameras, etc. There is.

This type of solid-state image sensor (image sensor) basically has multiple photoelectric conversion sections arranged in a matrix, and each photoelectric conversion section generates and accumulates signal charges according to the amount of incident light. The data are configured to be read out sequentially in time series via a charge transfer unit (transfer register). Note that solid-state imaging devices such as the above-mentioned MOS image sensor have a function to hold the signal charges accumulated in the photoelectric conversion section, regardless of whether the signal charges accumulated in the photoelectric conversion section are read out. The signal charge accumulated therein is erased by receiving a reset signal.

However, when handling video signals obtained through such an image sensor, image signal processing may include, for example, two-dimensional bypass filtering processing to obtain differential values between adjacent pixels and extract edge components of the image, and illumination processing. Two-dimensional filtering processing is often performed to correct unevenness. This two-dimensional filtering process basically focuses on the pixel of interest.

A predetermined weighting is performed on a plurality of surrounding pixels and coefficients by performing a convolution integral operation. In other words, this two-dimensional filtering process conventionally involves storing pixel signals read out in time series from a solid-state image sensor in shift registers for n lines, and delaying the pixel signals obtained from each of these shift registers. This is achieved by processing to obtain signals of (n×m) pixels, multiplying each of these signals by a predetermined filter coefficient, and then calculating the sum of the signals.

In addition, in a CCD image sensor, for example, the signal charges accumulated by a plurality of photoelectric conversion units are vertically transferred for each column, and the signal charges read out line by line at the output end are transferred horizontally. It is configured to read out each of the signal charges in time series. Furthermore, a MOS image sensor is configured to read out each signal charge in time series by sequentially specifying photoelectric conversion units in a matrix in the row and column directions.

However, a two-dimensional filtering processing circuit for performing two-dimensional filtering processing on the video signal (signal charge) read out in time series from such an image sensor is constructed as a dedicated hardware circuit, and is connected to the output stage of the solid-state image sensor. It is undeniable that the configuration of the image processing device will be quite large-scale in order to connect and obtain the desired filtering output. Moreover, there is a problem that filtering output cannot be obtained in real time.

[Problems to be Solved by the Invention] Conventionally, when performing two-dimensional filtering processing on a video signal obtained from a solid-state image sensor, a dedicated two-dimensional filtering circuit is installed outside the solid-state image sensor. It is necessary to construct the image processing apparatus as a circuit, and there is a problem that the configuration of the image processing apparatus is quite large and that the filtering output cannot be obtained in real time.

The present invention has been made in consideration of these circumstances, and its purpose is to easily and in real time obtain a filtering output for a video signal required from a solid-state image sensor, particularly a MOS image sensor, etc. It is an object of the present invention to provide a solid-state imaging device that can be easily handled and is highly practical.

[Means for Solving the Problems] A solid-state imaging device according to the present invention has a plurality of photoelectric conversion surfaces arranged in a matrix and having a function of retaining signal charges regardless of whether the signal charges are read out. Selecting and specifying the photoelectric conversion units by sequentially shifting the row position one row at a time using consecutive 0 rows of these photoelectric conversion units as a unit, and selecting and specifying the row positions of the photoelectric conversion units using consecutive m columns of the photoelectric conversion units as a unit. A photoelectric conversion unit specifying means is provided for selecting and specifying the position while sequentially shifting the position one column at a time, and corresponds to the signal charge accumulated in each photoelectric conversion unit in the 0th row and m column specified by the photoelectric conversion unit specifying unit. (n×m)
At the same time, the signals from each photoelectric conversion unit in row 0 and column m, which are read out through the signal readout lines, are transmitted through the switch matrix to each photoelectric conversion unit in row 0 and column m. After controlling the arrangement order according to the positional relationship of the conversion units, each of the signals in n rows and m columns is multiplied by a predetermined coefficient using a plurality of multipliers. The present invention is characterized in that the total sum of multiplication values is determined through an adder.

In particular, the above-mentioned photoelectric conversion section, photoelectric conversion section specifying means, signal readout line, and switch matrix.

The present invention is characterized in that a multiplier and an adder are simultaneously integrated on the same semiconductor substrate to form one solid-state image sensor.

[Function] According to the present invention, a plurality of photoelectric conversion units arranged in a matrix are selected and designated while sequentially shifting the row position one by one in units of n consecutive rows, and the photoelectric conversion units are Selecting and specifying m consecutive columns as a unit while sequentially shifting the column position one column at a time, and reading out (n×m) signals from the signal charges accumulated in each of the selected and specified photoelectric conversion units. read out in parallel via lines. When performing two-dimensional filtering processing using these signal charges, the arrangement of the signal charges read out in parallel on the signal readout line through the switch matrix is determined by the positional relationship of the photoelectric conversion unit in the 0th row and mth column as described above. Since the filter coefficients are rearranged according to the filter coefficients and multiplied by the filter coefficients, the two-dimensional filtering process can be performed very easily and efficiently.

In addition, by simultaneously integrating each of these circuit functional parts with the photoelectric conversion part into a single solid-state image sensor, there is no need to construct a two-dimensional filtering circuit using dedicated hardware as an external circuit. Furthermore, it becomes possible to obtain a desired filtering output directly from the solid-state image sensor in real time. As a result, it becomes possible to sufficiently improve its handling properties.

[Example] Hereinafter, a solid-state image sensor according to an example of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing a schematic configuration of a solid-state image sensor according to an embodiment, and 1 is a main body of the solid-state image sensor. This solid-state image sensor main body l is constructed by arranging a plurality of photoelectric conversion units 2 in a matrix shape, each of which has a plurality of photoelectric conversion units 2 mainly composed of photodiodes that generate signal charges according to the amount of incident light as pixels. .

The plurality of photoelectric conversion units 2 are selectively specified in row units via the row selection line 3a driven under the control of the vertical register 3, and transmit signals corresponding to the signal charges accumulated therein. It is configured to output onto signal readout lines 3b arranged in the column direction.

That is, each of these photoelectric conversion units 2 includes, for example, a photodiode 2a that generates a signal charge according to the amount of incident light as shown in FIG. 2a
MOS switch 2b for erasing signal charges accumulated in
Further, an amplifier 2c generates a signal corresponding to the signal charge accumulated in the photodiode 2a, and is turned on in response to a signal readout command via the row selection line 3a, and transfers the signal charge from the amplifier 2C to the signal readout line. 3b
Each of the two MOS switches 2d outputs an output to the top.

The vertical register 3, which selects and specifies photoelectric conversion units 2 on a line-by-line basis, is configured to select and specify photoelectric conversion units 2 in three consecutive rows while sequentially shifting the specified position one line at a time. . The output terminals from each photoelectric conversion unit 2 selected and designated in row units in this way are cyclically connected to three signal readout lines 3d provided along the column direction of the photoelectric conversion units 2. It is connected.

As a result, the signal outputs from the three rows of photoelectric conversion units 2 selected and designated as described above are read out in parallel to the three signal readout lines 3d described above for each month.

Note that the above-mentioned selection and specification of the photoelectric conversion unit 2 in units of three lines is as follows:
As will be described later, this is performed on the premise that two-dimensional filtering processing is performed in units of pixels (3 rows x 3 columns). Therefore, in general, when performing two-dimensional filtering processing using (n rows x m columns) pixels as a unit, the vertical register 3 sets the photoelectric conversion unit 2 with n rows as one unit.
The signal readout lines 3b are drive-controlled so as to specify the signal readout lines 3b, and are arranged along the rows of the photoelectric conversion units 2 in the column direction.
n pieces of each will be provided. The signal output from each photoelectric conversion unit 2 arranged in the column direction is
The signals are connected to the signal readout lines 3b of the book so that they can be read out cyclically.

Three (generally n) signal readout lines 3 are arranged along the column direction of the photoelectric conversion units 2.
A gate circuit 5 which is selectively turned on by the horizontal register 4 is provided at each output end of the transistor b.

The horizontal register 4 turns on these gate circuits 5 for every three consecutive columns along the above-mentioned row of photoelectric conversion units 2,
The signal on the signal readout line 3b is selectively read out. The on-driving of the gate circuit 5 in which these three columns are one unit is shifted one column at a time as the target area to which the two-dimensional filtering process is applied moves.

Note that, as mentioned above, since it is assumed that the two-dimensional filtering process is performed in units of pixels (3 rows x 3 columns), the gate circuit 5 is made conductive with 3 columns as one unit. However, when performing two-dimensional filtering processing using (n rows x m columns) pixels as a unit, gate control is performed using m columns as one unit.

The photoelectric conversion section 2 gate-controlled in this manner
The signal readout lines 3b from each column are here integrated into one line for every third column. In other words, the three signal readout lines 3a arranged along each column of the photoelectric conversion units 2 described above are connected in common, except for the signal line 3b from which signals are simultaneously read out via the gate circuit 5. Here, 9 corresponding to (3 rows x 3 columns)
It is summarized in the signal line of the book. Note that, generally, they are grouped into (n×m) signal lines corresponding to (n rows×m columns).

Signals from the photoelectric conversion unit 2 in the row designated by the vertical register 3 and the column in which the gate circuit 5 is turned on are transmitted through the signal readout lines 3b collected through the gate circuit 5 in this way. Charges, that is, signal charges from the photoelectric conversion unit 2 in row 0 and column m (here, row 3 and column 3) are read out in parallel.

Then, under the control of the vertical register 3 and horizontal register 4 described above, the photoelectric conversion unit 2 in the 0th row and the mth column from which signal charges are read out is sequentially shifted one pixel at a time. This shift control is, for example, a control that sequentially shifts the photoelectric conversion units 2 arranged in a matrix in the column direction, and then shifts one pixel in the row direction when the shift process for one row is completed. This is done by repeating the process over the area.

However, the signal charges from the photoelectric conversion units 2 arranged in three rows and three columns, read out in parallel in this manner, are input to a switch matrix 6 forming a (9×9) switch circuit. Each switch element of this switch matrix 6 is composed of a MOS switch 6C that selectively connects a row line 6a indicating a signal input line and a column line 6b indicating a signal output line, as illustrated in FIG. 3, for example. Ru. By selectively conducting the MOS switch 6C,
The output light of the signal read out via the nine signal readout lines 3b described above is selected and determined. In the switch matrix 6 configured in this manner, the signal charges from the photoelectric conversion units 2 arranged in 3 rows and 3 columns read out in parallel via the nine signal readout lines 3b are determined by the positional relationship between the pixels. The signals are rearranged according to the following and output to the two-dimensional filter section 7.

To explain the operation (function) of this switch matrix 6 in a little more detail, photoelectric conversion units (3 rows x 3 columns) that are read out in parallel from the solid-state image sensor main body l via the nine signal readout lines 3b mentioned above. On which signal readout line 3b each signal charge (pixel signal corresponding to the signal charge) from 2 is output is determined by the vertical register 3 and horizontal register 4 at which position (3 rows x 3 columns). It differs depending on whether the photoelectric conversion unit 2 is selected or designated.

For example, the nine signal readout lines 3b mentioned above are connected to A.

Assuming that they are distinguished as B, ~l, the signal output from the signal readout line 3b arranged along the photoelectric conversion unit 2 in the first column is output to the signal lines A, B, and C, and the signal output from the signal readout line 3b arranged along the photoelectric conversion unit 2 in the first column is The signal output from the signal readout line 3b arranged along the photoelectric conversion unit 2 is output to signal lines E and F, and from the signal readout line 3b arranged along the photoelectric conversion unit 2 in the third column. The signal outputs are signal lines G and H.

■ Each is output. And photoelectric conversion unit 2 in the fourth row
The signal output from the signal readout line 3b disposed along the photoelectric conversion section 2 in the fifth column is outputted again to the signal lines A, B, and C, and the signal from the signal readout line 3b disposed along the photoelectric conversion section 2 in the fifth column is outputted again to the signal lines A, B, and C. The output is again the signal line, E.

It will be output to F. Therefore, depending on which column is selected and specified by the horizontal register 4, the signal lines A, B,
The arrangement of the signals read out above is displaced in groups of three corresponding to the columns of the photoelectric conversion units 2, and the order changes with respect to the arrangement of the columns.

Further, the signals on the three signal readout lines 3b arranged along each column of the photoelectric conversion unit 2- also change cyclically depending on which row is selected and specified by the vertical register 3. Therefore, even on the set of three signal lines, the arrangement of the signals on those signal lines changes depending on the row selected and specified by the vertical register 3.

In this way, the switch matrix 6 outputs the signal sequence that changes depending on the selected designated position of the photoelectric conversion unit 2 by the vertical register 3 and the horizontal register 4, and outputs it to its output lines a and b.
, 3 consecutive lines for ~i, i.e. (i)-1)
line, ρ line.

(k-1)th in each line of (#+1) lines,
The arrangement processing is performed according to the positional relationship of the (k+1)th and (k+1)th photoelectric conversion units 2. As a result, the output lines a, b of the switch matrix 6.

~i, a signal charge (an image signal corresponding to a signal charge) is always obtained from the photoelectric conversion unit 2 having the following pixel positional relationship.

Output line a; (1-1) Output line b; (1)-1) Output line c; (N-1) Output line d-47 Output line e; g Output line f, J Output line g; (j7+1) Output line h; (ρ+1) Output line i; (jJ+1) Line line line line line line line line line (k-1)th kth (k+1)th (k-1)th kth (k+1)th (k- 1) kth (k+1)th In addition, regarding the control of the switch matrix 6 that performs such switching of signal lines, for example, the row position of the photoelectric conversion unit 2 selected and specified by the vertical register 3 and horizontal register 4 described above is , and the column position may be selectively driven as follows.

Table 1 In this way, the two-dimensional filter section 7 has its signal array rearranged via the switch matrix 6 (
Two-dimensional filtering processing is performed manually on the signals of 3 rows x 3 columns. That is, this two-dimensional filter section 7 includes a plurality of (nine) multipliers 7a, 7b, .
A coefficient register 8 provides a predetermined filter coefficient to each of these multipliers 7a, 7b, ~7I, and an adder 9 that calculates the sum of the signals (multiply values) from each of the multipliers 7a, 7b, ~71. configured.

Multipliers 7a, 7b, ~71 of this two-dimensional filter section 7
is given from the switch matrix 6 (3 rows×
3 columns) are multiplied by the filter coefficients set in the coefficient register 8, respectively. By calculating the sum of multiplication outputs (coefficient calculation results) obtained by these multipliers 7a, 7b, ~71, respectively, using an adder 9, Two-dimensional filtering results are now required. Note that the filter coefficients set in the coefficient register 8 are preset in advance according to the contents of the two-dimensional filtering process.

And the adder 9 which is the result of the filtering process
The output from the solid-state image sensor is outputted to the outside via the output buffer 10 as a filtered output of the solid-state image sensor.

Note that here, the signal from the central pixel obtained via the switch matrix 6 is output as is via the output buffer 11 as the signal charge of the pixel of interest, that is, as a normal signal output from the solid-state image sensor body l. It has become.

With these two systems of output, the raw signal charge (video signal) imaged by the solid-state imaging device main body 1 and the video signal subjected to the two-dimensional filtering process described above are obtained in synchronization with each other. In other words, a two-dimensional filtered output is determined in real time for the raw video signal.

Thus, according to a solid-state image sensor formed by simultaneously integrating such a circuit function section (two-dimensional filtering function), an image signal that has been subjected to two-dimensional filtering processing as an output of the element can be processed in real time together with the raw image signal. can be obtained.

Moreover, by simply setting filter coefficients according to the filtering specifications in advance in the coefficient register 8, the desired filtering output can be directly obtained as the element output. Therefore, there is no need to take the trouble to implement a two-dimensional filtering circuit in hardware as a part of the image processing device, unlike in the past. Furthermore, it is possible to sufficiently ensure real-time performance of the filtered signal, and it is possible to dramatically improve its usability.

Furthermore, since it is relatively easy to simultaneously integrate the two-dimensional filtering function described above with the solid-state image sensor main body l based on current semiconductor manufacturing technology, the configuration of the solid-state image sensor itself does not become too complicated. There are advantages. Therefore, it is possible to greatly simplify the configuration of a video camera or an electronic still camera constructed using this type of solid-state imaging device.

Note that it is also possible to configure the switch matrix 6 and the two-dimensional filter section 7 described above as circuit elements independent of the solid-state image sensor body 1. Even in this case, it is only necessary to provide the number of signal lines connecting the solid-state image sensor body 1 and the switch matrix 6 according to the number of pixels that undergo two-dimensional filtering processing, and the photoelectric conversion Since signal readout control for the section 2 can be executed in exactly the same manner, the processing efficiency is very high, and the form of control for filtering processing is also very simple.

By the way, in the above-mentioned embodiment, the switch matrix 6 using (9×9) switch elements was used to control the switching of the signal lines, but the switch matrix 6 may also be configured as shown in FIG. 4, for example. It is possible. That is, the reading of signal charges from the photoelectric conversion unit 2 is performed in units of three rows and three columns, as described above.

Therefore, as shown in FIG. 4, the switch matrix 6 is divided into a first switch matrix group 6a and a second switch matrix group 6b. Then, in the first switch matrix group 6a, the signal lines are replaced in units of three columns of nine signal readout lines 3b, and in the second switch matrix group 6b, the signal lines in three rows are replaced. Make sure to do the following.

In this case, the first switch matrix group 6a is set in Table 2 according to the row selection mode of the vertical register 3, and the second switch matrix group 6b is set according to the column selection mode of the horizontal register 4. Each of them may be controlled to be turned on as shown in Table 1.

By configuring the switch matrix 6 in this way, the number of MOS switches required therein can be reduced, which is very effective in simplifying the configuration. Also, the switch matrix 6 is
By configuring as shown in the figure, for example, the first switch matrix group 6a can be controlled according to the output of the vertical register 3, and the second switch matrix group 6b can be controlled according to the output of the horizontal register 4. As a result, it is possible to easily construct the control system, and other effects can be achieved.

Note that the present invention is not limited to the embodiments described above. In the embodiment, it was explained that two-dimensional filtering processing is performed between signal charges of (3 lines x 3 pixels), but -
Of course, it is also possible to perform two-dimensional filtering processing (n lines x m pixels) for boat fishing. Further, regarding filter coefficients for performing two-dimensional filtering processing, if the processing specifications are fixedly determined, it is also possible to set them in advance as ROM data or the like.

It is also possible to reverse the input/output relationship in the switch matrix shown in FIG. In addition, the present invention can be implemented with various modifications without departing from the gist thereof.

[Effects of the Invention] As explained above, according to the present invention, the signal charge (image signal) read out from the photoelectric conversion section (solid-state image sensor body)
Two-dimensional filtering processing can be performed easily and efficiently, and control of signal readout from the photoelectric conversion unit for filtering processing is also very simple. Furthermore, by simultaneously integrating a two-dimensional filtering function with the photoelectric conversion section, it is possible to realize a solid-state imaging device that can obtain the filtering output in real time. Moreover, it is possible to very effectively incorporate a two-dimensional filtering function and configure a solid-state imaging device so that a desired filtering output can be obtained. As a result, it is possible to greatly simplify the configuration of video cameras and electronic still cameras constructed using this type of solid-state imaging device, and this has great practical effects such as simplifying their handling. can be played.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram of a solid-state imaging device according to an embodiment of the present invention, FIG. 2 is a diagram showing an example of the configuration of a photoelectric conversion section in the embodiment device, and FIG. 3 is a configuration diagram of a switch matrix in the embodiment device. FIG. 4 is a diagram showing an example of the configuration of a switch matrix showing another embodiment of the present invention. l...Solid-state image sensor body, 2...Photoelectric conversion section, 3.
... Vertical register, 3a... Row selection line, 3b... Signal readout line, 4... Horizontal register, 5... Gate circuit, 6... Switch matrix, 7a, 7b,
~71... Multiplier, 8... Filter coefficient register,
9... Adder, 10, 11... Output buffer.

Claims (2)

[Claims] (1) A plurality of photoelectric conversion units arranged in a matrix to form a photoelectric conversion surface and having a function of retaining signal charges regardless of whether the signal charges are read out, and n consecutive rows of these photoelectric conversion units photoelectric conversion unit specifying means for selecting and specifying the row position of the photoelectric conversion unit while sequentially shifting it one row at a time; and (n×m) signal readout lines for reading in parallel signals corresponding to the signal charges accumulated in each of the n rows and m columns of photoelectric conversion units specified by the photoelectric conversion unit specifying means. and a switch matrix that controls and rearranges the signals from the respective photoelectric conversion units arranged in n rows and m columns, which are read out via these signal readout lines, into an arrangement order according to the positional relationship of each of the photoelectric conversion units arranged in the n rows and m columns. , a plurality of multipliers that multiply each of the n-row, m-column signals obtained through the switch matrix by a predetermined coefficient, and an adder that calculates the sum of the multiplied values by these multipliers. A solid-state imaging device featuring: (2) The photoelectric conversion section, photoelectric conversion section specifying means, signal readout line, switch matrix, multiplier, and adder are as follows:
The solid-state imaging device according to claim 1, wherein the solid-state imaging device is configured by being simultaneously integrated on the same semiconductor substrate.