JPH03184132A - Microcomputer element - Google Patents
Microcomputer elementInfo
- Publication number
- JPH03184132A JPH03184132A JP1324353A JP32435389A JPH03184132A JP H03184132 A JPH03184132 A JP H03184132A JP 1324353 A JP1324353 A JP 1324353A JP 32435389 A JP32435389 A JP 32435389A JP H03184132 A JPH03184132 A JP H03184132A
- Authority
- JP
- Japan
- Prior art keywords
- cpu
- function
- ice
- socket
- debugging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000006870 function Effects 0.000 description 11
- 230000000694 effects Effects 0.000 description 3
- 239000013256 coordination polymer Substances 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
- Microcomputers (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、インサーキットエ主ユレータ（以下、単にＩ
ＣＥと称す、）機能を備えたマイクロコンピュータ素子
に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to an in-circuit controller (hereinafter simply referred to as
It relates to a microcomputer element with a function called CE.
（従来の技術）
マイクロコンピュータ（以下、単にマイコンと称す、）
を用いた応用機器の開発においてソフトウェアの開発に
際しては、開発中の応用機器にＩＣＥを接続し、機器込
みでソフトのデバッグを行う。上記ＩＣＥは、エミュレ
ーシッン制御部とブレークポイント制御部とトレースメ
モリ部と代行メモリ部等を具備し、例えば第２図に示す
ように、ソフトウェア開発用の親計算機（１）と開発中
の応用機器（２）の間にＩＣＥ（３）を接続する。ここ
で、応用機器（２〉に接続する際、ＩＣＥ本体より導出
した多数のケーブル（４）で延長されたアダプタを応用
機器（２）のＣＰＵソケット（５）に差し込んでＩＣＥ
（３）を結合し、まずエミエレーション機能によりＣＰ
Ｕの機能を代行する。工＜ ユレーシッンの実現手段と
しては、対象とする本来のＣＰＵと同−又は同等機能、
或はより高速なＣＰＵを用いてソフトウェア的にシ主ユ
レートする。又、他に実時間トレース機能、ブレーク機
能、メモリ代行機能、及びメモリやレジスタ内容の表示
、変更機能を有する。(Prior art) Microcomputer (hereinafter simply referred to as microcomputer)
When developing software for application equipment using ICE, an ICE is connected to the application equipment under development and the software is debugged using the equipment. The above-mentioned ICE is equipped with an emulation control section, a breakpoint control section, a trace memory section, a proxy memory section, etc. As shown in FIG. Connect ICE (3) between devices (2). When connecting to the application device (2), insert the adapter extended by multiple cables (4) led out from the ICE main body into the CPU socket (5) of the application device (2) and connect the ICE.
(3) is combined, and first the CP is
Acts on behalf of U. As a means of realizing the system, the same or equivalent functions as the original CPU to be targeted,
Alternatively, it can be executed using software using a faster CPU. It also has a real-time trace function, a break function, a memory proxy function, and a function to display and change the contents of memory and registers.
上記構成において親計算機（１）にプログラムを組み込
んでＩＣＥ（３，）を作動させ、ＩＣＥ（３）を擬似Ｃ
ＰＵとして応用機器（２）を動かす。そこで、その作動
経過をチエツクしながら、逐次、プログラムに変更・修
正を加えていき、最終的にプログラムを仕上げてＲＯＭ
化する。In the above configuration, a program is installed in the parent computer (1) to operate ICE (3,), and ICE (3) is
Run application equipment (2) as a PU. Therefore, while checking the operation progress, changes and corrections were made to the program one after another, and finally the program was completed and stored in the ROM.
become
又、上記ＩＣＥ（３）の他、第３図に示すように、プロ
グラムを組み込んだＩＣＥ（６）も知られており、その
本体よりケーブル（４）で延長されたアダプタ（７）を
応用機器（２〉のＣＰＵソケット （５）に差し込む、
上記ＩＣＥ（６）においても同様にフロッピーディスク
（８）をセントし、キーボード（９）を操作してデバッ
グを行えばよい。In addition to the above-mentioned ICE (3), as shown in Figure 3, an ICE (6) with a built-in program is also known, and an adapter (7) extended from the main body with a cable (4) can be used as an application device. (Plug it into the CPU socket (5) of (2),
In the above-mentioned ICE (6), debugging can be performed by inserting the floppy disk (8) and operating the keyboard (9).
ところで、上述したＩＣＥ （３）又は（６）によって
デバッグを行う際、ケーブル（４）やアダプタ（７〉を
介してＩＣＥ （３）（６）をＣＰＵソケット（５）に
接続している。そこで、ケーブル（４）等の浮遊容量、
インダクタンス等による信号遅延が生じ、又、ＩＣＥ（
３）（６）のハードウェアも周辺にバードウェアを付加
していて本来のＣＰＵとは若干、異なるため、デバッグ
を行ってプログラム化した後、本来のＣＰＵによってケ
ーブル（４）もアダプタ（７）もない状態で応用機器（
２）を作動させても、十分、動かないことがあるという
不具合があった。特に、近年、マイコンを動かすクロッ
ク信号が高周波になると、ハードウェアの応答やケーブ
ル（４）の浮遊容量やインダクタンス等による影響が顕
著になり、デバッグによる主スが生じ易かった。更に、
ＩＣＥ （３）（６）のハードウェアは、各ＣＰＵ専用
でＣＰＵ毎に異なるため、装置も高価になるという不具
合がある。By the way, when debugging with the above-mentioned ICE (3) or (6), the ICE (3) (6) is connected to the CPU socket (5) via the cable (4) or adapter (7). , stray capacitance of cable (4), etc.
Signal delays occur due to inductance, etc., and ICE (
3) The hardware in (6) also has hardware added to the periphery and is slightly different from the original CPU, so after debugging and programming, the cable (4) and adapter (7) are connected to the original CPU. The applied equipment (
There was a problem in that even if 2) was activated, it sometimes did not work properly. In particular, in recent years, when the clock signal that drives a microcomputer has become a high frequency, the effects of hardware response, stray capacitance and inductance of the cable (4), etc. have become noticeable, making it easy for debugging problems to occur. Furthermore,
Since the hardware of ICE (3) and (6) is dedicated to each CPU and differs from CPU to CPU, there is a problem that the equipment becomes expensive.
本発明は、ＲＡＭを持つインサーキットエ文ユレータ機
能を備えたＣＰＵが組み込まれると共に、表面に上記エ
ミュレータ機能制御用外部機器の接続用ソケットを設け
たことを特徴とし、又、上記ソケットにインサーキット
エミュレータ制御用外部機器を接続したことを特徴とす
る。The present invention is characterized in that a CPU with RAM and an in-circuit emulator function is incorporated, and a socket for connecting an external device for controlling the emulator function is provided on the surface, and the socket is provided with an in-circuit emulator function. The feature is that an external device for controlling the emulator is connected.
上記技術的手段によれば、ＩＣＥ機能を組み込んだマイ
コン素子を、開発に係る応用機器のＣＰＵソケットに差
し込むと共に、マイコン素子表面のソケットに外部機器
を接続し、外部機器にてＩＣＥを制御してソフトのデバ
ッグを行う。According to the above technical means, a microcomputer element incorporating an ICE function is inserted into a CPU socket of an application device under development, an external device is connected to a socket on the surface of the microcomputer element, and the ICE is controlled by the external device. Perform software debugging.
本発明の実施例を第１図を参照して以下に説明する０図
において（１０）はマイコン素子、（１１）はＩＣＥ制
御用外部機器である。上記マイコン素子（１０）は、Ｒ
ＡＭを持つＩＣＥ機能を備えたＣＰＵが組み込まれると
共に、素子表面にＩＣＥ制御用外部機器（１１）の接続
用ソケフ）（１０ａ）が設けられ、応用機器（２）（第
２図参照）のＣＰＵソケット（５）に素子のリードを差
し込む、外部機器（１１）は、キーボード（１２）及び
フロンビーディスク（１３）を装備すると共に、機器本
体より導出したケーブル（４）で延長されたアダプタ（
１４）を上記ソケット（１０ａ ）に差し込んでマイコ
ン素子（１０）のＩＣＥ機能に結合する。そして、プロ
グラム内容をＩＣＥ機能のＲＡＭに書き込んだり、ＩＣ
Ｅ機能を盛り込むためＣＰＵに内蔵されたブレーキング
ポイントレジスタの書き込み、ブレーク又はステップ時
の刻々のレジスタ、フラング等の内容やメモリ内容の読
み出し或は表示を行う。An embodiment of the present invention will be described below with reference to FIG. 1. In FIG. 0, (10) is a microcomputer element, and (11) is an external device for ICE control. The microcomputer element (10) is R
A CPU with an ICE function with AM is incorporated, and a socket (10a) for connecting an external device for ICE control (11) is provided on the element surface, and a CPU of an applied device (2) (see Figure 2) is provided. The external device (11), into which the element leads are inserted into the socket (5), is equipped with a keyboard (12) and a Fronby disk (13), as well as an adapter (4) extended by a cable (4) led out from the device main body.
14) is inserted into the socket (10a) and connected to the ICE function of the microcomputer element (10). Then, write the program contents to the RAM of the ICE function,
In order to incorporate the E function, it writes to the braking point register built into the CPU, and reads or displays the contents of registers, flags, etc. and memory contents at the moment of a break or step.
上記構成に基づき本発明の動作を次に説明する。まずマ
イコン素子（１０）を応用機器（２）のＣＰＵソケット
（５）に差し込むと共に、マイコン素子（ｌＯ）のソケ
ット（１０ａ）にアダプタ（１４）を差し込み、マイコ
ン素子（１０）と外部機器（１１）とを結合する。そこ
で、外部機器（１１）にてマイコン素子（１０）のＲＡ
Ｍにプログラム内容を書き込んだり、ブレーキングポイ
ントレジスタの書き込みやブレーク又はステンプ時のレ
ジスタ、フラッグ等の読み出しを行い、応用機器（２）
をプログラムに基づいて作動させ、デバッグを行う。そ
して、ＲＡＭに書き込んだプログラム内容を適宜、書き
換え、修正を加えてデバッグした後、プログラムをＲＯ
Ｍ化し、ＩＣＥ機能を除いた本来のＣＰＵに組み込む。The operation of the present invention will be explained below based on the above configuration. First, insert the microcomputer element (10) into the CPU socket (5) of the application device (2), and insert the adapter (14) into the socket (10a) of the microcomputer element (10), and then connect the microcomputer element (10) and the external device (11). ). Therefore, the RA of the microcomputer element (10) is
Write the program contents to M, write the braking point register, read the registers, flags, etc. at break or step, and write the program contents to the application device (2).
operate based on the program and debug it. Then, after rewriting and debugging the program contents written to RAM as appropriate, the program is loaded into RO.
M and incorporate it into the original CPU without the ICE function.
そうすると、擬似ＣＰＵとしてのＩＣＥ機能を直接、Ｃ
ＰＵソケ７ト（５）に差し込むことができ、ハード的に
最終的な状態でデバッグできてケーブル（４）が不要と
なる。又、外部機器（１１）はＩＣＥ機能への書き込み
、又は読み出しを行うモニタリング機能を持つに過ぎな
いため、マイコン素子（１０）が変わっても同様に新た
なマイコン素子（１０）に対して用いることができ、汎
用が可能となる。Then, the ICE function as a pseudo CPU can be directly
It can be inserted into the PU socket (5), allowing debugging in the final state of the hardware, eliminating the need for a cable (4). Furthermore, since the external device (11) only has a monitoring function for writing to or reading from the ICE function, even if the microcomputer element (10) is changed, it cannot be used for the new microcomputer element (10) in the same way. can be used for general purpose purposes.
又、ｌチップマイコンも同様にデバッグ用のＥＰＲＯＭ
バージッンではなく、ＲＡＭバージッンで外部機器接続
ソケットを設け、同様にデバッグできる。In addition, l-chip microcontrollers also use EPROM for debugging.
An external device connection socket is provided in the RAM virgin instead of the virgin, and debugging is possible in the same way.
本発明によれば、ＩＣＥ機能を備えたＣＰＵをマイコン
素子に組み込んで、応用機器のＣＰＵソケットに差し込
むと共に、マイコン素子表面に設けたソケットにＩＣＥ
制御用外部機器のアダプタを差し込んでマイコン素子に
結合し、システムデバッグを行うようにしたから、ハー
ド的に最終的な状態でデバッグでき、配線ケーブルの浮
遊容量やハードウェア等の影響がなくなってデバッグの
ミスが排除され、又、外部機器もマイコン素子毎に汎用
となり、作業コストの低減化を図ることができる。また
、本発明に係るマイコン素子を使用することにより、該
応用機器のメンテナンスも容易となる。According to the present invention, a CPU equipped with an ICE function is incorporated into a microcomputer element, and the CPU is inserted into a CPU socket of an application device, and an ICE is inserted into a socket provided on the surface of the microcomputer element.
Since system debugging is performed by plugging in the adapter of the external control device and connecting it to the microcontroller element, debugging can be performed in the final state of the hardware, eliminating the influence of stray capacitance of wiring cables and hardware, etc. In addition, external equipment can be made general-purpose for each microcomputer element, and work costs can be reduced. Furthermore, by using the microcomputer element according to the present invention, maintenance of the applied equipment becomes easy.
第１図は本発明に係るマイコン素子の実施例を示す外部
機器を含めた概略斜視図、第２図と第３図は従来のＩＣ
Ｅによるデバッグ作業の各具体例を示すブロック図と要
部概略斜視図である。
（１０）
マイクロコンピュータ素子、
（１１） −外部機器、
（１０ａ ）−・・ソケッ
ト。
特
許
出
願
人
関西日本電気株式会社、−
代
理
人
江
原
省
吾
第
図FIG. 1 is a schematic perspective view including external equipment showing an embodiment of the microcomputer element according to the present invention, and FIGS. 2 and 3 are conventional ICs.
FIG. 2 is a block diagram and a schematic perspective view of main parts showing specific examples of debugging work performed by E. (10) Microcomputer element, (11) -external device, (10a) - socket. Patent applicant Kansai NEC Co., Ltd. - Agent Shogo Ebara
Claims (2)
備えたＣＰＵが組み込まれると共に、表面に上記エミュ
レータ制御用外部機器の接続用ソケットを設けたことを
特徴とするマイクロコンピュータ素子。(1) A microcomputer element incorporating a CPU with RAM and an in-circuit emulator function, and having a socket for connecting an external device for controlling the emulator on its surface.
を接続したことを特徴とする請求項（１）記載のマイク
ロコンピュータ素子。(2) The microcomputer device according to claim (1), further comprising an external device for controlling an in-circuit emulator function.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1324353A JPH03184132A (en) | 1989-12-13 | 1989-12-13 | Microcomputer element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1324353A JPH03184132A (en) | 1989-12-13 | 1989-12-13 | Microcomputer element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03184132A true JPH03184132A (en) | 1991-08-12 |
Family
ID=18164834
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1324353A Pending JPH03184132A (en) | 1989-12-13 | 1989-12-13 | Microcomputer element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03184132A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01276246A (en) * | 1988-04-27 | 1989-11-06 | Fujitsu Ltd | Debugging device |
-
1989
- 1989-12-13 JP JP1324353A patent/JPH03184132A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01276246A (en) * | 1988-04-27 | 1989-11-06 | Fujitsu Ltd | Debugging device |
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