JPH03184114A - Pulse counting communication system - Google Patents

Abstract

PURPOSE:To transfer data to a bus mouse interface (BMI) of a reception part by providing a pulse circuit on a transmission part to output a 2-phase pulse train and using a counting circuit and a reading circuit of the reception part to constitute BMI. CONSTITUTION:The X and Y pulse circuits of a pulse circuit 11 of a pulse data transmission part 9 output the X and Y 2-phase pulse trains and transfer four pieces of data, for example, in the transfer processing of a single time divided into the former and latter halves. A CPU 27 of a pulse data reception part 10 reads sequentially the data on the X and Y counters via BMI when two pieces of data of the former half are selected. Then the CPU 27 carries on the addition processing until the counted values of both X and Y counters are equal to 0 respectively. Similarly, two pieces of data of the latter half are received. These operations are repeated to carry out the communication of data at every four pieces.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a communication method for transferring data consisting of a binary bit string from a transmitting section to a receiving section, and in particular, for transmitting peripheral terminal input data to a host computer for processing. Regarding communication methods.

[Conventional technology]

A conventionally known data communication system is an asynchronous start-stop synchronization system in which bit-parallel data is converted into bit-serial data and data is transferred from a receiving section to a transmitting section.

This method will be explained using an example in which data is transferred from a digitizer to a host computer. FIG. 1O is a perspective view showing an outline of a communication system between a digitizer and a host computer. The digitizer 1 is composed of a tablet plane sensor section that defines a two-dimensional coordinate plane. When a desired position on the surface of the tablet flat sensor section 2 is specified using a suitable input device such as the stylus pen 3, the sensor section 2 generates an analog detection signal corresponding to the specified position. The digitizer 1 further includes an arithmetic processing circuit, and calculates data representing two-dimensional coordinate values of a specified position based on the analog detection signal. The calculated data is sent to the host computer 5 via the signal cable 4.

The host computer 5 has a plurality of built-in interfaces for connection with peripheral input/output terminal devices, which can be used depending on the format of signals to be sent and received.

FIG. 11 shows the waveform of the output signal transmitted from the digitizer. For example, the coordinate value data created with a digitizer is 8
It is expressed as parallel data consisting of bits. The 8-bit parallel data is converted from parallel to serial and sent to the first
As shown in Figure 1, it is output as an 8-bit serial data signal. For example, 8-bit parallel data (10110101) is converted into an 8-bit serial data signal of l-0-1-iot-o-t. Such a bit data transmission method is called an asynchronous start-stop synchronization method. In order to accept data signals according to the asynchronous start-stop synchronization method, the host computer usually incorporates an interface based on the R5-232C standard. Therefore, peripheral terminal devices were generally connected to the host computer through an R3-232C interface.

[Problems to be solved by the invention]

However, the R built in the host computer
Although the S-232C interface is extremely versatile and is used to connect various peripheral terminal devices that employ an asynchronous start-stop synchronization method, there is a limit to the number of devices that can be connected. Therefore, there has been a need for a communication system that can transfer data using an interface other than the R5-232C interface built into the host computer.

For example, a typical host computer has a built-in bus mouse dedicated interface for connecting to a bus mouse. Here, the bus mouse will be briefly explained in order to facilitate understanding of the present invention.

A bus mouse is widely used as a coordinate input terminal device for computers, but it can only handle relative movement amounts. In addition, the bus mouse itself is larger in size than a stylus pen or the like used as an input device for a digitizer, making it difficult to input characters and select menus. On the other hand, digitizers can handle absolute coordinates and can easily input characters. However, because the bus mouse is cheap and provides a simple interface, modern computers are equipped with a bus mouse interface as standard equipment. Figure 12 shows the schematic structure of a bass mouse. A bus mouse is used to input the amount of movement into the host computer by moving its main body. Therefore, a rotatable ball 6 is attached to the bottom so that the main body can be moved. X on that ball 6
A pair of sensors 7 and 8 are in contact with each other to separately detect the amount of movement in the axial direction and the Y-axis direction.

FIG. 13 is an explanatory diagram of the operation of the bus mouse sensor.

The rotation axis of the X-axis sensor 7 is in contact with the ball 6 . Although not shown, the rotation axis of the Y-axis sensor 8 is also in contact with the ball 6 so as to be orthogonal to the rotation axis of the X-axis sensor 7. When the ball 6 rotates due to the movement of the bus mouse, the rotation axis of the X-axis sensor 7 rotates according to the amount of movement in the X-axis direction, and the output signal
Discard A and XB. At the same time, switching signals S1 and S2 indicating the switch state of the bus mouse are also output from the bus mouse.

FIG. 14 is an output signal waveform diagram of the bus mouse.

As shown in the figure, the output signal consists of a two-phase pulse train.

When the bus mouse moves in the positive direction of the X-axis, pulse train XA is 90 degrees ahead of pulse train XB, and on the other hand, when the bus mouse moves in the negative direction of the The phase is delayed by 90 degrees. In this way, the number of pulse edges included in the output signal per unit time indicates the amount of relative movement of the bass mouse per unit time, and the phase state of the output signal indicates the direction of movement of the bass mouse.

Typically, the host computer includes a bus mouse interface to accept output signals and switching signals from the bus mouse. The bus mouse interface has two built-in 8-bit counters corresponding to the X and Y coordinates and measures the number of pulse edges of the output signal.

This calculation result is read from an 8-bit counter every fixed period (for example, 8 ass) by the mouse timer of the host computer, and the relative movement amount and switch state of the bus mouse during the fixed period are detected.

By the way, as shown in FIG. 11, the output signal of the conventional digitizer consists of a binary bit string according to the asynchronous start-stop synchronization method. On the other hand, as shown in FIG. 14, the output signal of the bus mouse consists of a two-phase Norse train. Therefore, conventional digitizers and bus mice have different output signal formats, making it impossible to directly connect a digitizer to a bus mouse interface of a host computer.

As can be understood from the above explanation, it has not been possible to input data consisting of an binary bit string to a bus mouse interface of a host computer using the asynchronous start-stop synchronization method. However, the bus mouse interface is used less frequently than the R5-232C interface, and there is an increasing demand in the market for data transfer using the bus mouse interface. However, conventional data communication systems have been unable to meet the demands of this market, creating a problem.

[Means for solving problems]

In view of the above-mentioned problems with the conventional data communication method, an object of the present invention is to provide a communication method that can transfer data from a transmitter of a peripheral terminal device to a bus mouse interface of a receiver of a host computer or the like. do.

A means for solving the problem will be explained with reference to FIG. FIG. 1 is a block diagram showing the overall configuration of a pulse count communication system according to the present invention. This communication system is composed of a pulse data transmitting section 9 and a pulse data receiving section IO. The transmitter 9 transmits binary data constituting the data to be transferred.
It has a pulse circuit 11 that outputs a two-phase pulse train including a corresponding number of pulse edges within a predetermined transfer period according to the integer represented by the pit train.

On the other hand, the receiving unit IO includes a resettable counting circuit 12 that counts pulse edges included in a two-phase pulse train, and reads and resets the counts of the counting circuit 12 sequentially at predetermined reading intervals within the transfer period. It has a reading circuit 13 which adds up each count when the value becomes ○, and determines the number of accepted pulse edges. That is, the counting circuit 12 of the pulse data receiving section 10
and the reading circuit 13 constitute a so-called bus mouse interface.

Preferably, the transmitter 9 includes a code circuit 14 that attaches a positive or negative sign to each data in order to mutually identify a plurality of series of data.
The pulse circuit 11 selects the phase of the two-phase pulse train according to the sign. In addition, the pulse data receiving section 10 is capable of mutually identifying a series of data transferred in chronological order according to the phase. The code circuit 14 is configured to, for example, alternately assign positive and negative codes to a series of data, thereby identifying preceding and succeeding data. Alternatively, the code circuit 14 assigns a different code to the first data in the series of data, so that the receiving side can detect the start point of transmission of the series of data.

Preferably, the pulse circuit 1 (includes a pair of X pulse circuits and a Y pulse circuit)
It is composed of a pulse circuit and can transmit a pair of data at the same time. Correspondingly, the counting circuit 12 on the receiving side is also composed of a pair of X counting circuit and Y counting circuit, so that it can receive a pair of data simultaneously.

The pair of X and Y pulse circuits can transmit one pair of data during the first half of the transfer period, and the other pair of data during the second half of the transfer period. data is sent. Such a communication method is most suitable for transmitting data representing input coordinates of a digitizer.

[For production]

The operation of the communication method according to the present invention using a bus mouse interface will be explained using the transfer of four pieces of data as an example. Each piece of data is output by the transmitter in the form of a two-phase pulse train. On the other hand, a bus mouse interface built into a receiving section of a host computer or the like has the following functions.

1. Function to measure the number of pulse edges included in a two-phase pulse train.

2. A function that detects whether the phase of the two-phase pulse train is leading or lagging and distinguishing whether the data is positive or negative.

3. A function that can simultaneously count the number of pulse edges in a pair of two-phase pulse trains.

The three functions described above are executed by dedicated hardware (mouse counter) built into the receiving section. As an example of the receiving section, the received two-phase pulse train is converted from -128 to +1.
There is one that converts to 8-bit 2's complement representation of 27. The transmitting section uses the above three functions of the receiving section to transmit each data to the receiving section in the form of a two-phase pulse train.

If one piece of data consists of seven binary bit strings, the integer represented by the binary bit string is 0.
It can take a value of 127 from . The transmitter outputs the data as a two-phase pulse train including O to 127 pulse edges. For example, as shown in Figure 2, if the data is 18H, the binary bit string represents the integer 24, so 24
Outputs a two-phase pulse train containing pulse edges. The biphasic pulse train includes two phase components XA and XB. The phase relationship of the circumferential components is determined by the sign of the data. For example, if the sign of the data is positive, component XA is component XB.
When the sign of the data is negative, the component XA is 90 degrees in phase compared to the component XB. Note that a pulse edge refers to the rising and falling points of a pulse included in a two-phase pulse train, and the number of pulse edges is obtained by counting all pulse edges included in a two-phase pulse train. A counting circuit, ie, a mouse counter, in the receiving section counts the pulse edges and sets them in a register as one piece of data. The reading time PU of the receiving section reads the mouse counter to obtain the data 18H output by Nibu. When U reads the mouse counter, the mouse counter is cleared.

The mouse counter overflows if the CPU does not read the counted value even though a biphasic pulse train is being sent. For example, after the transmitter transmits the data FF,
If the receiving section transmits the next data 5 before reading the mouse counter, the value of the mouse counter will become 04. If the mouse counter overflows in this way, the data output from the transmitter will not be correctly transferred to the receiver. For this reason, it is necessary to adjust the two-phase pulse train output timing of the transmitting section and the mouse counter reading timing of the receiving section. In the pulse count communication method according to the present invention, overflow of the mouse counter is prevented by adopting the transfer method shown in FIG.

As shown in the data transfer timing chart in Figure 3, the transmitter outputs a two-phase pulse train XA, XB containing the number of pulse edges according to the integer represented by the data to be transmitted every predetermined transfer period (2,5 m5). do. The receiving unit reads the mouse counter at every reading interval (1ff1s) shorter than one transfer period.

That is, by sequentially reading and resetting the mouse counter while the two-phase pulse train is being output, an overflow of the mouse counter is prevented, and the state in which the output of the two-phase pulse train is stopped can be recognized, and data sent sequentially is separated. The timing chart in Figure 3 shows the integer 4 as an example.
It shows the operation of sequentially transferring two pieces of data corresponding to 0 and the integer 35. When the transmitting section starts outputting a two-phase pulse train including 40 pulse edges in order to transfer the first data, the CPU of the receiving section reads the mouse counter at timing (3). At this time, the CPU reads the count value of the already output pulse edge, for example, 15. At this time, the mouse counter is reset, but pulse edge counting continues. At the next reading timing ■, the remaining countability z5 is read.

The receiving section adds up and holds the countability obtained by the two readings, and determines the number of accepted pulse edges. At the following timing (2), the CPU of the transmitter also reads the mouse counter, but the output of the pulse train has already been completed and the mouse counter has been reset at the previous reading timing (2), so the reading result is O. The receiving unit recognizes that one data transfer by the transmitting unit has been completed by reading O from the mouse counter, and recognizes that the total count value 15+25-40 is an integer representation of the transferred data. recognize.

Subsequently, in the second transfer period, a pulse train including the number of pulse edges corresponding to the integer 35 represented by the second data to be transmitted is output. At this time, the receiving section sequentially reads the mouse counter at reading timings ①, ②, and ②, and similarly measures and determines the number of transmitted pulse edges.

Next, a method for transmitting four pieces of data in one transfer process using the continuous data transfer method explained using FIG. 3 will be described. In this method, two pieces of data can be transferred simultaneously using a pair of X and Y counters that constitute a mouse counter. By transferring one pair of data within the first half transfer period and transferring another pair of data within the second half transfer period, a total of four data transfers are completed in one transfer process.

Since four pieces of data are transferred in one transfer process, the receiving section must recognize each piece of data separately.

That is, it is also necessary to identify whether the pair of data X and Y is sent during the first half or the second half of the four data. In order to perform this identification, a positive or negative sign is assigned to the data to be transferred.

That is, out of a pair of data X and Y that are transferred at the same time, data X is given a sign that is inverted each time it is transmitted.

This assignment of positive and negative signs is performed by selecting the phase of the corresponding two-phase pulse train. As a result, the receiving section detects the selected phase and determines whether the received data is positive or negative. If it is positive, it is determined that the received pair of data is the first half, and if it is negative, it is determined that it is the second half, and each of the four pieces of data can be identified.

In order to carry out the above-mentioned identification, the data X must be given a negative sign at least once per transfer process. If the data is ○ at the timing to output negative data, the receiving section cannot identify whether it is the first half data or the second half data. If the data to be given the Ugai code is 0, the transmitter gives the data an integer of -128 and outputs it. If the received data is -128, the receiver recognizes that the data is actually 0.

The communication method described above allows communication of four pieces of data through one transfer process. Furthermore, in order to improve the reliability of data identification and reading in the receiving section, a fourth
The transfer method shown in the figure is also possible. The transmitter assigns a positive sign to data X and a negative sign to data Y for a pair of data sent in the first half transfer period among the four pieces of data.

Also, of the pair of data sent in the latter transfer period, data X is given a negative sign and data Y is given a positive sign. Then, the receiving section accepts the data X received in the first half as positive, and the data Y
is negative, and the latter half data This makes it possible to constantly check the transferred data.

The communication method according to the present invention is not limited to the case where four pieces of data are transferred in one transfer process, but for example, eight pieces of data are transferred in one transfer process as shown in Table 1 below. I can also do things.

Table 1 Data X +0-0+0-0+0-,,.

Data y -o+o+o+o-o+ In this example as well, a pair of pulse circuits X and Y are used to transfer each pair of data X and Y. The sign of data X is inverted every time it is transferred, so that pairs of data before and after it can be identified from each other. Also, a negative sign is attached to the data Y that is output first in one transfer process, and a positive sign is attached to the remaining data Y. If the received data Y has a negative sign, the receiving unit recognizes that the received data is the first data in one transfer process. In this way, the transmitting section and the receiving section can transfer a large amount of data while being synchronized with each other. Note that the reliability of the transferred data can be known from the checksum or CRC of the final data in one transfer process.

〔Example〕

A preferred embodiment of the pulse count data communication system according to the present invention will be described in detail below with reference to FIGS. 5 to 9. FIG. 5 is a configuration diagram of hardware built into the transmitter. This node software consists of a pair of XA7 reply circuits 15 and a Y pulse circuit 16 that correspond to a pair of X mouse counters and Y mouse counters built into the receiving section, and a timing generation circuit 17 that defines the sending timing of the pulse train. It is configured. The X pulse circuit 15 and the Y pulse circuit 16 have the same configuration, and each generates an X pulse train (X
A.

XB) and Y pulse train (YA, YB).

As shown in the figure, the X pulse circuit i5 includes a pulse train generation circuit 18 that generates a pulse train corresponding to the numerical value based on the 8-bit array data sent from the data bus DB, and a two-phase pulse train XA based on the pulse train. and a phase circuit 19 that generates XB. The pulse train generation circuit i8 includes a latch circuit 20 for sequentially fetching data from the data bus. and measuring the clock signal CK according to the binary representation value of the data taken into the latch circuit 20 8
It has a bit binary counter 21. The pulse train counted by a predetermined number is sent to the phase circuit 19 via the AND circuit 21. The phase circuit 19 has a pair of D flip-flop circuits 22 and 23, and a latch circuit 20.
It outputs a two-phase pulse train XA and XB of leading or lagging phase according to the positive or negative sign of the data taken in.

FIG. 6 is a timing chart for explaining the operation of the circuit shown in FIG. In this embodiment, the clock CK that specifies the pulse edge arrangement interval of the two-phase pulse train is 2.
Let it be μs. Therefore, the period of the pair of pulse train components XA and XB of the two-phase pulse train is 8 μs. The output timing of the two-phase pulse train is determined by the signals T1 and T2. Signal T2
defines the output timing of four pieces of data that are output per one transfer process, and is set to T2-5ms here.

In this case, the transfer rate is 200 transfer processes per second.

The C of the transmitting section is determined by the falling timing of the signal T1.
Interrupts the PU (INT), which causes the CPU to
Read the logic level of signal T2 from the PU boat. If the level of the signal T2 is L, the first half of the data is written to the 8-bit latch circuit 20, and if the level of the signal T2 is H, the second half of the data is written to the 8-bit latch circuit 20. The latched data is loaded into two 8-bit binary counters. At timing (3) when the timing signal T1 becomes level H, the counter 21 starts counting the clocks CK, and counts the number of clocks corresponding to the integer value set in the counter 21. Then, the signal CY is raised at the timing (3) when the counting ends.

Clock signal CK that operates the phase circuit 19 at timing ■ during the operation of the 8-bit binary counter 21
is output to generate an X two-phase pulse train (XA, XB).

The Y pulse circuit 16 has the same configuration as the X pulse circuit 15, but the inverter 24 generates a Y two-phase pulse train (YA,
The phase of YB) is inverted with respect to the X two-phase pulse train.

Figure 7 shows the X two-phase pulse train and Y phase pulse train synthesized in this way.
The waveform of a two-phase pulse train is shown. The waveform in FIG. 7 shows an example where the integer value represented by the X data is 13 and the integer value represented by the Y data is -7.

Next, the hardware configuration of the receiving section is shown in FIG.

The receiving section, which is a host computer or the like, includes a mouse interface. The mouse interface includes a mouse counter 25 and a port 26. The mouse counter 25 includes an X counter for counting the X two-phase pulse train (XA, XB) and a Y counter for counting the Y two-phase pulse train (YA, YB). Port 26 is for receiving switching signals S1 and S2 sent from the mouse. Port 26 is not used in the communication system according to the present invention. However, it is possible to control the read timing of transfer data using the switching signals S1 and S2. Applicant is port 2
A patent application has already been filed regarding a data communication method using 6.
It has been filed as No. 181483. However, the port 26 is usually equipped with a delay circuit to prevent chattering of the switching signals S1 and S2, and therefore it is difficult to transfer data at high speed. The host computer constituting the receiving section further includes a CPU 27 and reads the count counted by the mouse counter 25.

FIG. 9 is a flowchart showing the mouse counter reading process performed by the host computer of the receiving section. In this embodiment, an example will be shown in which four pieces of data are divided into the first half and the second half and transferred in one transfer process.

Out of the four data, the first two data or the latter two data are selected. If the first two data are selected, the CPU 27 reads the X counter, and if the X data is positive, For example, addition processing is performed until the countability of the X counter becomes 0. Conversely, if the X data is negative, jump to error processing. Next, the data of the Y counter is read, and if the data is negative, addition processing is performed until the countability of the Y counter becomes O. If positive, jump to error processing. When the countability of the X counter and the Y counter becomes 0, it is determined that the transfer of the first half data from the transmitter has been completed, and the process moves on to receiving the second half data.

When the latter two data are selected, the X counter is read and if the X data is negative, addition processing is performed until the countability of the X counter becomes O.

If the X data is positive, jump to error processing. Next, the countability of the Y counter is read, and if the Y data is positive, addition processing is performed until the countability of the Y counter becomes O.

If it is negative, jump to error processing. When the countability of the X counter and the Y counter becomes ◯, it is determined that the transfer of the second half data from the transmitter has been completed, and the four transferred data are determined. The reading process then shifts to the receiving process of the first half data.

Next, the transfer rate of the pulse count communication method according to the present invention will be explained using an example in which four pieces of data are communicated in one transfer process. The transfer rate is determined by the pulse train output timing of the transmitter and the mouse counter reading timing of the receiver. As an example of the receiving section, if the interval timer time is 2 ms, the transfer time for 4 pieces of data in one process is 5 x 2-
logs, the transfer rate is 100 transfers per second. The shorter the pulse train output timing of the transmitter and the read timing of the receiver, the faster the transfer rate.
By making both timings variable, any transfer rate can be achieved. The relationship between the interval timer and transfer rate is shown in Table 2 below.

Table 2 Finally, examples of data formats transferred by the data transfer method according to the present invention are shown. Here, a description will be given of the transfer of digital data indicating a coordinate position input by a digitizer to a host computer.

Digital data consists of two or more bytes of bits and bytes depending on the size of the digitizer. - For example, in Table 3,
The bit and byte configuration of digital data consisting of the first LSL fourth byte each consisting of 8 bits is shown.

The numbers 7 to 4 on the left side of Table 3 indicate the first to fourth bytes, and the numbers 7 to O on the upper side indicate the 8-bit array in each byte. However, in this example, the most significant bit of each byte is empty. Therefore, information regarding one coordinate position is expressed by a 4x7-28 bit array. These 28-bit arrays are divided into first to fourth bytes. Here, bits XO to XlO represent the X coordinate and can specify an X coordinate value of 0 to 2047, and bits YO to Y9 represent a Y coordinate and can similarly specify a Y coordinate value of 0 to 1023.

Further, bits SO to S5 represent switch signals related to the type of input device, gradation, etc. for one specified position. Bit RDY indicates that the coordinate indicator is within the effective area of the flat sensor section.

In the embodiments described above, an example has been described in which input coordinate data of a digitizer is transferred to a host computer. However, the pulse count communication method according to the present invention can be applied to data transfer between various input terminal devices, measuring instruments, etc. and a host computer. Therefore, the technical scope of the present invention is not limited to digitizer data transfer in any way.

〔Effect of the invention〕

As explained above, according to the pulse count communication method according to the present invention, data can be transferred to the host computer via the bus mouse interface.
There is no need to use the RS-232C interface as in the past, and the host computer's multi-terminal processing capacity can be effectively utilized as a whole, as well as the bus mouse interface, which is relatively infrequently used. There is an effect that it can be done.

[Brief explanation of drawings]

Figure 1 is an overall configuration diagram of the pulse count communication system, Figure 2 is a waveform diagram of a two-phase pulse train, Figure 3 is a transfer timing chart, Figure 4 is another transfer timing chart, and Figure 5 is the transmitter circuit. Configuration diagram, Figure 6 is an operation timing chart of the transmitter, Figure 7 is a waveform diagram of the XY two-phase pulse train, Figure 8 is a block diagram of the receiver, Figure 9 is a flowchart of the reading process of the receiver, and Figure 1O. is a perspective view showing an overview of a conventional communication method, FIG. 11 is a waveform diagram showing a transfer signal of a conventional transfer method, FIG. 12 is a schematic diagram of the structure of a bus mouse, and FIG. 13 is an explanatory diagram of the operation of a bus mouse sensor. , and FIG. 14 are output signal waveform diagrams of the bus mouse. 9...Pulse data transmitting section 10...Pulse data receiving section 11...Pulse circuit 12...Counting circuit 13...Reading circuit 14...Code circuit 2-end B bassester I helmet shape 4 2nd figure ■ ■ ■ ■ ■ ■ Edited by a number of people who are confused by the number of changes. Figure 7. (2) Fig. 8 1 Ken'i divination p's inclusion 1 monri enrifu D-Nayat 9 Fig. 4 Hikira no Tsui'i Palace 7 Y-style Sung wash'd shoji↑Rin 1 observation pt. 10
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Claims (1)

[Claims] 1. In a communication system that transfers data consisting of a binary bit string from a transmitting section to a receiving section, the transmitting section transmits a corresponding number of pulse edges according to an integer represented by the binary bit string constituting the data to be transferred. The receiver has a pulse circuit that outputs a two-phase pulse train containing the pulse edges within a predetermined transfer period, and the receiver includes a resettable counting circuit that counts the pulse edges included in the two-phase pulse train, and It is characterized by having a reading circuit that sequentially reads and resets the counts of the counting circuit, and when the read counts become zero, adds up each count to determine the number of accepted pulse edges. communication method. 2. The transmitter has a code circuit that assigns a positive or negative sign to each data in order to mutually identify a plurality of series of data, and the pulse circuit selects the phase of the two-phase pulse train according to the code, and 2. The communication system according to claim 1, wherein the receiving section mutually identifies a series of data transferred in chronological order according to the phase. 3. The communication system according to claim 2, wherein the code circuit alternately assigns positive and negative codes to the series of data. 4. The communication system according to claim 2, wherein the code circuit assigns a different code to the first data in the series of data. 5. Claim characterized in that the transmitting section has a pair of pulse circuits for simultaneously transmitting a pair of data, and the receiving section has a pair of counting circuits for simultaneously receiving a pair of data. The communication method described in 1. 6. The pair of pulse circuits transmits one pair of data during the first half transfer period and the other pair of data during the second half transfer period, thereby transmitting four pieces of data in one transfer process. 6. The communication method according to claim 5, wherein: 7. The communication system according to claim 1, wherein the counting circuit and the reading circuit of the receiving section are constituted by a bus mouse interface. 8. The communication system according to claim 1, wherein the transmitter transmits input data from a digitizer or the like.