JPH03173360A - Inverter circuit - Google Patents

Inverter circuit

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Publication number
JPH03173360A
JPH03173360A JP1309879A JP30987989A JPH03173360A JP H03173360 A JPH03173360 A JP H03173360A JP 1309879 A JP1309879 A JP 1309879A JP 30987989 A JP30987989 A JP 30987989A JP H03173360 A JPH03173360 A JP H03173360A
Authority
JP
Japan
Prior art keywords
switch
circuit
inverter circuit
output
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1309879A
Other languages
Japanese (ja)
Inventor
Noriaki Baba
馬場 紀明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Seiki Co Ltd
Original Assignee
Nippon Seiki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Seiki Co Ltd filed Critical Nippon Seiki Co Ltd
Priority to JP1309879A priority Critical patent/JPH03173360A/en
Publication of JPH03173360A publication Critical patent/JPH03173360A/en
Pending legal-status Critical Current

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  • Inverter Devices (AREA)

Abstract

PURPOSE:To prevent a short-circuit accident by maintaining a switch OFF for a predetermined time when the switch is switched ON, OFF in an inverter circuit for driving an induction motor. CONSTITUTION:An inverter circuit is composed of an oscillator 1, a timer 2 and a converter 3. The oscillator 1 generates a pulse signal having 50% duty, and outputs normal and reverse outputs Q, Q of a filp-flop circuit 11 of its output unit. The timer 2 has two monostable multivibrators MA, MB, which receive the signals Q, Q, and output pulse signals (A), (B) for a predetermined time. The pulse widths of the signals (A), (B) are reduced smaller than those of the signals Q, Q. The converter 3 has switch units 31, 32, 33, 34. The units 31, 32, 33, 34 are closed while the signal A is positive. The units 32, 33 are closed during the positive period of the signal B. That is, pause time interrupts the ON of the switches.

Description

【発明の詳細な説明】 (産業上の利用分![!7 ) 本発明は主として誘導電動機を駆動するためのインバー
タ回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application! [!7) The present invention mainly relates to an inverter circuit for driving an induction motor.

(従来の技術) 家電製品その他に使用されている誘導TS動機(以下モ
ーターと称す)は、商用周波数の交流電動力で駆動され
ており、商用周波数の交流電力をモーターに直接印加し
た状態での回転速度の調整手段としては、モーターの二
次巻線に可変抵抗を接続し、二次抵抗の変化で行うこと
が知られている。しかし前記二次抵抗の発熱及び抵抗損
による電力損失並びに調整範囲等の点から種々の欠点が
存在する。そこで近年周波数変換によってモーターの回
転速度を変化させろ手段が多用されてきている。これは
商用周′tlI数の交IIF、電力を一旦直r・狂電力
に変換し、再度所望の周波数の交流電力に変換し、変換
した所望の周波数の交流電力をモークーに供給し、所望
の回転数の動力を得るものである。
(Prior art) Induction TS motors (hereinafter referred to as motors) used in home appliances and other products are driven by AC electric power at a commercial frequency, and when AC power at a commercial frequency is directly applied to the motor, It is known that the rotational speed can be adjusted by connecting a variable resistor to the secondary winding of the motor and changing the secondary resistance. However, there are various drawbacks in terms of power loss due to heat generation and resistance loss of the secondary resistor, adjustment range, etc. Therefore, in recent years, means for changing the rotational speed of the motor by frequency conversion has been frequently used. This is an AC IIF with a commercial frequency of tlI, and the power is first converted to direct r/mad power, then converted again to AC power of the desired frequency, and the converted AC power of the desired frequency is supplied to the moku to generate the desired power. It obtains the power of rotational speed.

本発明は特に前記の直流を力を交流電力に交湧するイン
バータ回路に関するものである。従来多用されているイ
ンバータ回路は基本的に並列型インバータ回路と、直列
型インバータ回路が知られている。並列型インバータは
第6図(0に示スように2個のスイッチ部(→lイリス
タとトリガ回路で構成されている)と変圧器巻線をルー
プ状に接続すると共に、変圧巻線と並列に転流コンデン
サを接続し、直流電圧を@線中性点と両スイッチ部の接
続点との間に印加し、負荷は変圧器の二次巻線に接続し
てなるもので、スイッチ部の交互のオン−オフ動作で変
圧器@綿の磁界の方向が切り換えられ、変圧器二次巻線
に交流電圧が発生するものである 。また直列型インバ
ータ回路は第7図(ロ)に示すように、直流電源間にス
イッチ部、転流リアクトル、スイッチ部と直列に接続し
、転流リアクトル中点と負極との間に転流コンデンサ及
び負荷を直列に接続するもので、スイッチ部のオン−オ
フ動作によって転流コンデンサの充放電がなされて負荷
に交流電圧を印加するものである。
The present invention particularly relates to an inverter circuit that converts the above-mentioned direct current into alternating current power. Inverter circuits that have been widely used in the past are basically known as parallel type inverter circuits and series type inverter circuits. As shown in Figure 6 (0), a parallel inverter connects two switch sections (consisting of an iristor and a trigger circuit) and a transformer winding in a loop, and connects the transformer winding in parallel. A commutating capacitor is connected to the terminal, and a DC voltage is applied between the neutral point of the @ line and the connection point of both switch sections, and the load is connected to the secondary winding of the transformer. The direction of the magnetic field of the transformer @ cotton is switched by the alternating on-off operation, and an alternating current voltage is generated in the transformer's secondary winding.The series inverter circuit is as shown in Figure 7 (b). A switch section, a commutating reactor, and a switch section are connected in series between the DC power supply, and a commutating capacitor and a load are connected in series between the midpoint of the commutating reactor and the negative pole. The off-state operation charges and discharges the commutating capacitor and applies an alternating current voltage to the load.

(発明が解決しようとする課題) 前述した従来の並列型インバータ回路及び直列梨インバ
ータ回路は直接直流電圧を負荷に印加せず、変圧器を介
したり、転流コンデンサを介して負荷に交流電圧を印加
してなる。しかし負荷に対し直流電圧を交互に印加する
回路を形成すると容易に交流電力を得る乙とができる。
(Problems to be Solved by the Invention) The conventional parallel inverter circuit and series inverter circuit described above do not directly apply DC voltage to the load, but instead apply AC voltage to the load via a transformer or a commutating capacitor. It is applied. However, by forming a circuit that alternately applies DC voltage to the load, AC power can be easily obtained.

その回路は第5図に例示するように4個のスイッチ部a
、b。
The circuit consists of four switch sections a as illustrated in FIG.
, b.

c、dをブリッジ回路状に接続し、対向する接続点間に
各々直流電源と負荷を接続し、対面するスイッチ部a、
dとスイッチ部す、cとを各々一つベアとし、各ペア交
互にオン−オフ動作せしめると負荷に矩形波形の交流電
圧が印加されることになる。
c and d are connected in the form of a bridge circuit, and a DC power supply and a load are respectively connected between the opposing connection points, and the facing switch parts a,
When each pair of switch parts d and switch parts S and C are bare, and each pair is turned on and off alternately, a rectangular waveform alternating current voltage is applied to the load.

前記のスイッチブリッジ回路を基本とするインバータ回
路に於て、単に各スイッチ部a、b、c。
In the inverter circuit based on the above-mentioned switch bridge circuit, each switch section a, b, c.

dを同時に動作せしめろとしても、スイッチ部の回路構
成並びに使用電子部品の特性誤差等から、スイッチ部の
オン−オフ移行動作に僅かな時間的相違が生ずる虞があ
り、このため負荷を通らない大きな電流が流れて回路を
破壊する危険が生ずる。
Even if you try to operate d at the same time, there is a risk that there will be a slight time difference in the on-off transition operation of the switch section due to the circuit configuration of the switch section and characteristic errors of the electronic components used, so the load will not pass. There is a risk that a large current will flow and destroy the circuit.

そこで本発明は前記の直接変換のインバータ回路に於て
、回路破損の危険を未然に防止してなる回路を提供せん
とするものである。
Therefore, the present invention aims to provide a circuit which prevents the risk of circuit damage in the above-mentioned direct conversion inverter circuit.

(課題を解決するための手段) 本発明に係るインバータ回路は、4個のスイッチ部をブ
リッジ回路状に接続し、対向接続点間1こ直流電源を接
続すると共に、他の対向接続点間に負荷を接続し、対面
するスイッチ部を一組とし、各組交互にオン−オフ[1
を行い負荷に交流電力を供給するインバータ回路に於て
、前記スイッチ部のオン−オフ制御を行う制御部に、出
力周波数を定める発振部と、スイッチ部のオン−オフ切
り換えに際して所定の時間スイッチ部がオフ状態を維持
するためのタイマ部を備えたことを特徴とするものであ
る。
(Means for Solving the Problems) An inverter circuit according to the present invention connects four switch sections in a bridge circuit configuration, connects one DC power source between opposing connection points, and connects one DC power source between the other opposing connection points. Connect the load, set the switch parts facing each other as one set, and turn each set alternately on and off [1
In an inverter circuit that supplies alternating current power to a load, the control section that performs on-off control of the switch section includes an oscillation section that determines the output frequency, and a switch section that controls the on-off switching of the switch section for a predetermined period of time. The device is characterized in that it includes a timer section for maintaining the off state.

(作 用) 対面するスイッチ部が組となって他の組のスイッチ部と
交互にオン−オフ動作を行うと、負荷に対して矩形の交
流電圧が印加されると共に、前記の各スイッチ部のオン
−オフ移行に際して、所定時間オフ状態を維持するので
、仮りにスイッチ部の動作特性に多少の時間的相違があ
ったとしても、その誤差はオフ維持時間に吸収されてし
まうので、短絡?H流が生ずる虞がない。
(Function) When the switch parts facing each other form a set and perform on-off operations alternately with the switch parts of other sets, a rectangular alternating current voltage is applied to the load, and the voltage of each switch part is applied to the load. During on-off transition, the off state is maintained for a predetermined period of time, so even if there is a slight temporal difference in the operating characteristics of the switch section, the error will be absorbed by the off-maintenance time, so there is no short circuit? There is no risk of H flow occurring.

(実施例) 次に本発明の実施例について説明ずろ。(Example) Next, examples of the present invention will be explained.

本発明に係るインバータ回路は、発振部1.タイマ部2
と切換部3から構成され、発振部1は発振器2分局器等
を有し、50%デユーティ比の任意の周波数のパルス信
号を発するもので、その出力部には正逆百出力が出力さ
れるようにフリ・ツブフロップ回路11を設けてなる。
The inverter circuit according to the present invention includes an oscillation section 1. Timer section 2
The oscillator 1 has an oscillator 2 splitter, etc., and emits a pulse signal of an arbitrary frequency with a duty ratio of 50%, and its output section outputs a forward and reverse output. A flip-flop circuit 11 is provided as shown in FIG.

タイマ部2は2個の単安定マルチバイブレークM人、M
Bで構成され、前記フリップフロップ回路11のQ出力
をM人で受け、Q出力をMBで受け、前記出力を受けろ
と所定時間パルス信号A、Bを発するものである。而も
このパルス信号A、Bの出力時間は前記フリップフロッ
プ回路11のQ出力(Q出力)の周期より短い周期とし
ておくものである。具体的には第4図に示すように発振
部1の出力周波数を501(□とすると、発振部1の出
力パルス信号Q、Qの・1イ出力周期は10m5となる
ので、マルチパイブレークMA、MUの出力周期は7m
sとするものである。切換部3は4個のスイッチ部31
.32.33.34からなり、各スイッチ部31.32
.33.34は正電極側より各々スイッチ部31と33
を直列とし、スイッチ部32と34も直列に接続すると
共に、各直列スイッチ部を並列に接続して全体をブリッ
ジ回路状とし、スイッチ部接続点a、β間に負荷を接続
するものである。スイッチ部31.32.33.34の
具体的構造は、第2図及び第3図に示すように正極又は
負極と前記のα、βの接続点間のスイッチングをなすス
イッチングトランジスタT1〜T4と、前記スイッチン
グトランジスタT、〜T4のオノーオフ制御をなすホト
部H,〜H4からなり、ホト部H,−1(4は前記マル
チバイブレータM人〜MBの各出力によって通電発光す
る発光ダイオードと、発光ダイオードによってオン−オ
フ動作を制御され、オン時に前3己スイツチングトラン
ジスタT1〜T4をオン1大態とするホトトランジスタ こホト部H,−Haの発光ダイオードはマルチバイブド
ータMAの出力と接続し、他のホI・部H2+H3の発
光ダイオードはマルチバイブレータMBの出力と接続す
る。
Timer section 2 consists of two monostable multi-by-break M, M
The Q output of the flip-flop circuit 11 is received by M people, the Q output is received by MB, and pulse signals A and B are issued for a predetermined time to indicate that the outputs should be received. Moreover, the output times of the pulse signals A and B are set to have a cycle shorter than the cycle of the Q output (Q output) of the flip-flop circuit 11. Specifically, as shown in Fig. 4, if the output frequency of the oscillator 1 is 501 (□), the output period of the output pulse signals Q and Q of the oscillator 1 is 10 m5, so the multi-pie break MA , MU output cycle is 7m
s. The switching unit 3 has four switch units 31
.. 32, 33, and 34, each switch section 31.32
.. 33 and 34 are the switch parts 31 and 33, respectively, from the positive electrode side.
are connected in series, the switch sections 32 and 34 are also connected in series, and the series switch sections are connected in parallel to form a bridge circuit as a whole, and a load is connected between switch section connection points a and β. The specific structure of the switch section 31.32.33.34 is as shown in FIGS. 2 and 3, and includes switching transistors T1 to T4 that perform switching between the positive electrode or the negative electrode and the connection points of α and β, and It consists of photo parts H, ~H4 which performs on/off control of the switching transistors T, ~T4, and photo parts H, -1 (4 is a light emitting diode that is energized and emits light by the respective outputs of the multivibrators M ~ MB, and a light emitting diode). The light-emitting diodes of the phototransistors H and -Ha are connected to the output of the multivib daughter MA, and the on-off operation is controlled by the phototransistor, which turns the front three switching transistors T1 to T4 into an ON state when turned on. The light emitting diodes of the other H2+H3 sections are connected to the output of the multivibrator MB.

次に前記実施例の動作について次に説明する。Next, the operation of the above embodiment will be explained below.

発振部1からデユーティ比50%の所定の周波数の信号
が正逆信号Q,Qとして出力され、タイマ部2の各マル
チバイブレークM人, MBに入力する。
A signal of a predetermined frequency with a duty ratio of 50% is outputted from the oscillation section 1 as forward/reverse signals Q, Q, and inputted to each multi-by-break M and MB of the timer section 2.

即ちQ出力はM人に入力し、Q出力はMBに入力する。That is, the Q output is input to M people, and the Q output is input to MB.

各マルチバイブレータM人, MBは前記入力を受けた
場合所定の時間例えば7ms(発振部出力を50H2と
した場合)のパルス信号A,Bを発する。
When each of the multivibrators M and MB receives the input, it emits pulse signals A and B for a predetermined period of time, for example, 7 ms (assuming the output of the oscillator is 50H2).

このパルス信号A,Bが発せられている間、各発光ダイ
オードが通電発光し、ホI− 1−ランジスタをオン状
態とし、それに伴ってスイッチングトランジスタT1〜
T4をオン状態とするものである。従って発振部1のQ
出力がハイ出力に立ち上がったとき(Q出力は当然ロー
出力) マルチバイブレータM屓よ?msの間へイ出力
となり、この出力期間中スイッチ部31及びスイッチ部
34が各々導通状態となり、負荷に於て0点からβ点へ
の電流が流れる。次にQ出力かハイ出力に立ち上がった
とき、同様にスイッチ部32とスイッチ部33が導通状
態となってβ点から0点への電?lEが流れることにな
り、発振部1の周波数に対応した出力周波数の交流電力
が負荷に供給されろことになる。
While these pulse signals A and B are being emitted, each light emitting diode is energized and emits light, turning on the transistor H1-1, and accordingly, the switching transistors T1 to T1 are turned on.
This turns on T4. Therefore, the Q of oscillator 1
When the output rises to high output (Q output is naturally low output) What about multivibrator M? ms, and during this output period, the switch section 31 and the switch section 34 are each in a conductive state, and a current flows from the 0 point to the β point in the load. Next, when the Q output rises to the high output, the switch section 32 and the switch section 33 become conductive in the same way, and the current flows from the β point to the 0 point. lE will flow, and AC power with an output frequency corresponding to the frequency of the oscillation unit 1 will be supplied to the load.

またスイッチ部31とスイッチ部34の組がオン状態か
らオフ状態に移行した後、スイッチ部32と同33がオ
ン状態に移行するまでの間に3IISの時間が設けられ
ている。このインターロックタイムtを設けたことによ
って各スイッチ部の導通による瞬間的短絡が確実に防I
Fされたものである。
Further, a time period of 3IIS is provided between when the pair of switch sections 31 and 34 shifts from the on state to the off state and until the switch sections 32 and 33 shift to the on state. By providing this interlock time t, instantaneous short circuit due to conduction of each switch part can be reliably prevented.
It was F.

尚本発明は前記実施例に限定されるものでなく、発振部
1,タイマ部2,スイッチ部31〜34の具体的構成は
、所定の作用を発揮するものであれば、任意の回路素子
を用いた回路構成としても良いものである。
It should be noted that the present invention is not limited to the above embodiments, and the specific configurations of the oscillation section 1, timer section 2, and switch sections 31 to 34 may include any circuit element as long as it exhibits a predetermined effect. The circuit configuration used is also good.

(発明の効果) 本発明は以上のようにスイッチ部をブリ・ソジ回漬状に
接続し、対向接続点間に各々直流電源と負荷を接続し、
対面するスイッチ部をペアとして他のペアと交互にオン
−オフ動作を行って負荷に交tg =力を供給するイン
バータ回路に於て、スイッチ部の一つペアがオン状態に
移行する前に他ペアが確実にオフ状態に移行しているよ
うにオン−オフ切り換丸に際してインターロックタイム
を設けたもので、回路構成部品等の特性誤差等に基づく
短絡事故を未然に防止したものである。
(Effects of the Invention) As described above, the present invention connects the switch portions in a circuit-shaped manner, and connects a DC power source and a load between the opposing connection points, respectively.
In an inverter circuit that supplies power to a load by alternating on-off operations with other pairs of switch units facing each other, one pair of switch units switches on and off before the other switches to the on state. An interlock time is provided at the time of on-off switching to ensure that the pair is turned off, thereby preventing short-circuit accidents due to characteristic errors in circuit components, etc.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明回路の簡便なブロック図、第2図は同一
部詳細図、第3図は切換部の回路図、第4図は各出力信
号波形図、第5図は基本回路図、第6図は従来のインバ
ータ回路を示すもので(0は並列型インバータ回路、(
口)は直列型インバータ回路である。 1は発振部 11はフリップフロップ回路 2はタイマ部 M^, MBハ単安定マルチパイブレーク3は切換部 31、  32,  33.  34はスイ ノチ部T
,〜T4はスイッチングI・ラシジスタH 、〜H 4
ばホト部 第3 図 第4 図 第1 図 第2 図
Figure 1 is a simple block diagram of the circuit of the present invention, Figure 2 is a detailed diagram of the same part, Figure 3 is a circuit diagram of the switching section, Figure 4 is a waveform diagram of each output signal, Figure 5 is a basic circuit diagram, Figure 6 shows a conventional inverter circuit (0 is a parallel inverter circuit, (
) is a series inverter circuit. 1 is the oscillation section 11, the flip-flop circuit 2 is the timer section M^, and the monostable multi-pie break 3 is the switching sections 31, 32, 33. 34 is the sui nochi part T
, ~T4 is the switching I/lasigister H, ~H4
Photo section Fig. 3 Fig. 4 Fig. 1 Fig. 2

Claims (1)

【特許請求の範囲】[Claims] (1)4個のスイッチ部をブリッジ回路状に接続し、対
向接続点間に直流電源を接続すると共に、他の対向接続
点間に負荷を接続し、対面するスイッチ部を一組とし、
各組交互にオン−オフ制御を行い負荷に交流電力を供給
するインバータ回路に於て、前記スイッチ部のオン−オ
フ制御を行う制御部に、出力周波数を定める発振部と、
スイッチ部のオン−オフ切り換えに際して所定の時間ス
イッチ部がオフ状態を維持するためのタイマ部を備えた
ことを特徴とするインバータ回路。
(1) Connect the four switch sections in a bridge circuit, connect a DC power source between opposing connection points, connect a load between the other opposing connection points, and set the facing switch sections as one set,
In an inverter circuit that alternately performs on-off control for each set and supplies AC power to a load, an oscillation unit that determines an output frequency is provided in a control unit that performs on-off control of the switch unit;
An inverter circuit comprising a timer section for maintaining the switch section in an off state for a predetermined period of time when switching the switch section on and off.
JP1309879A 1989-11-29 1989-11-29 Inverter circuit Pending JPH03173360A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1309879A JPH03173360A (en) 1989-11-29 1989-11-29 Inverter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1309879A JPH03173360A (en) 1989-11-29 1989-11-29 Inverter circuit

Publications (1)

Publication Number Publication Date
JPH03173360A true JPH03173360A (en) 1991-07-26

Family

ID=17998405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1309879A Pending JPH03173360A (en) 1989-11-29 1989-11-29 Inverter circuit

Country Status (1)

Country Link
JP (1) JPH03173360A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6087678A (en) * 1983-10-20 1985-05-17 Toshiba Corp Control circuit for inverter
JPS6112473A (en) * 1984-06-15 1986-01-20 スローン ヴアルヴ カムパニー Front-section air swing-away

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6087678A (en) * 1983-10-20 1985-05-17 Toshiba Corp Control circuit for inverter
JPS6112473A (en) * 1984-06-15 1986-01-20 スローン ヴアルヴ カムパニー Front-section air swing-away

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