JPH03173286A

JPH03173286A - Hdtv input signal automatic changeover device

Info

Publication number: JPH03173286A
Application number: JP31376789A
Authority: JP
Inventors: Shingo Hatano; 慎互畑野
Original assignee: Mitsubishi Electric Corp
Current assignee: Mitsubishi Electric Corp
Priority date: 1989-12-01
Filing date: 1989-12-01
Publication date: 1991-07-26

Abstract

PURPOSE:To prevent an unpleasant pattern from being displayed on a CRT by muting a video signal till a normal video signal is outputted from a signal processing circuit at changeover of input signals and at application of power. CONSTITUTION:When an input signal is switched a signal discrimination circuit 4 sends a discrimination signal to a changeover circuit 5 to switch the input signal automatically. Simultaneously, the circuit 4 sends a mute signal to a mute circuit 7 for a prescribed time after the input signal is switched to turn off the input of the video signal to an output circuit 8 and after the circuit 5 is switched, the mute signal is interrupted to input the video signal to the circuit 8. Moreover, A reset pulse generating circuit 9 sends the mute signal to the circuit 7 for a prescribed time at application of power to turn off the video signal to the circuit 8 till a normal video signal is outputted from the signal processing circuit 6 at application of power. Since the circuit 7 mutes the video signal while the normal video signal is not outputted in this way, display of an unpleasant picture on the CRT 11 is prevented.

Description

【発明の詳細な説明】（産業上の利用分野）この発明は、Ｙ、Ｐａ　、ＰＲ／Ｇ、Ｂ、Ｈの共用入力
端子と自動切換回路および信号処理回路を備えたＨＤＴ
Ｖの入力信号自動切換装置に関す〔従来の技術〕第２図は従来のＨＤＴＶ入力信号自動切換装置のブロッ
ク回路図である。図において、（１）〜（３）は、ｙ／
Ｇ、Ｐａ　／Ｂ、ＰＲ／Ｒの各共用入力端子、（４ａ）
はクランプ回路で、Ｐ、／Ｂ共通入力端子（２）から入
力された信号のペデスタルレベルを０■にクランプする
。（４ｂ）は積分回路で、クランプ回路（４ａ）から入
力されるペデスタルレベルを積分する。（４ｃ）は判別
回路で、積分回路（４ｂ）からの出力をＤＣレベルによ
って判別する。上記各回路（４ａ）　、　（４ｂ）　、
　（４ｃ）で信号判別回路（４）を構成している。（５
）はＹ、Ｐａ　、ＰＲ／Ｇ、Ｂ、Ｒの切り換え回路（以
下、ｒ切り換え回路」という）。Detailed Description of the Invention (Field of Industrial Application) The present invention provides an HDT equipped with Y, Pa, PR/G, B, and H common input terminals, an automatic switching circuit, and a signal processing circuit.
2. Related to automatic input signal switching device for HDTV [Prior art] FIG. 2 is a block circuit diagram of a conventional automatic input signal switching device for HDTV. In the figure, (1) to (3) are y/
G, Pa/B, PR/R common input terminals, (4a)
is a clamp circuit which clamps the pedestal level of the signal input from the P and /B common input terminals (2) to 0■. (4b) is an integrating circuit which integrates the pedestal level input from the clamp circuit (4a). (4c) is a discrimination circuit that discriminates the output from the integrating circuit (4b) based on the DC level. Each of the above circuits (4a), (4b),
(4c) constitutes a signal discrimination circuit (4). (5
) is a switching circuit for Y, Pa, PR/G, B, and R (hereinafter referred to as "r switching circuit").

（６）はＹ、Ｐａ　、ＰＲ／Ｇ、Ｂ、Ｒの各信号を処理
する信号処理回路、　（８）は信号処理回路（６）から
の映像信号を出力する出力回路、（１１）はＣＲＴであ
る。(6) is a signal processing circuit that processes each signal of Y, Pa, PR/G, B, and R. (8) is an output circuit that outputs the video signal from signal processing circuit (6). (11) is a CRT. It is.

次に動作について説明する。Next, the operation will be explained.

各入力端子（１）〜（３）から入力されたＹ／Ｇ。Y/G input from each input terminal (1) to (3).

Ｐ　ｈ　／　Ｂ　、　Ｐ　Ｒ／　Ｒ信号のうち、Ｐａ／
Ｂ信号のペデスタルレベルをクランプ回路（４ａ）で。Among P h / B and P R / R signals, Pa /
The pedestal level of the B signal is controlled by the clamp circuit (4a).

■にクランプし、積分回路（４ｂ）で積分する。ＰＲ信
号はペデスタルの上下に信号が存在し、Ｂ信号はペデス
タルの片側にのみ信号が存在するため、Ｐ、信号はＢ信
号にくらべて複数ラインを積分した後の直流レベルはペ
デスタルに近くなる０判別回路（４Ｃ）は、そのＤＣレ
ベルに応じて入力された信号がＹ　、Ｐ　ａ　、　Ｐ　
Ｒの信号であるか、Ｇ、Ｂ、Ｒの信号であるかを判別し
、その判別信号に応じて切り換え回路（５）が切り換え
られて、入力信号が信号処理回路（６）　に入力される
。(2) and integrate it with the integrating circuit (4b). Since the PR signal has signals above and below the pedestal, and the B signal has a signal only on one side of the pedestal, the DC level of the P signal after integrating multiple lines is closer to that of the pedestal than the B signal. The discrimination circuit (4C) determines whether the input signal is Y, P a , P according to its DC level.
The input signal is determined whether it is an R signal or a G, B, R signal, and the switching circuit (5) is switched according to the determined signal, and the input signal is input to the signal processing circuit (6). .

この信号処理回路（６）に入力された信号は、ここでＹ
、ＰＲ，Ｐ、／Ｇ、Ｂ、Ｒそれぞれに応じた信号処理を
なされて映像信号となり、出力回路（８）　　に送られ
て、ＣＲＴ　（１１）で映像に再現される。The signal input to this signal processing circuit (6) is
, PR, P, /G, B, and R to form a video signal, which is sent to an output circuit (8) and reproduced as a video on a CRT (11).

[Problem to be solved by the invention]

従来の）（ＤＴＶ入力信号自動切換装置では、判別精度
を上げるため複数ラインの積分を行った後判別するため
、電源の没入時、または入力信号切り換え時の信号判別
に時間を要するため、判別して切り換えられるまでの間
、画面が見ずらくなるという問題点があった。Conventional) (DTV input signal automatic switching equipment) performs discrimination after integrating multiple lines in order to improve discrimination accuracy, so it takes time to discriminate signals when the power is turned on or when input signals are switched. There was a problem in that the screen became difficult to view until it was switched.

この発明は、上記のような問題点を解決するためになさ
れたもので、入力信号切り換え時および電源没入時に画
面が見ずらくなることのないＨＤＴＶの入力信号自動切
換装置を得ることを目的とする。This invention was made to solve the above-mentioned problems, and its purpose is to provide an automatic input signal switching device for an HDTV that does not make the screen difficult to see when switching input signals or when the power is turned off. do.

（課題を解決するための手段〕この発明に係るＨＤＴＶ入力信入力信号自動切換装入力
イコ号の切り換え時および電源没入時に、一定時間映像
信号をミュートするミュート回路を備えた点を特徴とす
る。(Means for Solving the Problems) The HDTV input signal automatic switching system according to the present invention is characterized in that it includes a mute circuit that mutes the video signal for a certain period of time when switching the input equalization signal and when the power is turned on.

[Effect]

この発明におけるミュート回路は、入力信号切り換え時
および電源投入時に、判別信号および；源投入信号によ
り出力回路へ入力される映像信号を所定時間ＯＦＦにす
るので、ＣＲＴに見苦しい画面が映出されない。The mute circuit according to the present invention turns off the video signal input to the output circuit for a predetermined time by the discrimination signal and the power-on signal when switching input signals and turning on the power, so that an unsightly screen is not displayed on the CRT.

（発明の実施例〕第１図は、この発明の一実施例を示すブロック回路図で
、第２図と同一部分には同一符号を付して説明を省略す
る。(Embodiment of the Invention) FIG. 1 is a block circuit diagram showing an embodiment of the present invention, and the same parts as in FIG. 2 are given the same reference numerals and the explanation thereof will be omitted.

図において、（９）はリセットパルス発生回路で、電源
ＯＮ時にリセットパルスを発生する。In the figure, (9) is a reset pulse generation circuit, which generates a reset pulse when the power is turned on.

（１０）は電源回路、　（７）はミュート回路で、判別
回路（４ｃ）またはリセットパルス発生回路（９）から
の情報に応じて出力回路（８）に入力される映像信号を
一定時間ＯＦＦにする。(10) is a power supply circuit, and (7) is a mute circuit that turns off the video signal input to the output circuit (8) for a certain period of time according to information from the discrimination circuit (4c) or the reset pulse generation circuit (9). do.

つぎに動作を説明する。Next, the operation will be explained.

入力信号が切り換えられたとき、信号判別回路（４）が
判別信号を切り換え回路（５）に送出して自動釣に切り
換えるのは従来例と同じである。When the input signal is switched, the signal discrimination circuit (4) sends a discrimination signal to the switching circuit (5) to switch to automatic fishing, as in the conventional example.

同時に、信号判別回路（４）は、入力信号が切り換った
ときから一定時間ミュート信号をミュート回路（７）　
に送出して出力回路（８）への映像信号の入力をＯＦＦ
にし、切り換え回路（５）が切り換えられたのち、ミュ
ート信号を断って出力回路（８）へ映像信号を入力する
。At the same time, the signal discrimination circuit (4) sends a mute signal to the mute circuit (7) for a certain period of time from when the input signal is switched.
and turn off the input of the video signal to the output circuit (8).
After the switching circuit (5) is switched, the mute signal is cut off and the video signal is input to the output circuit (8).

また、リセットパルス発生回路（９）は、電源が没入さ
れたとき、一定時間ミュート信号をミュート回路（７）
　に送出し、信号処理回路（６）から正常な映像信号が
出力されるまでの間、出力回路（８）への映像信号の入
力をＯＦＦにする。In addition, the reset pulse generation circuit (9) sends a mute signal to the mute circuit (7) for a certain period of time when the power is turned off.
The input of the video signal to the output circuit (8) is turned off until a normal video signal is output from the signal processing circuit (6).

このようにミュート回路（月は、正常な映像信号が出力
されない間、映像信号をミュートするので、ＣＲＴ　（
１１）に見苦しい画像が映出されるのを防止する。In this way, the mute circuit (the moon) mutes the video signal while a normal video signal is not output, so the CRT (
11) Prevent unsightly images from being displayed.

（発明の効果）この発明は、以上説明したように、入力信号の切り換え
時および電源投入時に、信号処理回路（６）から正常な
映像信号が出力されるまでの間、映像信号をミュートす
るように構成したものであるから、入力信号切換時、お
よび電源投入時に、ＣＲＴに見苦しい画面が表示される
のを防止できるＨＤＴＶ入力信号自動切換装置が得られ
る効果かある。(Effects of the Invention) As explained above, the present invention mutes the video signal until a normal video signal is output from the signal processing circuit (6) when switching the input signal and when turning on the power. Therefore, it is possible to obtain an automatic HDTV input signal switching device that can prevent an unsightly screen from being displayed on a CRT when switching input signals and when turning on the power.

[Brief explanation of the drawing]

第１図はこの発明の一実施例のブロック回路図、第２図
は従来のＨＤＴＶ入力信号自動切換装置のブロック回路
図である。（１）・・・Ｙ／Ｇ共通入力端子、　（２）・・・Ｐ８
／Ｂ共通入力端子、　（３）・・・ＰＲ／Ｒ共通入力端
子、　（４）・・・信号判別回路、　（５）・・・Ｙ、
ＰＢ、ＰＲ／Ｇ。Ｂ、Ｒ切り換え回路、　（６）・・・信号処理回路、　
（７）・・・ミュート回路、　（８）・・・出力回路、
　（９）・・・リセットパルス発生回路、（１０）・・
・電源回路。なお、各図中、同一符号はそれぞれ同一または相当部分
を示す。FIG. 1 is a block circuit diagram of an embodiment of the present invention, and FIG. 2 is a block circuit diagram of a conventional HDTV input signal automatic switching device. (1)...Y/G common input terminal, (2)...P8
/B common input terminal, (3)...PR/R common input terminal, (4)...signal discrimination circuit, (5)...Y,
PB, PR/G. B, R switching circuit, (6)...signal processing circuit,
(7)...Mute circuit, (8)...Output circuit,
(9)...Reset pulse generation circuit, (10)...
・Power circuit. Note that in each figure, the same reference numerals indicate the same or corresponding parts.

Claims

[Claims]

(1) The signals input from the common input terminal to which the Y, P_B, and P_R signals and the G, B, and R signals are input are
A signal discrimination circuit that discriminates whether the signal is a B, P_R signal or a G, B, R signal, and Y, P_B that switches the input to the corresponding signal processing circuit based on the discrimination result of this signal discrimination circuit.
, P_R/G, B, R switching circuit
What is claimed is: 1. An HDTV input signal automatic switching device comprising a mute circuit that turns off a video signal sent from a signal processing circuit for a predetermined period of time when input signals are switched and when power is turned on.