JPH0316993A - Vapor-phase epitaxial growth of compound semiconductor - Google Patents

Vapor-phase epitaxial growth of compound semiconductor

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Publication number
JPH0316993A
JPH0316993A JP15102389A JP15102389A JPH0316993A JP H0316993 A JPH0316993 A JP H0316993A JP 15102389 A JP15102389 A JP 15102389A JP 15102389 A JP15102389 A JP 15102389A JP H0316993 A JPH0316993 A JP H0316993A
Authority
JP
Japan
Prior art keywords
substrate
reaction tube
crystal
compound semiconductor
vapor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15102389A
Other languages
Japanese (ja)
Inventor
Keiji Katagiri
片桐 圭司
Masakatsu Ubusawa
生沢 正克
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Eneos Corp
Original Assignee
Nippon Mining Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mining Co Ltd filed Critical Nippon Mining Co Ltd
Priority to JP15102389A priority Critical patent/JPH0316993A/en
Publication of JPH0316993A publication Critical patent/JPH0316993A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To grow an epitaxial layer on the whole surface uniformly and densely and to reduce surface roughness of growth layer in growing mixed crystal having a lattice constant different from that of substrate crystal in vapor phase on the substrate of compound semiconductor by using a substrate having specifically deviated plane orientation of surface. CONSTITUTION:A substrate 5 of compound semiconductor (e.g. GaAs substrate) having plane orientation of surface deviated 0.5-10 degrees in the direction from plane (100) to [001] or [010] is arranged at the downstream of a reaction tube 1. A boat 4 having stored a raw material 3 (e.g. gallium) is arranged at the upper stream of the reaction tube 1. Then the reaction tube 1 is heated by an electric furnace 2, other raw materials 8a (e.g. AsCl3) and 8b (e.g. PCl3) are transferred to the reaction tube 1, reacted with the raw material 3 and mixed crystal (e.g. GaAsP) having a lattice constant different from that of substrate crystal is subjected to vapor-phase epitaxial growth on the substrate 5 to obtain a growth layer of few crystal defects.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、半導体ウェーハ上へのエビタキシャル或長技
術に関し、特に閃亜鉛鉱形の結晶構造を有する化合物半
導体単結晶ウェーハ上に混晶を気相成長させる場合に利
用して効果的な技術に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an epitaxial elongation technique on semiconductor wafers, and in particular to the method of elongating mixed crystals on compound semiconductor single crystal wafers having a zincblende crystal structure. This article relates to effective techniques for use in vapor phase growth.

[従来の技術] 従来、例えばGaAsPのような混晶ウェーハは、G 
a A s基板上に、水素化物CVD法や現化物CvD
法、M(jCVD (有機金属気相エビタキシャル威長
方法)などの気相戊長方法によりエビタキシャル層を威
長させることによって製造されている。なお.tb族−
vb族4元系混晶の基板となるウェーハの気相或長に際
して、エビタキシャル成長層の表面状態を制御するため
、ウェーハの威長面を若干傾けたものを使用する方法が
提案されている(特開昭60−71599号)。
[Prior Art] Conventionally, mixed crystal wafers such as GaAsP are
a On the A s substrate, hydride CVD method or active compound CvD method is applied.
The tb group-
In order to control the surface condition of the epitaxial growth layer during vapor phase growth of a wafer that serves as a substrate for a VB quaternary mixed crystal, a method has been proposed in which the longitudinal plane of the wafer is slightly tilted. (Unexamined Japanese Patent Publication No. 60-71599).

・しかしながら、化合物半導体基板上に混晶エピタキシ
ャル層を成長させる場合、椙子不整合により戒長層表面
に欠陥が生じ易い。そこで基板と混晶エピタキシャル層
との間に組或比が徐々に変化するバッファ層を設けるこ
とが行なわれるが、そのような組戒勾配層を設けても表
面欠陥を完全になくすことはできない。
-However, when a mixed crystal epitaxial layer is grown on a compound semiconductor substrate, defects are likely to occur on the surface of the Kaincho layer due to the Sako mismatch. Therefore, a buffer layer whose composition ratio gradually changes is provided between the substrate and the mixed crystal epitaxial layer, but even if such a composition gradient layer is provided, surface defects cannot be completely eliminated.

[発明が解決しようとする課題コ 上記先願発明は、4元系混晶ウエーハの基板となるウェ
ーハの気相戊長に際して、その成長層表面に現われるク
ロスハッチと呼ばれる縞模様に起因した表面粗さを低減
させることを目的としており、縞模様が現われること自
体成長層の表面粗さが大きいことを物語っている。
[Problems to be Solved by the Invention] The above-mentioned prior invention solves the problem of surface roughness caused by a striped pattern called a crosshatch that appears on the surface of a grown layer during vapor phase elongation of a wafer that serves as a substrate for a quaternary mixed crystal wafer. The purpose is to reduce the surface roughness of the growth layer, and the appearance of the striped pattern itself indicates that the surface roughness of the growth layer is large.

この発明は上記のような背景の下になされたもので、そ
の目的とするところは、化合物半導体ウ工一ハ上に格子
定数の異なる混晶エピタキシャル層を戊長させる場合に
、成長層の表面粗さを低減できるような気相エビタキシ
ャル成長方法を提供することにある。
This invention was made against the above background, and its purpose is to improve the surface of the grown layer when growing a mixed crystal epitaxial layer with different lattice constants on a compound semiconductor substrate. An object of the present invention is to provide a vapor phase epitaxial growth method that can reduce roughness.

[課題を解決するための手段] 上記1]的を達或するためこの発明は、化合物半4体基
板」二に格子定数の異なる混晶エピタキシャル層を成長
させる際に、基板表面の面方位を(100)面から[0
 0 1]方向あるいは[0 1 01方向、もしくは
結晶学的に(100)面と等価な面から(100)面に
ついての[00丁]方向、[0 1 0]方向と等価な
方向へ0.5〜10゛偏位した基板を用い、この基板表
面」―に混晶エビタキシャル層を戊艮させるようにした
[Means for Solving the Problems] In order to achieve the above-mentioned object 1), the present invention provides a technique for changing the surface orientation of the substrate surface when growing mixed crystal epitaxial layers with different lattice constants on a semi-quadram compound substrate. From the (100) plane [0
0 1] direction or [0 1 01 direction, or from a plane crystallographically equivalent to the (100) plane to the [00 direction] direction or the direction equivalent to the [0 1 0] direction regarding the (100) plane. A substrate deviated by 5 to 10 degrees was used, and a mixed crystal epitaxial layer was formed on the surface of the substrate.

また,上記各面の偏位方向はそれぞれ指定された方向の
みでなく、その±30゜以内の方向であればよい。
Further, the direction of deviation of each of the above-mentioned surfaces is not limited to the designated direction, but may be any direction within ±30° of the designated direction.

[作用] 上記した手段によれは、エビタキシャル層の成長面が傾
いているため結晶格子を構成する元素層の端部が基板表
面に階段状に現われ、そこをシードとしてエビタキシャ
ル層が戊長ずる。しかも、傾きを0.5〜10゜とした
ので、表面全体に亘って均一かつ緻密にエビタキシャル
層が戊長し、欠陥が生しにくい。つまり、傾きが10”
 を超えると、シードとなる原子層端部が多すぎて種々
のタイプの欠陥が多くなり、傾きが0.5゜未満である
と原子層端部以外のところがランダムにシードとなって
シーi〜となる部位が結晶表面上に不均−lこ分布する
ようになるため、小傾角粒界が現わ3 れる。また、面方位の偏位の方向を限定したためエビタ
キシャル層表面のクロスハッチが弱くなり、表面粗さが
低減されるようになる。
[Function] The reason for the above method is that because the growth plane of the epitaxial layer is tilted, the edges of the element layers constituting the crystal lattice appear on the substrate surface in a step-like manner, and the epitaxial layer is elongated using these as seeds. Cheating. Moreover, since the inclination is set to 0.5 to 10 degrees, the epitaxial layer is uniformly and densely elongated over the entire surface, and defects are less likely to occur. In other words, the slope is 10"
If the slope exceeds 0.5°, there will be too many edges of the atomic layer to serve as seeds, resulting in a large number of various types of defects; if the slope is less than 0.5°, parts other than the edges of the atomic layer will randomly become seeds, causing Since the sites where . Furthermore, since the direction of deviation of the plane orientation is limited, the crosshatch on the surface of the epitaxial layer becomes weaker, and the surface roughness is reduced.

[実施例] 第1図には、本発明に係る気相エビタキシャル成長方法
に使用する気相成長装置の一例を示す。
[Example] FIG. 1 shows an example of a vapor phase growth apparatus used in the vapor phase epitaxial growth method according to the present invention.

この気相戊長装置は、両端が閉塞された円筒状をなす石
英製の反応管1と、この反応管lを外部から加熱する電
気炉2とからなり、電気炉2は反応管1の軸方向温度分
布を制御できるように構威されている。この気相戒長装
置によりGaAsPを気相エビタキシャル或長させる場
合、反応v1内には、上流側(図では左側)に材料源で
あるガリウム3を収納した原料ボート4を配置し、下流
側に気相戊長をさせるGaAs基板5を配置する。
This vapor phase elongation device consists of a cylindrical quartz reaction tube 1 with both ends closed, and an electric furnace 2 that heats the reaction tube 1 from the outside. It is designed to control directional temperature distribution. When GaAsP is vapor-phase epitaxially elongated using this gas-phase elongation device, a raw material boat 4 containing gallium 3, which is a material source, is arranged on the upstream side (left side in the figure) in reaction v1, and A GaAs substrate 5 to be subjected to vapor phase elongation is placed.

一・方、反応管1の上流端には、原料ボート4をバイパ
スしてガスを基板5の上流に供給するための第1のガス
導入管6aが接続されている。また、反応管1の上流端
には原料ボート4にガスを供給するための第2のガス導
入管6bと第3のガス導4 ?管6cが接続されている。
On the other hand, a first gas introduction pipe 6a is connected to the upstream end of the reaction tube 1 to bypass the raw material boat 4 and supply gas upstream of the substrate 5. Further, at the upstream end of the reaction tube 1, there is a second gas introduction pipe 6b for supplying gas to the raw material boat 4, and a third gas conduit 4? A pipe 6c is connected.

そして、ガス導入管6b,6cの管路途中にはそれぞれ
A s C n ,とPCQ:lの入ったバブラ8a,
8bが介装されている。ガス導入管6b,6cには−H
2ガスが導入され、バブラ8a,8b内へH2ガスを吹
き込むことによってA. s C Q ,とPGQ3と
の混合ガスをH2をキャリアとして反応管1内に供給で
きるようにIdされている。また、バブラ8 a ,’
8 bは温度制御可能な恒濡槽(図示省帖)に入れ、温
度を制御することによってAsC氾■,pcu3の蒸発
量を制御するようにしてある。
In the middle of the gas introduction pipes 6b and 6c, there are bubblers 8a containing A s C n and PCQ:l, respectively.
8b is interposed. -H in the gas introduction pipes 6b and 6c
A.2 gas is introduced, and by blowing H2 gas into the bubblers 8a and 8b, A.2 gas is introduced. Id is set so that a mixed gas of s C Q and PGQ3 can be supplied into the reaction tube 1 using H2 as a carrier. Also, bubbler 8 a,'
8b was placed in a temperature-controllable constant-wet tank (as shown), and by controlling the temperature, the amount of evaporation of AsC and pcu3 was controlled.

なお、7a,7b,7cは流量制御用のマスフローコン
トローラ、9は反応管1の下流端に接続された排気管で
ある。
Note that 7a, 7b, and 7c are mass flow controllers for controlling the flow rate, and 9 is an exhaust pipe connected to the downstream end of the reaction tube 1.

第2図に反応管上の温度分布を示す。電気炉2により原
料ボート部4の温度が870℃、GaAs i&板5の
湿度が790℃となるように<fil1 ’御する。
Figure 2 shows the temperature distribution on the reaction tube. The electric furnace 2 controls the temperature of the raw material boat section 4 to 870° C. and the humidity of the GaAs i & board 5 to 790° C. <fil1'.

上記装置を用いて、反応管1内に面方位が(100)面
から[○OI]方向に2゜偏位したGaAs基板をセッ
トしてから,マスフローコン1・ロ?ラ7b,7cでA
 s C Q ,とPCQ3のモル比PC Qa/ (
P C Q3+ A s C Q3)をOから0.38
まで徐々に変えて反応管1内に供給し、GaAS基板5
上に先ず3μmのGaAsバッファ暦を或長させた後、
50μmのG a A s P組成勾配層を形或し、そ
の上にG a A S u .6■Pa.a8の組成一
定層を50ILm成長させた。
Using the above apparatus, a GaAs substrate whose plane orientation is deviated by 2 degrees from the (100) plane in the [○OI] direction is set in the reaction tube 1, and then the mass flow controller 1 is placed in the mass flow controller 1. A at la 7b, 7c
The molar ratio of s C Q , and PCQ3 PC Qa/ (
P C Q3 + A s C Q3) from O to 0.38
GaAS substrate 5
After first lengthening a 3 μm GaAs buffer on top,
A 50 μm thick G a As P composition gradient layer was formed, and a G a S u . 6■Pa. A constant composition layer of a8 was grown to a thickness of 50 ILm.

第3図(a)には上記方法により得られたウェーハのエ
ビタキシャル成長層の表面の粗さを測定した結果を示す
。比較のため、同一の方法により基板表面の面方位が(
100)面から[0 1 I]方向に2゜傾いたG a
 A s基板上にG a A s Pエピタキシャル廣
を或長させた場合の表面粗さの測定結果を、第3図(b
)に示す。
FIG. 3(a) shows the results of measuring the surface roughness of the epitaxial growth layer of the wafer obtained by the above method. For comparison, the plane orientation of the substrate surface was determined by the same method (
100) Ga tilted 2 degrees in the [0 1 I] direction from the plane
Figure 3 (b) shows the measurement results of the surface roughness when the GaAsP epitaxial width is made to have a certain length on the As substrate.
).

第3図より、面方位が(100)面から[OO■]方向
へ傾いた基板を用いた場合には表面粗さは約30OA/
’200μmとなり、[OIIコ方向に傾いた基板を用
いた場合の90OA/200μmに比べ、表面粗さがか
なり小さくなることが分かる。
From Figure 3, when using a substrate whose plane orientation is tilted from the (100) plane to the [OO■] direction, the surface roughness is approximately 30OA/
It can be seen that the surface roughness is considerably smaller than 90OA/200μm when a substrate tilted in the OII direction is used.

さらに、基板表面の偏位の方向を( ]. O O )
面から[00■]±45゜の範囲で種々変えた基板を用
いてG a A s Pエピタキシャル層の成長を行な
ったものについて表面粗さをifll1定した結果を表
1に示す。
Furthermore, the direction of the deviation of the substrate surface is ( ]. O O )
Table 1 shows the results of determining the surface roughness as IFLL1 for G a As P epitaxial layers grown on substrates varying in angle from the surface within the range of [00■] ±45°.

上記表1より偏位の方向が[OOI]方向から±30″
以内であれば表面粗さを45OA/200μm(従来の
半分)以下に抑えることができる。
From Table 1 above, the direction of deviation is ±30″ from the [OOI] direction.
If it is within this range, the surface roughness can be suppressed to 45OA/200μm (half of the conventional level) or less.

なお、偏位の方向が[0 0 I]方向以外の場合にも
、それぞれ±30’の範囲内であれば同様の効果が得ら
れる。
Note that even when the direction of deviation is other than the [0 0 I] direction, the same effect can be obtained as long as it is within the range of ±30'.

また、この発明はGaAsP以外の3元系、4元系混晶
のエビタキシャル或長に利用できる。
Further, the present invention can be used for ebitaxial lengthening of ternary and quaternary mixed crystals other than GaAsP.

[発明の効果] 以上説明したようにこの発明は、化合物半導体〜7 基板上に基板結晶と格子定数の異なる混晶エピタキシャ
ル層を成長させる際に、基板表面の面方位を(100)
面から[00I]方向あるいは[01.0]方向;もし
くは結晶学的に(100’)面と等価な面から.(1.
00)面についての[OOI]方向、[0 1 0]方
向と等価な方向へ0、5〜10゜偏位した基板を用いる
ようにしたので、表面全体に亘って均一かつ緻密にエビ
タキシャル層が成長し、結晶欠陥が減少するとともに、
戊長層表面のクロスハッチが弱くなり、表面粗さが低減
されるようになるという効果がある。
[Effects of the Invention] As explained above, the present invention has the advantage that when growing a mixed crystal epitaxial layer having a different lattice constant from that of the substrate crystal on a compound semiconductor ~7 substrate, the plane orientation of the substrate surface is set to (100).
From the [00I] direction or [01.0] direction; or from a crystallographically equivalent plane to the (100') plane. (1.
Since we used a substrate that was deviated by 0.5 to 10 degrees in the [OOI] direction and the direction equivalent to the [0 1 0] direction with respect to the grows, crystal defects decrease, and
This has the effect of weakening the crosshatch on the surface of the oblong layer and reducing surface roughness.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る化合物半導体の気相エビタキシャ
ル成長方法に使用する気相成長装置の一例を示す縦断正
面図、 第2図はその反応管の温度分布を示すグラフ,第3図(
a)は本発明方法により得られたエビタキシャル成長層
の表面粗さの測定結果を示すグラフ、 第3図(b)は従来方法により得られたエビタ一8ー キシャル戒長層の表面粗さの測定結果を示すグラ、フで
ある。 1・・・・反応管、2・・・・電気炉、4・・・・原料
ボート、5・・・・基板。
Fig. 1 is a longitudinal sectional front view showing an example of a vapor phase growth apparatus used in the vapor phase epitaxial growth method of compound semiconductors according to the present invention, Fig. 2 is a graph showing the temperature distribution of the reaction tube, and Fig. 3 (
a) is a graph showing the measurement results of the surface roughness of the epitaxial growth layer obtained by the method of the present invention, and FIG. 3(b) is a graph showing the surface roughness of the epitaxial growth layer obtained by the conventional method. These are graphs showing measurement results. 1...Reaction tube, 2...Electric furnace, 4...Raw material boat, 5...Substrate.

Claims (2)

【特許請求の範囲】[Claims] (1)化合物半導体基板上に基板結晶と格子定数の異な
る混晶を気相成長させるにあたり、表面の面方位が(1
00)面から[00@1@]方向あるいは[010]方
向に0.5〜10°偏位した基板を用いることを特徴と
する化合物半導体の気相エピタキシャル成長方法。
(1) When vapor-phase growing a mixed crystal with a different lattice constant from the substrate crystal on a compound semiconductor substrate, the surface orientation is (1).
A method for vapor phase epitaxial growth of a compound semiconductor, characterized in that a substrate is deviated by 0.5 to 10 degrees in the [00@1@] direction or the [010] direction from the 00) plane.
(2)化合物半導体基板上に基板結晶と格子定数の異な
る混晶を気相成長させるにあたり、上記請求項1で指定
された各方向よりそれぞれ±30°の範囲であるいずれ
かの基板を用いることを特徴とする化合物半導体の気相
エピタキシャル成長方法。
(2) When vapor-phase growing a mixed crystal having a different lattice constant from that of the substrate crystal on a compound semiconductor substrate, use any substrate within a range of ±30° from each direction specified in claim 1 above. A method for vapor phase epitaxial growth of compound semiconductors, characterized by:
JP15102389A 1989-06-13 1989-06-13 Vapor-phase epitaxial growth of compound semiconductor Pending JPH0316993A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15102389A JPH0316993A (en) 1989-06-13 1989-06-13 Vapor-phase epitaxial growth of compound semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15102389A JPH0316993A (en) 1989-06-13 1989-06-13 Vapor-phase epitaxial growth of compound semiconductor

Publications (1)

Publication Number Publication Date
JPH0316993A true JPH0316993A (en) 1991-01-24

Family

ID=15509614

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15102389A Pending JPH0316993A (en) 1989-06-13 1989-06-13 Vapor-phase epitaxial growth of compound semiconductor

Country Status (1)

Country Link
JP (1) JPH0316993A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0701008A2 (en) 1994-09-08 1996-03-13 Sumitomo Electric Industries, Limited Epitaxy for growing compound semiconductors and an InP substrate for epitaxial growth
JP2001233698A (en) * 2000-02-23 2001-08-28 Mitsubishi Chemicals Corp Gallium phosphide-arsenide mixed crystal epitaxial wafer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0701008A2 (en) 1994-09-08 1996-03-13 Sumitomo Electric Industries, Limited Epitaxy for growing compound semiconductors and an InP substrate for epitaxial growth
US5647917A (en) * 1994-09-08 1997-07-15 Sumitomo Electric Industries, Ltd. Epitaxy for growing compound semiconductors and an InP substrate for epitaxial growth
JP2001233698A (en) * 2000-02-23 2001-08-28 Mitsubishi Chemicals Corp Gallium phosphide-arsenide mixed crystal epitaxial wafer

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