JPH03163897A - Circuit board device - Google Patents
Circuit board deviceInfo
- Publication number
- JPH03163897A JPH03163897A JP30369489A JP30369489A JPH03163897A JP H03163897 A JPH03163897 A JP H03163897A JP 30369489 A JP30369489 A JP 30369489A JP 30369489 A JP30369489 A JP 30369489A JP H03163897 A JPH03163897 A JP H03163897A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- conductive layer
- insulating layer
- board device
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000463 material Substances 0.000 claims description 5
- 239000003990 capacitor Substances 0.000 abstract description 11
- 239000000126 substance Substances 0.000 abstract description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 10
- 239000011889 copper foil Substances 0.000 description 10
- 239000003822 epoxy resin Substances 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000010422 painting Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
- H05K3/4676—Single layer compositions
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は電算機等デジタル回路の回路基板装置に関する
。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit board device for digital circuits such as computers.
[従来の技術]
従来のこの種回路基板装置は第2図に示すように、銅箔
による第1の信号回路を形或する第1の導電層11と、
銅箔による接地回路を形或する第2の導電層l3の一方
の面とがガラス基材エポキシ樹脂積層板等からなる第1
の絶縁層12を介して隣設し、銅箔による電源回路を形
戒する第3の導電層15の一方の面と、銅箔による第2
の信号回路を形或する第4の導電層17とがガラス基材
エポキシ樹脂積層板等からなる第2の絶縁層14を介し
て隣設し、前記第2の導電層l3の他方の面と前記第3
の導電層15の他方の面とをプリプレグと呼ばれる半硬
化状態のエボキシ樹脂をガラス布に含浸した第3の絶縁
層16を介して加熱、接合されている。ところで、前記
電源回路15には動作時においてしばしばノイズ威分が
混入、重畳して前記信号回路11,17に装着した集積
回路等の電気部品に障害を与えるという問題があり、こ
の対策として、前記電源回路l5と前記接地回路l3と
の間に介在してノイズを除去するためのコンデンサ18
を前記集積回路の近傍に挿入していた。しかし、この方
法は局部的な効果しか得られず、したがって、十分な効
果を得るためには多数のコンデンサを必要とするので、
コンデンサの費用等が増大する他、回路基板装置まで大
型化してしまうという問題があった。なお、20は前記
コンデンサ18の端子19を挿通するためのスルーホー
ル、21は前記第1の信号回路11と前記接地回路13
とを電気的に接続するためのパイアホール、22は同第
1の信号回路11と前記電源回路15とを電気的に接続
するためのパイアホール、23は同スルーホール20お
よび前記パイアホール21 22と周囲の電気回路とを
電気的に絶縁する絶縁空間である。[Prior Art] As shown in FIG. 2, a conventional circuit board device of this type includes a first conductive layer 11 forming a first signal circuit made of copper foil;
One surface of the second conductive layer l3 forming a grounding circuit made of copper foil and the first surface made of a glass-based epoxy resin laminate or the like.
One side of the third conductive layer 15 which forms a power supply circuit made of copper foil and a second side made of copper foil which is adjacent to each other with an insulating layer 12 in between.
A fourth conductive layer 17 forming a signal circuit is adjacent to the second insulating layer 14 made of a glass-based epoxy resin laminate or the like, and is adjacent to the other surface of the second conductive layer l3. Said third
The other surface of the conductive layer 15 is heated and bonded to the other surface of the conductive layer 15 through a third insulating layer 16 made of glass cloth impregnated with a semi-hardened epoxy resin called prepreg. By the way, there is a problem in that the power supply circuit 15 is often contaminated with noise during operation, and is superimposed, causing damage to electrical components such as integrated circuits installed in the signal circuits 11 and 17. A capacitor 18 interposed between the power supply circuit l5 and the ground circuit l3 to remove noise.
was inserted near the integrated circuit. However, this method only provides a local effect and therefore requires a large number of capacitors to obtain a sufficient effect.
In addition to increasing the cost of the capacitor, there are also problems in that the circuit board device also becomes larger. In addition, 20 is a through hole for inserting the terminal 19 of the capacitor 18, and 21 is the first signal circuit 11 and the ground circuit 13.
22 is a via hole for electrically connecting the first signal circuit 11 and the power supply circuit 15; 23 is the through hole 20 and the via holes 21 and 22; This is an insulating space that electrically isolates the surrounding electrical circuit.
本発明は上記従来の欠点を解決し、電源回路と接地回路
との間に挿入するノイズ除去用のコンデンサを必要とせ
ずに電源回路のノイズを除去することができる回路基板
装置を提供することを目的としている。The present invention solves the above conventional drawbacks and provides a circuit board device that can eliminate noise in a power supply circuit without requiring a noise elimination capacitor inserted between the power supply circuit and the ground circuit. The purpose is
上記課題を解決するために本発明では、第1の導電層の
一方の側に第1の絶縁層を介して第2の導電層を形成し
、同第1の導電層の他方の側に第2の絶縁層を介して第
3の導電層を形成してなる3
回路基板であって、前記第1の絶縁層を強誘電本前記第
1の導電層を接地回路、前記第2の導電層を電源回路と
した。In order to solve the above problems, in the present invention, a second conductive layer is formed on one side of the first conductive layer via the first insulating layer, and a second conductive layer is formed on the other side of the first conductive layer. 3. A circuit board formed by forming a third conductive layer through an insulating layer of 2, wherein the first insulating layer is a ferroelectric layer, the first conductive layer is a ground circuit, and the second conductive layer is a ground circuit. was used as the power supply circuit.
〔作用]
上記構戒によれば、接地回路を形或する第1の導電層と
、電源回路を形或する第2の導電層との間に介在する第
1の絶縁層は強誘電体により形成され、電源回路と接地
回路の間には分布定数的にコンデンサを挿入した状態に
なり、回路基板装置の前面にわたって電源回路に重畳し
たノイズを除去して信号回路への障害を防止する。[Operation] According to the above structure, the first insulating layer interposed between the first conductive layer forming the ground circuit and the second conductive layer forming the power supply circuit is made of a ferroelectric material. A capacitor is inserted between the power supply circuit and the ground circuit in a distributed constant manner, and noise superimposed on the power supply circuit across the front surface of the circuit board device is removed to prevent damage to the signal circuit.
以下、本発明の一実施例を図面を参照しながら説明する
。An embodiment of the present invention will be described below with reference to the drawings.
第1図は本発明の回路基板装置の要部の断面を示し、1
は第1の導電層で、銅箔等により接地回路が形成されて
いる。2は同第1の導電層lの一端側に設けた第1の絶
縁層で、チタン酸バリウム等の強誘電体を主原料とし、
これに熱硬化型の接着材等が混合されている。3は同第
1の絶縁層2一 4
を介して同第1の導電層1の一端側に設けられた第2の
導電層で、銅箔等により電源回路が形成されている。4
は同第1の導電層1の他端側に形成された第2の絶縁層
で、ガラス基材エポキシ樹脂積層板等からなっている。FIG. 1 shows a cross section of the main part of the circuit board device of the present invention, 1
is a first conductive layer, and a ground circuit is formed of copper foil or the like. 2 is a first insulating layer provided on one end side of the first conductive layer l, which is mainly made of a ferroelectric material such as barium titanate;
This is mixed with a thermosetting adhesive. 3 is a second conductive layer provided on one end side of the first conductive layer 1 via the first insulating layer 2-4, and a power supply circuit is formed of copper foil or the like. 4
is a second insulating layer formed on the other end side of the first conductive layer 1, and is made of a glass-based epoxy resin laminate or the like.
5は同第2の絶縁層4を介して同第1の導電層1の他端
側に設けられた第3の導電層で、銅箔等により第1の信
号回路等が形成されている。6は第3の絶縁層7を介し
て第2の導電層3に隣設する第4の導電層で、銅箔等に
より第2の信号回路等が形成されている。なお、前記第
3の絶縁層7は前述した第2の絶縁層4と同一の材料に
て形歳されている。8は前記第1の導電層lと前記第3
の導電層5等、任意の複数の導電層の相互を電気的にに
接続する複数のパイアホール、9は電気部品の端子を挿
通するための複数のスルーホール、10は同スルーホー
ル9および前記パイアホール8と周囲の電気回路とを電
気的に絶縁する絶縁空間である。以上のような構或にお
いて、次にその製造工程の一例を説明すると、先ず、第
2の絶縁層4の両面に予め銅箔を接5
着し、この銅箔をエッチングして前述の接地回路1と第
1の信号回路5とをそれぞれ形成する。また、第3の絶
縁層70両面にも同様にして電源回路3と第2の信号回
路6とを形成する。しかる後、前記接地回路1または電
源回路3の表面に前述した第1の絶縁層2を塗装等によ
り形成し、乾燥後、この第1の絶縁層2を介して前記接
地回路1と電源回路3とを貼り合わせ、全体を加圧しな
がら加熱して第1の絶縁層1を硬化させる。その後、パ
イアホール8およびスルーホール9用の孔を所定の位置
にそれぞれ設け、さらに、この孔に化学メッキ等を施し
て製造工程を完了する。そして、この実施例によると、
例えば、20cm四方の回路基板装置において、第1の
絶縁層2を誘電率10,000の誘電体にて厚さ0.3
mmに形成した場合、第1の導電層1と第2の導電層3
との間には約12μFの静電容量を得ることができる。Reference numeral 5 denotes a third conductive layer provided on the other end side of the first conductive layer 1 via the second insulating layer 4, on which a first signal circuit and the like are formed of copper foil or the like. Reference numeral 6 denotes a fourth conductive layer adjacent to the second conductive layer 3 via a third insulating layer 7, on which a second signal circuit and the like are formed of copper foil or the like. Note that the third insulating layer 7 is made of the same material as the second insulating layer 4 described above. 8 is the first conductive layer l and the third conductive layer l.
a plurality of via holes for electrically connecting conductive layers such as the conductive layer 5, 9 a plurality of through holes for inserting terminals of electrical components, 10 a through hole 9 and the This is an insulating space that electrically insulates the pie hole 8 from the surrounding electric circuit. Next, an example of the manufacturing process for the above-described structure will be explained. First, copper foil is bonded to both sides of the second insulating layer 4 in advance, and this copper foil is etched to form the above-mentioned ground circuit. 1 and a first signal circuit 5 are respectively formed. Further, the power supply circuit 3 and the second signal circuit 6 are similarly formed on both surfaces of the third insulating layer 70. Thereafter, the first insulating layer 2 described above is formed on the surface of the grounding circuit 1 or the power supply circuit 3 by painting or the like, and after drying, the grounding circuit 1 and the power supply circuit 3 are formed through the first insulating layer 2. are bonded together, and the first insulating layer 1 is cured by heating while applying pressure to the whole. Thereafter, holes for the pire holes 8 and through holes 9 are provided at predetermined positions, and chemical plating or the like is applied to these holes to complete the manufacturing process. And according to this example,
For example, in a 20 cm square circuit board device, the first insulating layer 2 is made of a dielectric material with a dielectric constant of 10,000 and has a thickness of 0.3 cm.
mm, the first conductive layer 1 and the second conductive layer 3
A capacitance of about 12 μF can be obtained between the two.
以上のように本発明によれば、接地回路を形成する第1
の導電層と、電源回路を形或する第2の6
導電層とを介在する第1の絶縁層を強誘電体により形成
したので、電源回路と接地回路の間には分布定数的にコ
ンデンサを挿入した状態になり、回路基板装置の前面に
わたって電源回路に重畳したノイズを除去して信号回路
への障害を防止することができるので、このノイズを除
去するための多数のコンデンサが不要になり、回路基板
装置の小型化が可能になると共に、機器の信頼性を向上
させることができる。As described above, according to the present invention, the first
Since the first insulating layer between the conductive layer and the second conductive layer forming the power supply circuit is formed of a ferroelectric material, a capacitor is disposed between the power supply circuit and the ground circuit in a distributed manner. When inserted, the noise superimposed on the power supply circuit across the front of the circuit board device can be removed to prevent damage to the signal circuit, eliminating the need for multiple capacitors to remove this noise. It is possible to downsize the circuit board device and improve the reliability of the device.
第1図は本発明の回路基板装置の概要を説明するための
一部省略側断面図、第2図は従来例の一部省略側断面図
である。
■・・・第1の導電層、2・・・第1の絶縁層、3・・
・第2の導電層、4・・・第2の絶縁層、5・・・第3
の導電層。FIG. 1 is a partially omitted side sectional view for explaining the outline of the circuit board device of the present invention, and FIG. 2 is a partially omitted side sectional view of a conventional example. ■...First conductive layer, 2...First insulating layer, 3...
・Second conductive layer, 4... second insulating layer, 5... third
conductive layer.
Claims (2)
第2の導電層を形成し、同第1の導電層の他方の側に第
2の絶縁層を介して第3の導電層を形成してなる回路基
板であって、前記第1の絶縁層が強誘電体であることを
特徴とする回路基板装置。(1) A second conductive layer is formed on one side of the first conductive layer with a first insulating layer interposed therebetween, and a second conductive layer is formed on the other side of the first conductive layer with a second insulating layer interposed therebetween. 1. A circuit board device comprising a third conductive layer, the first insulating layer being a ferroelectric material.
が電源回路から成る請求項(1)記載の回路基板装置。(2) The circuit board device according to claim (1), wherein the first conductive layer comprises a ground circuit, and the second conductive layer comprises a power supply circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30369489A JPH03163897A (en) | 1989-11-22 | 1989-11-22 | Circuit board device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30369489A JPH03163897A (en) | 1989-11-22 | 1989-11-22 | Circuit board device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03163897A true JPH03163897A (en) | 1991-07-15 |
Family
ID=17924118
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP30369489A Pending JPH03163897A (en) | 1989-11-22 | 1989-11-22 | Circuit board device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03163897A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101595113B1 (en) * | 2015-09-30 | 2016-02-17 | (주)에어바이블 | Operated safety induction robot using the air sculptures |
-
1989
- 1989-11-22 JP JP30369489A patent/JPH03163897A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101595113B1 (en) * | 2015-09-30 | 2016-02-17 | (주)에어바이블 | Operated safety induction robot using the air sculptures |
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