JPH03160816A - Selector circuit - Google Patents

Abstract

PURPOSE:To prevent oscillation and to reduce crosstalk by inserting a FET in series with the output of an input emitter follower respectively, and controlling the gate voltage of the FET to damp the frequency characteristic of a selector circuit. CONSTITUTION:When a control signal v3 is brought into an L level, TRs Q3, Q7 are turned on and TRs Q4, Q5 are turned off, a TRQ1, R1, D1 are active and Q2, R2, D2 are cut off and only a signal relating to a signal source v1 appears at the output terminal 3. When the signal v3 is conversely brought into an H level, the TRs Q3, Q7 are turned on and the TRs Q4, Q8 are turned off, the TRQ1, R1, D1 are cut off and the Q2, R2, D2 are turned on and only a signal relating to a signal source v2 appears at the output terminal 3. Through the constitution above, the output signal of the selected TR Q1 or Q2 passes with pinch resistors R1, R2 inserted to the output of the emitter follower TRs Q1, Q2 and the sharpness Q is damped. Thus, the peaking of the frequency characteristic of the emitter follower is damped, the oscillation is prevented and the crosstalk is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a selector circuit, such as a multi-director, which selects and outputs a certain signal from among a large number of input signals.

[Conventional technology]

Figure 3 shows an example of a conventional selector circuit of this type. In the figure, 1 is input terminal A, 2 is input terminal B, 3 is output terminal, 4 is a voltage control section, Q+Q2 is an input emitter follower, Q3 a Q4 The differential transistor for the select switch, the diode for the D2 select switch, and the diode for the select switch are constant current circuits.

This circuit is an example of two signal inputs and one signal output type, and the voltage control section 4 controls the differential transistor Q.
When adjusting the pace voltage of step 3 and switching Qs to the on state,
A current flows through Q3, turning on the input emitter follower Q1, and the signal to the input terminal A is improved by the diode D and output to the output terminal 3.

On the other hand, Q2 #Q4,p, is kept at 11, which is an off state, and the signal for input terminal B does not appear at the output.

[Problem to be solved by the invention]

The conventional selector circuit as described above has four problems in that oscillation is likely to occur due to the output capacitive load due to the Emi-Tahorov frequency peaking characteristic.

The present invention was made in order to solve the above-mentioned problems, and it is an object of the present invention to completely dampen the frequency characteristics of a selector circuit and to reduce crosstalk (mutual interference).

[Means to solve the problem]

In the selector circuit of the present invention, a FET k is inserted in series on the output side of each input emitter follower, and a selector control voltage gold is applied to the gates of several FETs connected in series on the output side of the selected input emitter follower to turn on the FET. There is a gate voltage control circuit 'rFU for each FETQ unit so that it can be switched.

[Effect]

With this configuration, only the on-resistance component exists between the drain and source of the FET inserted in series on the output side of the selected input emitter follower, allowing the signal to pass, and this on-resistance changes the emitter follower output impedance. It plays the role of Q dump.

On the other hand, a high impedance is maintained between the drain and source of the FET inserted in series on the output side of the unselected input emitter port, so that the output is disconnected.

〔Example〕

FIG. 1 shows the basic circuit configuration of the present invention, with z, 2, 3, 4
,Q+ #Q2 11Q3 JQ4 jDI
, I) 2r and r2 indicate the same reference numerals and the same -1 tap in Fig. 3, and Q5 and Q6 are FETs inserted in series on the output side of the incoming emitter followers Q+ and Qz, respectively.
．． Q y and Q s are differential trunk transistors for switches connected in parallel to differential transistors Q3 and Q4 for select switches, respectively.

FIG. 2 shows an embodiment of the invention. Q9 is output NPN
}Rannostar, QIo is input PNP }Rannostar Rt
#R2 is shown in FIG. 1, respectively. 5 Pinch resistance corresponding to the resistance between the drain and source of #Q6, R3, R4
r R5 , R6 , R7 are resistors, V1. V2 is a constant voltage source, Vl and V2 are a signal source, and v3 is a control signal.

When the control signal v3 is set to Low, QIQ7 is turned on, Q4-Ql1 is turned off, and Ql a R
l , D1 is active, Q2 a R2 a D
z is in the cutoff 7 state, and the signal source 11 is connected to the output terminal 3.
Only the signal corresponding to the signal will appear.

Conversely, when the control signal 'v3 is set to High,
Q3-Q7 are in on state, Q4 #Ql1 is in on state, Q2 #R21D2 is in active state, Qt a Rl
HD! is in a cutoff state, and only the signal for the signal source v2 appears at the output terminal 3.

The output impedance of the emitter hollow has a frequency characteristic with a zero point. This can be alleviated by inserting a resistor in series, but in the present invention, FETQ5. The on-resistance component of Q6 (approximately 200Ω) plays this role.

When the FET QsaQ6 is in the cutoff state, the drain-source impedance is several MΩ. Therefore, the influence between mutual signals is approximately equalized.

Although the above description has been made using an example of two signal inputs and one signal output type, the same can be said of a multi-signal input and one signal output type.

The present invention can also be easily implemented using a bipolar IC, and in this case, the FET may be a J-FET.

Among them, as an application example, there is a high frequency switch IC such as a video switch.

〔Effect of the invention〕

As described above, according to the present invention, the beaking of the frequency characteristics of the emitter follower increases, making it less likely to cause oscillation, reducing crosstalk, and increasing isolation between signals.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a basic circuit configuration of the present invention, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a circuit diagram showing an example of a conventional selector circuit of this type. l...Input terminal A, 2...Input terminal B, 3...Output terminal, 4...Voltage control section, D,, D2...
・Tiode, Q, . Qt...input emitter follower,
Qs+Q6...FET, Qm. Q4, Qt
, Qs...differential transnostar, Q,...output NPN
}Rannosta, Q. ...Input PNP }Transistor, R,,R, ...Pinch resistor, R3 + R4
pRS + R6 + R? ”'Resistance, V,,V
,...constant voltage source, v1+v! ...signal source, ■,...
・Control signals The same reference numerals in the figures indicate the same -1 or the equivalent.

Claims (1)

[Scope of Claims] In a selector circuit configured to select one input emitter follower from a plurality of input emitter followers using a differential transistor for a select switch, and output the output of the input emitter follower via a level-up diode, each input emitter follower FETs in series on the output side of each
A gate voltage control circuit was provided for the gate of each FET so that a selector control voltage could be applied to the gate of the FET inserted in series on the output side of the selected input emitter follower to turn on the FET. A selector circuit characterized by: