JPH03158981A - Pattern recognition device - Google Patents

Abstract

PURPOSE:To speed up pattern recognition processing by outputting collation data while synchronizing it with timing corresponding to the scanning of a picture element, and comparing a picture element signal and the collation data with each other, and judging that a pattern to be inspected coincides with the collation data when the picture element signal and the collation data coincide with each other at a ratio higher than the ratio set beforehand. CONSTITUTION:A data generating means 1 outputs each collation data corresponding to each picture element successively in synchronizing with the timing for an image pickup device 2 to read out the picture signal dot-sequentially. A comparison circuit 3 compares the picture signal with the collation data successively in synchronizing with the timing, and generates the data CPM(i,j) of a compared result. Then, a judging circuit 4 judges whether an object to be inspected coincides with the collation data MS(i,j) or not from the data CPM(i,j), and outputs a judging signal S0. As for the means to decide, for instance, when the number of the data (or integrated value) to show discordance exceeds a threshold set beforehand, both are judged not to coincide with each other. Thus, the pattern recognition processing can be executed at a real time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pattern recognition device that recognizes a pattern to be inspected using a comparison and matching method.

[Conventional technology]

Such pattern recognition equipment can be used to streamline manufacturing lines by unmanned inspection of ICs mounted on printed circuit boards, inspection of IC masks and wafers, and inspection of various other industrial products. It is used.

Such a conventional pattern recognition device stores in advance a group of verification data corresponding to a known pattern of an object to be inspected in a ROM or the like corresponding to a pixel arrangement, and images the object to be inspected with an imaging device. Pixel data for each pixel in RAM
etc., and then read each data from the ROM and RAM in a manner corresponding to the pixel array at a predetermined access timing, compare and collate the data, and check if the total number of matches of all data exceeds a predetermined value. The test is deemed to have passed if the test is completed.

[Problem to be solved by the invention]

However, in such a conventional pattern recognition device, the pixel data is once captured by an imaging device and then processed by RA.
Since the image data is stored in a memory such as M, and is compared and collated with reference data previously stored in a ROM or the like according to an instruction program of a computer system, the processing speed is relatively slow. In addition, since inspection items are frequently changed on factory inspection lines, etc.
There is a problem in that operations such as changing the writing of reference data to the ROM or the like and replacing the ROM itself are complicated.

The present invention has been made in view of such problems,
It is an object of the present invention to provide a pattern recognition device that speeds up pattern recognition processing and allows extremely easy modification of reference data.

[Means to solve the problem]

In order to achieve such an object, the present invention first targets a pattern recognition device that recognizes a pattern to be inspected by a comparison and matching method.
An imaging device that images the pattern to be inspected and scans and outputs pixel signals corresponding to appropriate pixels in synchronization with a predetermined timing, and outputs preset verification data in synchronization with the timing corresponding to the scanning of the pixels. A data generating means that compares the Hokki pixel signal and the matching data, and when they match at a preset ratio or higher, the inspected pattern matches the matching data, and when the ratio is less than the ratio, the inspected pattern and the matching data match. A means of comparison and judgment is provided to determine if there is a discrepancy.

Further, the present invention will be explained in detail based on FIGS. 1 and 2. First, the principle configuration will be explained based on Fig. 1.
1 is a data generation means for outputting video pattern data for a known object to be inspected as pixel data MS(i, j) for each pixel (where i, j indicate a pixel arrangement); 2 is a device to be inspected; This is an imaging device that images an object.The imaging device 2 uses a charge-coupled solid-state imaging device, an MO3-type solid-state imaging device, etc., and scans the optical image of the object to be inspected point-by-point in the rask direction, thereby capturing images of each pixel. Pixel signal BD
Read as (i, j). Then, the data generating means 1 sequentially outputs each collation data corresponding to each pixel in synchronization with the timing at which the imaging device 2 reads out pixel signals point-sequentially.

Reference numeral 3 denotes a comparison circuit, which successively compares the pixel signals described in 2 and the collation data in synchronization with the readout timing of the imaging device 2, and compares the comparison result data C.
Generate M P (i, j).

Reference numeral 4 denotes a judgment circuit, which judges from the data CMP (i, j) whether or not the object to be inspected matches the collation data M S (i, j), and outputs a judgment signal S. Output. As a means of determination, for example, it is determined that there is a mismatch when the number of data indicating mismatch (or integral value) out of all the data of CM P (i, j) exceeds a preset darkness value. Conversely, if the number of data indicating mismatch (or integral value) is less than or equal to the dark value, it is determined that there is a match.

Therefore, as shown in FIG. 2, in synchronization with the clock CK of a predetermined period, the collation data M S (i, j) output from the data generating means 1 and the pixel signal BD ( For example, if the pixel signals BD(i, j) at time t are missing or do not match, then the data CM P (
i, j) are ■, °” level, when they match, CM P
(i, j) becomes "H" level, and it is determined whether or not there is a match based on all such data CM P (i, j). Note that rl, fz, f:lf, in FIG. 2 each indicate one horizontal scanning period in the imaging device 2, and the number of horizontal scanning and the point sequential scanning period of each horizontal scanning period are set as appropriate. You may.

Alternatively, the pattern may be recognized by comparing the consistency between the collation data and the pixel signal for each horizontal scanning period, and finally determining the consistency for all the horizontal scanning periods.

The data generating means 1 may store the collation data in a ROM etc. in advance, or may use a programmable logic device (Programmable Logic Device).
The verification data may be generated in synchronization with the point-sequential scanning timing of the imaging device 2 by applying the internal so-called lattice points and programming the internal grid points appropriately.

Furthermore, the comparing means 3 and the determining means 4 may be constructed of random logic, or may be processed by a control program such as a microprocessor.

[Effect]

According to the present invention having such a configuration, since the output from the imaging device is processed in real time, pattern recognition can be performed at extremely high speed.

In particular, when the above-mentioned programmable logic device is applied, high-speed processing equivalent to when configured with random logic is possible, so pattern recognition can be performed at an extremely high speed compared to when the data generation means is realized using ROM etc. More specifically, since the collation data can be generated at a speed almost comparable to the readout scanning speed of the imaging device, high-speed processing is possible.

〔Example〕

An embodiment of the pattern recognition device according to the present invention will be described below with reference to the drawings. First, the overall configuration will be explained based on Fig. 3. In the figure, 5 is a central control circuit realized by a programmable logic device, and by appropriately programming the so-called lattice points inside, it is possible to control the control circuit in advance. An internal circuit is formed that generates verification data corresponding to the pattern of the detected object in synchronization with a predetermined clock frequency. Further, a circuit for generating a drive signal φ to be supplied to the imaging device 6, a circuit for forming various synchronizing signals for controlling the operation of the entire system, etc. are realized by the above program.

The imaging device 6 uses a charge-coupled solid-state imaging device or an MO3 solid-state imaging device, receives the pattern of the object to be inspected 8 through an optical system 7 placed in front of the light-receiving area, and scans pixels point-by-point. The pixel signal BD(i, D) is output for each pixel in synchronization with the drive signal φ for the pixel.

9 is a sample hold circuit that samples the pixel signal BD (IIJ) output from the imaging device 6 in synchronization with the sampling signal SA from the AND gate 10; A sampling signal SA is formed by ANDing the clock signal SH and the verification data MS (i, D).

11 is a waveform shaping circuit, which converts the signal from the sample hold circuit 9 to "H" based on the dark value set internally.
” and “L” level binary logic data.

12 is an inverter circuit that inverts the verification data M S (i, j); 13 is a waveform shaping circuit 11 and an inverter circuit 1;
This is an Exclusive-OR gate that performs an exclusive OR operation on data from 2.

Reference numeral 14 denotes a judgment circuit which detects the number of "H" level data output from the exclusive OR gate 13 during a predetermined period, and when the number is higher than the dark value set internally, the judgment circuit determines the predetermined value. A judgment output S0 indicating that the detected object is recognized is output.

Note that the signal CK in the figure is a system clock signal for operating the entire system in synchronization with a predetermined cycle. The matching data M S (+ l J) is matching data corresponding to a previously known pattern of the detected object, and the codes i and j are outputted corresponding to the pixel array (i row, j column) of the imaging device 6. The output timing is synchronized with the sequential output of the pixel signals M S (i, j) according to the drive signal φ. In addition, the sampling clock signal SH also includes the verification data M S (i, j) and the pixel signal M S (
It is a binary logic signal that repeats inversion in synchronization with the output timing of i, j).

Next, the operation of this embodiment will be explained.

For example, when recognizing an "F" pattern as shown in FIG. B
Verification data M S (i, j) is output from the central control circuit 5 in synchronization with output of D (i, j).

Furthermore, in synchronization with this output timing, AND gate l
O performs an AND operation on the verification data MS (i, j) and the sampling clock SH, and obtains the verification data MS (i,
The sampling signal SA which becomes the "■]" level is output only when the signal j) becomes the "Ho" level, and the pixel signal BD (IIJ) is sampled in synchronization with this sampling signal SA. Therefore, in the sample and hold circuit 9, as a result, the verification data MS(i, j)
AND pixel signal BD (i, j) is processed. Furthermore, the output of the sample and hold circuit 9 is shaped into binary logical data by a waveform shaping circuit 11.

Then, the exclusive OR gate 13 performs exclusive OR operation processing on the data output from the circuits 11 and 12, and all collation data M S (i, j) and the pixel signal B D (
i, j) completely match, the output S becomes "H'" level during the entire horizontal scanning period, and the judgment circuit 1
Step 4: A judgment output S0 indicating that the predetermined pattern "F" has been recognized is output. Also, in synchronization with the clock CK, the circuit I
If there is a case where the data output from I and 12 do not match, at that point the output S changes from °°H'" to "L.
”, and the judgment circuit 14 outputs all pixel signals BD(i,j)
When the number of times that °'L"' occurs exceeds a predetermined threshold value, a judgment output S indicating that there is a mismatch is output.

The above operation is shown in the timing chart shown in FIG. Incidentally, the period ff z ”-'-' in FIG.
-" Each of fA corresponds to one horizontal scanning period, and the number of clocks CK in each horizontal scanning period is shown as an example.

Other patterns such as those shown in FIG. 4(b), <(), and (d) can also be recognized by similar processing. Furthermore, as shown in FIG. 5, patterns consisting of a plurality of characters can also be recognized collectively.

According to this embodiment, for scanning readout of the imaging device 6,
By using a programmable logic device, pattern recognition processing can be performed in real time, significantly reducing processing time compared to conventional methods. It is effective for achieving this goal.

In this embodiment, as a typical example, all pixel signals sequentially scanned from all pixels of the imaging device 6 are compared with the collation data, but as shown in FIG. Parts with salience (for example, X in Figure 7)
Verification data M S (i, j) regarding only the marked part)
You can compare and judge.

Furthermore, the present invention may be applied to 1 2 when images of a plurality of patterns are captured simultaneously. In such a case, the configurations of the central control circuit 5, the determination circuit 14, etc. can be simplified.

〔Effect of the invention〕

As described above, according to the present invention, there is provided an imaging device that captures an image of a pattern to be inspected and scans and reads out pixel signals corresponding to appropriate pixels in synchronization with a predetermined timing; Compares the pixel signal and the verification data with a data generating means that outputs the data in synchronization with the timing corresponding to the scanning of the pixels, and determines that the pattern to be inspected matches the verification data when they match by a preset ratio or more. Pattern recognition is performed using a comparison/judgment means that determines that there is a mismatch between the inspected pattern and the matching data when the ratio is less than the ratio, so when the pattern of the object to be measured is imaged, pattern recognition processing can be performed in real time. .

[Brief explanation of the drawing]

Fig. 1 is a detailed explanatory diagram of the present invention, Fig. 2 is a principle explanatory diagram explaining the processing method of the present invention, and Fig. 3 is a detailed explanatory diagram of the present invention.
4 and 5 are explanatory diagrams illustrating the processing operation of the embodiment. FIG. 6 is a timing chart illustrating the processing operation of the embodiment. FIG. 7 is a diagram illustrating the processing operation of the embodiment. It is an explanatory diagram explaining a processing method of an example. Symbols in the figure: I; Data generating means 2; Imaging device 3; Comparing means 4; Judging means 5; Central control circuit 6; Imaging device 7; Optical system 8; Test object 9; Sample and hold circuit 10iAND gate 11; Waveform Shaping circuit 3 4 12; Inverter circuit 3; Exclusive OR gate 4; Judgment circuit

Claims (2)

[Claims] (1) A pattern recognition device that recognizes a pattern to be inspected includes an imaging device that images the pattern to be inspected and scans and reads out pixel signals corresponding to appropriate pixels in synchronization with a predetermined timing, and preset matching data. a data generating means that outputs the pixel signal in synchronization with a timing corresponding to the scanning of the pixel; and a data generating means that compares the pixel signal and the verification data, and when the pixel signal and the verification data match by a preset ratio or more, the pattern to be inspected matches the verification data. , a pattern recognition device comprising a comparison/judgment means for determining that a pattern to be inspected and matching data do not match when the ratio is less than the ratio. (2) The pattern recognition apparatus according to claim 1, wherein the data generation means is comprised of a programmable logic device.