JPH031577A - Photoelectric converter - Google Patents

Photoelectric converter

Info

Publication number
JPH031577A
JPH031577A JP2092739A JP9273990A JPH031577A JP H031577 A JPH031577 A JP H031577A JP 2092739 A JP2092739 A JP 2092739A JP 9273990 A JP9273990 A JP 9273990A JP H031577 A JPH031577 A JP H031577A
Authority
JP
Japan
Prior art keywords
electrode
semiconductor layer
substrate
semiconductor
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2092739A
Other languages
Japanese (ja)
Inventor
Shunpei Yamazaki
舜平 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2092739A priority Critical patent/JPH031577A/en
Publication of JPH031577A publication Critical patent/JPH031577A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Landscapes

  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To facilitate manufacture and to enhance its efficiency by composing transparent electrodes in part or all of first and second electrodes on the face of a semiconductor layer of the side to be irradiated with a light, and providing the layer and the first or second electrode with an end of schematically the same shape on a substrate. CONSTITUTION:A conductive electrode 2 is selectively formed on an insulating board 1, and its upper face is coated with a semiconductor layer 3 and a second electrode material 4 made of a transparent conductive electrode. The semiconduc tor layer is so manufactured as to generate photovoltaic power by irradiating a PN junction, a PIN junction, etc., with a light. Thereafter, a semiconductor layer 12 and a transparent conductive electrode 11 of unnecessary parts are removed with the same mask by etching. Thus, the layers 12, 12' are etched schematically in the same shape as those of the patterns 11, 11' of the transpar ent electrodes. That is, with the transparent electrode as a mask the semiconduc tor layer is etched, and a trapezoidal shape and its side periphery are taper etched. As a result, the shape of a lead to a bus line of a substrate does not allow possible disconnection along the side periphery of the semiconductor layer by the first electrode, thereby enhancing its reliability.

Description

【発明の詳細な説明】 本発明は柔らかいまたは固い絶縁基板上に第1の電極と
、その上の光起電力を発生する水素またはハロゲン元素
が添加された非単結晶半導体と、その上の第2の電極と
を有する半導体装置において、一方の電極の一部または
全部を構成する透明電極と、この電極に密接した半導体
とが概略同一形状を有する光電変換装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention comprises a first electrode on a soft or hard insulating substrate, a non-single crystal semiconductor doped with hydrogen or a halogen element that generates photovoltaic force, and a first electrode on the first electrode. The present invention relates to a photoelectric conversion device in which a transparent electrode constituting part or all of one electrode and a semiconductor in close contact with the electrode have approximately the same shape in a semiconductor device having two electrodes.

本発明は絶縁基板上に複数の光起電力を発生する半導体
装置を設け、その一方の透明電極をマスクとしてその下
側の半導体を選択的に除去する、または半導体をマスク
として透明電極を選択的に除去することにより透明電極
と半導体とをその一部の端部において概略同一形状に形
成する光電変換装置の作製方法に関する。
The present invention provides a semiconductor device that generates a plurality of photovoltaic forces on an insulating substrate, and uses one of the transparent electrodes as a mask to selectively remove the semiconductor below it, or uses the semiconductor as a mask to selectively remove the transparent electrode. The present invention relates to a method for manufacturing a photoelectric conversion device in which a transparent electrode and a semiconductor are formed into substantially the same shape at some end portions by removing the transparent electrode and the semiconductor.

本発明は逆流防止用ダイオードを構成する半導体および
光起電力を発生する半導体の側周辺での逆方向リークを
少な(するため、側周辺を台形のテーパ状またはベベル
状にしたこと、およびかかる構造にするため半導体層の
プラズマエッチ工程において一方の電極を上下、左右、
前後に振動させながらエツチングをさせることを特徴と
している。
In order to reduce reverse leakage around the side of the semiconductor constituting the backflow prevention diode and the semiconductor that generates photovoltaic force, the present invention has a trapezoidal tapered or beveled shape around the side, and such a structure. During the plasma etching process of the semiconductor layer, one electrode is placed vertically, horizontally,
It is characterized by etching while vibrating back and forth.

即ち、光電変換装置をより安価でありかつ高信転性のシ
ステムとして構成させるには、(1)第1および第2の
電極、 (2)光起電力を発生させる半導体層、(3)装置の機
械的な設置のための担体または基牟反、 (4)外部と電気的に連結するための端子、(5)端子
の基板への種々の機械的密着性、(6)2つの電極の一
方が光透過性であること、(7)第1、第2の電極およ
び半導体層が機械的な歪に対して保障されること、 (8)半導体層が高効率の光電変換効率を有すること、 が必要である。
That is, in order to configure a photoelectric conversion device as a system that is less expensive and has high reliability, it is necessary to provide (1) first and second electrodes, (2) a semiconductor layer that generates photovoltaic force, and (3) the device. (4) Terminals for electrical connection with the outside, (5) Various mechanical adhesion properties of the terminals to the substrate, (6) (7) The first and second electrodes and the semiconductor layer are guaranteed against mechanical strain; (8) The semiconductor layer has high photoelectric conversion efficiency. , is necessary.

加えて、光電変換装置として、 (9)半導体層の製造価格が安価であること、(10)
半導体層を用いた変換装置が製作しやすく構造が単純で
あること、 (11)半導体層に比べてこの付属設備が高価にならな
いこと、 (12)変換装置の取扱が容易であること、(13)長
期の信頼性が高いこと、 が重要である。
In addition, as a photoelectric conversion device, (9) the manufacturing cost of the semiconductor layer is low; (10)
A conversion device using a semiconductor layer is easy to manufacture and has a simple structure; (11) this accessory equipment is not expensive compared to a semiconductor layer; (12) the conversion device is easy to handle; (13) ) High long-term reliability is important.

しかしこれまでの光電変換装置は光起電力を発生させる
半導体自体が高価であることもあって、その付属設備を
含めたシステムとしての思考がまったくなされていなか
った。
However, in the case of conventional photoelectric conversion devices, the semiconductors that generate photovoltaic power themselves are expensive, and therefore no consideration has been given to the device as a system that includes its auxiliary equipment.

本発明はかかる種々の要件を満たすため、透明電極と薄
膜状の水素またはハロゲン元素が添加された非単結晶半
導体とを概略同一形状を有せしめ、その製造のしやすさ
、高効率化を追求したものである。
In order to meet these various requirements, the present invention aims to make a transparent electrode and a thin film of a non-single crystal semiconductor doped with hydrogen or halogen elements have approximately the same shape, and to pursue ease of manufacturing and high efficiency. This is what I did.

従来、例えば現在のCZ(チョクラルスキー)スライス
を用いた太陽電池を作製せんとするとl0KW/年であ
り、シリコン原料が8000トン/年を仮定した時、1
阿あたり4160円かかってしまう。しかもその内訳は
光起電力を発生させるセル部にて74%即ち3070円
のコストがあがる。さらにその他モジュール化する設備
等は1090円(26%)がかかる。
Conventionally, for example, if you try to make a solar cell using the current CZ (Czochralski) slice, it costs 10KW/year, and assuming that the silicon raw material is 8000 tons/year, it costs 1KW/year.
It costs 4,160 yen per person. Moreover, the cost increases by 74%, or 3,070 yen, in the cell section that generates photovoltaic force. Furthermore, other modular equipment costs 1,090 yen (26%).

しかしこの価格を4160円/讐よりその1 /100
の40円/−とするには多くの困難がある。例えばセル
部に用いられるウェハは機械強度を存する基板としての
正確を有している。そのためセル部を半導体で作らんと
した時、単にセル部に用いるシリコン等の半導体の厚さ
を1〜2μとすると必ず基板を必要とする。加えて基板
より外部引出しリードを接続する端子も直接半導体層に
接着できない。
However, this price is 4160 yen/1/100
There are many difficulties in reducing the price to 40 yen/-. For example, the wafer used for the cell part has the precision of a substrate having mechanical strength. Therefore, when the cell part is made of a semiconductor, if the thickness of the semiconductor such as silicon used for the cell part is 1 to 2 .mu.m, a substrate is always required. In addition, terminals for connecting external leads from the substrate cannot be directly bonded to the semiconductor layer.

このため単に半導体層を3070円/Wより1 /10
0の30円/−になし得たとしても、その結果逆にモジ
ュール化するのにこれまで以上の費用がかかってしまう
For this reason, the semiconductor layer is simply sold at 1/10 from 3070 yen/W.
Even if it were possible to reduce the cost to 0.30 yen/-, it would end up costing more than ever to make it modular.

本発明はかかる欠点を除去するため、従来の太陽電池を
さらに大きな系で眺め、そこでの必要な要件を考察した
。その結果、従来、シリコンスライスを複数個集合する
損金さらに一部の太陽電池が破損しても、その太陽電池
がショートして逆流し電力を損失してしまうことを防ぐ
逆流防止ダイオード等が必要とされるが、本発明はかか
るシステムとしての損金を基板としてその上側に光起電
力を発生させる半導体層と同じ半導体層をもって逆流防
止ダイオードとし、加えてこの基板を半導体層の機械歪
を保障する基板とするに加えて、外部引出し端をも取り
つけ、またこの基板上に正、食用の少なくとも2本のパ
スラインを設け、このパスラインを利用して複数個がマ
トリックス化された半導体層をマトリックス化して系全
体を一本化したことを特徴としている。
In order to eliminate such drawbacks, the present invention looked at conventional solar cells in a larger system and considered the necessary requirements there. As a result, in the past, there was no need to assemble multiple silicon slices, and even if some solar cells were damaged, backflow prevention diodes were required to prevent the solar cells from shorting out and causing loss of power. However, in the present invention, the loss of such a system is used as a substrate, and a semiconductor layer on the upper side of which is the same as the semiconductor layer that generates photovoltaic force is used as a backflow prevention diode, and in addition, this substrate is used as a substrate that ensures mechanical distortion of the semiconductor layer. In addition, an external lead-out end is also attached, and at least two pass lines, one positive and one edible, are provided on this substrate, and a plurality of semiconductor layers arranged in a matrix are formed into a matrix by using these pass lines. The feature is that the entire system is integrated into one.

さらに本発明はかかる低価格製造用にエツチングまたは
フォトエツチングまたは選択性印刷を用い、3〜4回の
マスク工程で完了するようにしたことも他の大きな特徴
としている。特に半導体層と第1または第2の電極の一
方の透明電極とを概略同一形状とすることにより製造工
程を簡略化し、また半導体層の側面にそって基板表面よ
り上方に離れて設けられた電極より基板に至るリードを
設けたこと等の特徴を有する。
Another major feature of the present invention is that it uses etching, photoetching, or selective printing for such low-cost manufacturing, and can be completed in three to four mask steps. In particular, the manufacturing process is simplified by making the semiconductor layer and the transparent electrode of one of the first or second electrodes approximately the same shape, and the electrode is provided apart above the substrate surface along the side surface of the semiconductor layer. It has features such as the provision of leads that reach the substrate.

以下に図面に従って本発明を説明する。The present invention will be explained below with reference to the drawings.

第1図は本発明の変換装置の縦断面図を用いてその作製
工程を示したものである。
FIG. 1 shows the manufacturing process of the conversion device of the present invention using a longitudinal sectional view.

図面において(A)は絶縁基板(1)上に導電性電極(
2)を選択的に形成している。フォトエッチング工程を
用いるならば■枚目のフォトマスクを使用する。しかし
選択プラズマエッチ、または印刷法を用いて簡略化して
コストの低減を図ってもよい。
In the drawing, (A) shows a conductive electrode (
2) is selectively formed. If a photo-etching process is used, use the ■th photomask. However, selective plasma etching or printing may be used to simplify and reduce costs.

基板材料としてはメタクリル樹脂、エポキシ樹脂特にガ
ラス−エポキシ複合材料(通称ガラエポ)弗素樹脂、ポ
リカーボネイト、ガラス、アルミナその他のセラミック
、セトモノ等を固い基板として用いた。可曲性の柔らか
な基板としてはポリイミド、ポリエステル、シリコーン
樹脂等を用いた。
As the substrate material, methacrylic resin, epoxy resin, especially glass-epoxy composite material (commonly known as GALA-EPO), fluororesin, polycarbonate, glass, alumina and other ceramics, and hard substrates were used. Polyimide, polyester, silicone resin, etc. were used as the flexible and soft substrate.

第1の導電性電極は基板に密着性の優れた材料を用いた
。例えばガラス基板上にクロムを形成し、さらにその上
面にアルミニュームを形成した2層膜としてもよい。
For the first conductive electrode, a material with excellent adhesion to the substrate was used. For example, it may be a two-layer film in which chromium is formed on a glass substrate and aluminum is further formed on the top surface.

第1図(B)はこの上面に半導体N(3)および透明導
電性電極よりなる第2の電極用材料(4)をコーティン
グしたものである。
In FIG. 1(B), this upper surface is coated with a second electrode material (4) consisting of a semiconductor N (3) and a transparent conductive electrode.

半導体層はPN接合、PIN接合、PINPIN接合、
PNPN・・・PN接合、PI I N接合等の光照射
により光起電力が発生し得るごとくに作製した。
The semiconductor layer is a PN junction, a PIN junction, a PINPIN junction,
PNPN...A PN junction, a PI IN junction, etc. were prepared in such a way that a photovoltaic force could be generated by light irradiation.

本実施例に用いた半導体層は多結晶またはアモルファス
のごとき非単結晶半導体であって、かつそのエネルギギ
ャップ(Eg)が太陽光または螢光灯光のごとき連続光
であり、かつこの連続光を効率よく光−電気変換を行わ
しめるためW−N構造とした。つまり光照射側のEgを
大きく、即ちW−Eg (WIDE Eg )の2〜3
evに、また反対側のEgを小さく、即ちN−Eg (
NALLOW Eg )の0.7〜1.5eVにした。
The semiconductor layer used in this example is a non-single crystal semiconductor such as polycrystalline or amorphous, and its energy gap (Eg) is continuous light such as sunlight or fluorescent light, and this continuous light can be efficiently used. A W-N structure was used to ensure good photo-electrical conversion. In other words, increase the Eg on the light irradiation side, that is, 2 to 3 of W-Eg (WIDE Eg).
ev, and reduce Eg on the opposite side, that is, N-Eg (
NALLOW Eg ) was set at 0.7 to 1.5 eV.

半導体材料としては、珪素を主成分とし、その中にC+
 N、 0. Ge+ Sn、 pb、 In+ Sb
+ Teを必要に応じて添加した。また、半導体層は減
圧CVD法またはグロー放電法を主として用いた。それ
らについては、本発明人の発明になる特許出願、特願昭
53−0868671086868、特願昭54−03
20701032071、特願昭49−071738に
記載されている。
As a semiconductor material, silicon is the main component, and C+
N, 0. Ge+ Sn, pb, In+ Sb
+Te was added as needed. In addition, the semiconductor layer was mainly formed using a low pressure CVD method or a glow discharge method. For these, patent applications for inventions by the present inventor, Japanese Patent Application No. 53-0868671086868, Japanese Patent Application No. 54-03
No. 20701032071 and is described in Japanese Patent Application No. 49-071738.

この後第1図(C)に示すごとく、第2回百のエツチン
グ工程■により不要部の半導体層(12)および透明導
電性電極(11)を同じマスクを用いて除去した。この
エツチングにより、透明電極のパターン(11) (1
1’)と概略同一形状に半導体層(12) (12’)
をエツチングさせた。即ち透明電極をマスクとして半導
体層をエツチングした。さらにこの半導体層は台形を有
しており、その側周辺はテーパエッチをしである。実際
には弗素系のプラズマエラチアマントを用いた。即ち平
行平板型の電極を有するプラズマエッチ装置において、
金属マスクを透明電極、半導体層を残す部分(11)(
11’)(12) (12’)上に設置せしめ、その除
去される部分でのみ選択的にプラズマ放電をさせた。そ
の際、基板下に共通の一電極と基板上に基板透明電極よ
り若干離間して十の対抗電極間にプラズマ放電させたも
のである。かくするとフォトレジスト等を用いる必要も
なく、また透明電極、半導体層を特性的に何等機械的に
傷つけないという特徴を有する。この選択プラズマエッ
チの際、十の対抗電極を上下または左右前後に周期的に
1ffllll〜1cmの巾で1〜10c/sにて振動
・移動させると、放電のエツジ部がぼけて、その結果半
導体層の側周辺をテーパ状に台形にすることができ、加
えてこのテーパの角度はエッチ速度と同じにすると基板
に対し約45°の2倍にすると約30°にまでベベル状
にすることができた。
Thereafter, as shown in FIG. 1(C), unnecessary portions of the semiconductor layer (12) and the transparent conductive electrode (11) were removed using the same mask in a second etching step (2). This etching creates transparent electrode patterns (11) (1
Semiconductor layer (12) (12') in approximately the same shape as 1')
was etched. That is, the semiconductor layer was etched using the transparent electrode as a mask. Further, this semiconductor layer has a trapezoidal shape, and the periphery of the trapezoid is tapered etched. Actually, a fluorine-based plasma elastomer was used. That is, in a plasma etching apparatus having parallel plate type electrodes,
The part where the metal mask is used as a transparent electrode and the semiconductor layer is left (11) (
11') (12) (12'), and plasma discharge was selectively applied only to the part to be removed. At that time, plasma discharge was caused between one common electrode under the substrate and ten opposing electrodes on the substrate slightly spaced apart from the substrate transparent electrode. In this way, there is no need to use a photoresist or the like, and the transparent electrode and semiconductor layer are not mechanically damaged in any way. During this selective plasma etching, if the ten opposing electrodes are periodically vibrated and moved up and down or left and right and back and forth at a speed of 1 to 10 c/s with a width of 1ffllll to 1 cm, the edge of the discharge becomes blurred, and as a result, the semiconductor The periphery of the side of the layer can be tapered into a trapezoidal shape, and in addition, the angle of this taper can be approximately 45° relative to the substrate when the etch rate is the same, and when doubled, it can beveled to approximately 30°. did it.

その結果、第1の電極よりこの半導体層の側周辺にそっ
て基板のパスラインへのリードの形成が断絶の可能性も
なくきわめて信頬性を高くすることができた。さらに逆
流防止用ダイオードにあっては、その逆耐圧を高め実質
的にPIN接合界面での空乏層をひろめることができた
As a result, the lead formation from the first electrode to the pass line of the substrate along the side periphery of this semiconductor layer can be made extremely reliable without the possibility of disconnection. Furthermore, in the case of the reverse current prevention diode, it was possible to increase its reverse breakdown voltage and substantially expand the depletion layer at the PIN junction interface.

第1図において、第1のパスライン(5) + 光N変
換装置(6)、直列に接続された他の光電変換装置(7
)、逆流防止用ダイオード(8)、第2のパスライン(
9)を有せしめた。光電変換装置は2ケを直列にして出
力の電圧を2倍に高めである。
In FIG. 1, a first pass line (5) + a photo-N converter (6), and another photoelectric converter (7) connected in series.
), backflow prevention diode (8), second pass line (
9). Two photoelectric conversion devices are connected in series to double the output voltage.

第1図(D)は(C)の上側に第2の電極の一部となる
導体を選択的に形成させて完成したものである。図面に
おいては光(10)は基板(1)の上方より入射させた
。基板に密接して設けられた第1のパスライン(16)
と光電変換装置(6)の第1の電極(13)とがリード
(17)により連結されている。また第2の電極である
対抗電極(光が照射する面倒の電極をいう)は透明電極
(11)と格子ラインパターン、クロスハツチパターン
、魚骨パターン等の他の補助電極(30)と重ねてその
直列抵抗の低減化を図っている。この連結用の補助電極
(30)は光が照射される全有効面積の20%以下望ま
しくは5%程度に設けた。この補助電極(30)は半導
体層(12)の側周辺のテーパ面にそって基板上に至り
他の変換装置(7)の第1の電極に直列接続されている
。この光電変換装置(7)の対抗電極(11°)も透明
電極(11)と補助電極(22)よりなっている。
FIG. 1(D) is completed by selectively forming a conductor to become a part of the second electrode on the upper side of FIG. 1(C). In the drawing, light (10) was incident on the substrate (1) from above. A first pass line (16) provided in close proximity to the substrate
and the first electrode (13) of the photoelectric conversion device (6) are connected by a lead (17). In addition, the second electrode, the counter electrode (referring to the troublesome electrode that is irradiated with light), is overlapped with the transparent electrode (11) and other auxiliary electrodes (30) such as a grid line pattern, a crosshatch pattern, a fishbone pattern, etc. The aim is to reduce the series resistance. This auxiliary electrode (30) for connection is provided at 20% or less, preferably about 5% of the total effective area irradiated with light. This auxiliary electrode (30) extends onto the substrate along the tapered surface around the side of the semiconductor layer (12) and is connected in series to the first electrode of another conversion device (7). The opposing electrode (11°) of this photoelectric conversion device (7) also consists of a transparent electrode (11) and an auxiliary electrode (22).

さらにこの透明電極(11”)および補助電極は重なっ
て逆流防止用ダイオード(8)の一方の電極を構成して
いる。このダイオードの半導体層(12’)は変換装置
(7)の半導体層と同一材料で構成させている。このこ
とは第1図(B)での製造工程より明らかであり、同一
の半導体層(3)を選択エッチして得られたものである
。即ち同一絶縁基板上に変換装置が破損等でショートし
た時、系全体を機能不能に陥ることより防止する逆流防
止ダイオード(8)が光電変換装置(6)(7)と同時
に同一平面上に設けられており、このダイオードの作製
に何等の新しい工程を必要としないことが本発明の特徴
である。またこのダイオードの他方の電極(13”)は
第2のパスライン(9)を構成する下地金属(15)と
電極(1日)とに連結している。
Furthermore, this transparent electrode (11") and the auxiliary electrode overlap to constitute one electrode of a backflow prevention diode (8). The semiconductor layer (12') of this diode is the same as the semiconductor layer of the converter (7). They are made of the same material. This is clear from the manufacturing process shown in FIG. A backflow prevention diode (8) is provided on the same plane as the photoelectric conversion devices (6) and (7), which prevents the entire system from becoming inoperable when the conversion device is damaged or short-circuited. It is a feature of the present invention that no new process is required to manufacture this diode. Also, the other electrode (13") of this diode is connected to the base metal (15) constituting the second pass line (9). and an electrode (1 day).

この図面には2ケの変換装置を直列に連結した例を示し
たが、同一基板に複数個を作りそれらを直列または並列
にすることは本発明の特徴をさらに生かしている。また
本発明は半導体層を挟む位置的に高さが異なる2つの電
極を新たな工程をまったく導入することなしに同一平面
構成とし連結した。このことは工業上きわめて単純かつ
低価格装置の作製に重要である。
Although this figure shows an example in which two converters are connected in series, the features of the present invention can be further utilized by creating a plurality of converters on the same board and connecting them in series or in parallel. Further, in the present invention, two electrodes having different heights sandwiching a semiconductor layer are connected to each other in the same plane configuration without introducing any new process. This is important for the production of industrially very simple and low cost devices.

第2図は本発明の他の実施例である。光は基板側を通っ
て下側より半導体層に照射させている。
FIG. 2 shows another embodiment of the invention. The light passes through the substrate side and is irradiated onto the semiconductor layer from below.

第2図(A)において基板(1)上に第1の電極の一部
であってかつ対抗電極の一部を構成する電極(37)(
37’) (37”)を選択的に第1のマスク■を用い
て形成させた。さらにその上面を透明電極(4)、半導
体層(3)が第1図に示した実施例と同様にして形成さ
れて第2図(B)を得た。第2図(C)において、その
上面に第2の電極(34)。
In FIG. 2(A), there is an electrode (37) on the substrate (1) that is part of the first electrode and constitutes part of the counter electrode.
37') (37") was selectively formed using the first mask (2). Furthermore, a transparent electrode (4) and a semiconductor layer (3) were formed on the upper surface in the same manner as in the example shown in FIG. 2(B) was obtained. In FIG. 2(C), a second electrode (34) was formed on the upper surface.

(34’) (34”)を第2のマスク■を用いて形成
した後、この第2の電極をマスクとして半導体層(3)
を選択的にエッチし、さらに透明電極(4)をエッチし
た。そのためこの実施例においても半導体層と透明電極
は概略同一形状を有するセルファライン構成をさせるこ
とができた。第1図と同様に半導体N(3)の側周辺を
テーバ状にして、配線の断線を除去した。
(34') (34'') is formed using the second mask ■, and then the semiconductor layer (3) is formed using this second electrode as a mask.
was selectively etched, and then the transparent electrode (4) was further etched. Therefore, in this example as well, a self-line configuration in which the semiconductor layer and the transparent electrode had approximately the same shape could be achieved. Similarly to FIG. 1, the periphery of the semiconductor N(3) was made into a tapered shape to eliminate disconnections in the wiring.

第2図(D)は本発明装置の完成図である。第1のパス
ライン(5)第2のパスライン(9)は透光性絶縁基板
(1)上に設けられ、光電変換装置(6)および(7)
は基板を通しての光照射に対して光起電力を発生する。
FIG. 2(D) is a completed diagram of the device of the present invention. The first pass line (5) and the second pass line (9) are provided on the transparent insulating substrate (1), and the photoelectric conversion devices (6) and (7)
generates a photovoltaic force in response to light irradiation through the substrate.

逆流防止ダイオードは(8)に設けられている。半導体
の(12) (12’)の側周辺は絶縁物(35) (
35”)で囲まれており、この絶縁物上をリード(36
) (36”)があって光電変換装置間を電気的に連結
している。対抗電極は透明電極(11) (11’)と
格子ラインパターン、クロスラインパターン等の補助電
極(37)(37’) (37”)(37)とにより構
成させた。この場合、基板材料は光透過性材料代表的に
はガラスまたは透明有機樹脂を用いた。
A backflow prevention diode is provided at (8). The area around the (12) (12') side of the semiconductor is an insulator (35) (
35”), and the leads (36”
) (36") to electrically connect the photoelectric conversion devices. Opposing electrodes include transparent electrodes (11) (11') and auxiliary electrodes (37) (37") such as lattice line patterns and cross line patterns. ') (37'') (37). In this case, the substrate material used is a light-transmitting material, typically glass or transparent organic resin.

以下に本発明の実施例をさらに具体的な数字に基づき示
す。
Examples of the present invention will be shown below based on more specific numbers.

具体例1 第1図に示した光電変換装置の縦断面図を示す。Specific example 1 2 is a longitudinal cross-sectional view of the photoelectric conversion device shown in FIG. 1. FIG.

基板としてガラス(厚み1.4 mm)を用いた。さら
にその上面に第1の電極用にクロムを電子ビム蒸着法に
より2000人の厚さに形成した。クロムエッチ溶液に
てエツチングを施した。
Glass (thickness: 1.4 mm) was used as the substrate. Furthermore, chromium was formed on the upper surface for a first electrode to a thickness of 2000 mm by electron beam evaporation. Etching was performed using a chrome etch solution.

この後この上面にPIN接合を有する非単結晶半導体を
積層した。即ちN型非単結晶半導体(pH3/ 5i1
14=0.01、厚さ200人、Eg 1.7eV)、
 I型非単結晶半導体(Si84100%、厚さ0.5
μ、Eg 1.8eV)P型の炭素が添加された珪素(
C!I4: 5tHn= 1 : IBz116/5i
l14=0.003 、厚さ100人、Eg 2.1e
V)である。これらをグロー放電法(周波数13.56
MHz。
Thereafter, a non-single crystal semiconductor having a PIN junction was laminated on this upper surface. That is, N-type non-single crystal semiconductor (pH3/5i1
14=0.01, thickness 200 people, Eg 1.7eV),
I-type non-single crystal semiconductor (Si84 100%, thickness 0.5
μ, Eg 1.8eV) Silicon doped with P-type carbon (
C! I4: 5tHn= 1: IBz116/5i
l14=0.003, thickness 100 people, Eg 2.1e
V). These are processed using the glow discharge method (frequency 13.56
MHz.

出力10W、圧力0.1torr、被膜成長速度2.1
人/秒。
Output 10W, pressure 0.1 torr, film growth rate 2.1
people/second.

基板温度210°C)として形成した。さらに透明導電
膜を酸化スズを電子ビーム蒸着法によりその厚さ700
人として形成した。プラズマエツチングは透明電極は使
用ガスCF、、周波数13.56M1lz、エツチング
温度室温の条件で行った。また半導体は使用ガスCF4
+02 (5%)周波数13.56MHz、 エツチン
グ温度室温の条件で行った。
The substrate temperature was 210°C). Furthermore, a transparent conductive film was formed by applying tin oxide to a thickness of 700 mm by electron beam evaporation.
Formed as a person. Plasma etching was performed on the transparent electrode using gas CF, frequency 13.56 M11z, and etching temperature room temperature. Also, semiconductors use gas CF4.
+02 (5%) The etching was performed at a frequency of 13.56 MHz and an etching temperature of room temperature.

さらに第1図(B)の補助電極(30) (22)はア
ルミニューム真空蒸着法によりステンレスマスクを用い
て作製した。
Furthermore, the auxiliary electrodes (30) and (22) shown in FIG. 1(B) were fabricated by aluminum vacuum evaporation using a stainless steel mask.

得られた特性は以下の如くである。The properties obtained are as follows.

開放電圧   0.7V(2段直列) 短絡電流   23μA 曲線因子   0.5 照射光    白色螢光灯300 lxセル面積   
10mm X 15mm逆流防止ダイオードの面積  
5 mm X 15mm以上の説明において、透明電極
はSnO□にインジュームまたはアンチモン、テルルを
ドープして作製した。しかし対抗電極側の電極はショッ
トキ電極であっても、またショットキダイオードを構成
するための20〜50人のきわめて薄い膜厚の絶縁膜で
あってもよい。
Open circuit voltage 0.7V (2 stages in series) Short circuit current 23μA Fill factor 0.5 Irradiation light White fluorescent lamp 300lx Cell area
10mm x 15mm anti-reverse diode area
In the above description, the transparent electrode was made by doping SnO□ with indium, antimony, or tellurium. However, the electrode on the counter electrode side may be a Schottky electrode or may be an extremely thin insulating film of 20 to 50 layers for forming a Schottky diode.

このショットキ電極においては、透明電極の代わりに白
金等の仕事函数の大きな金属を光の透過する程度に薄<
25〜100人の厚さに形成させた。
In this Schottky electrode, a metal with a large work function such as platinum is used instead of a transparent electrode, which is thin enough to allow light to pass through.
It was formed to a thickness of 25 to 100 people.

またMIS型の光電変換装置においては、20〜50人
のトンネル電流の流れ得る程度に薄い絶縁膜を(11)
に対応して設け、その上に格子状またはその他の金属電
極を例えば第1図(D)のごとく対抗補助電極(22)
として設ければよいことはいうまでもない。
In addition, in MIS type photoelectric conversion devices, an insulating film is thin enough to allow the tunneling current of 20 to 50 people to flow (11).
A counter auxiliary electrode (22) is provided on which a grid-like or other metal electrode is provided, for example, as shown in FIG. 1(D).
Needless to say, it would be better to set it as .

本発明の実施例において、少な(とも2つのパスライン
は絶縁基板上の一方の表面にのみ設置させて設けた。し
かしひとつのパスラインまたは2つのパスラインの一部
は絶縁基板をスルーホールとし、その反対面または裏面
を用いて形成してもよいことはいうまでもない。しかし
その時は価格が高くなる欠点を有する。
In the embodiments of the present invention, two pass lines were installed on only one surface of the insulating substrate. However, one pass line or a part of two pass lines were formed by using through holes on the insulating substrate. , it goes without saying that it may be formed using the opposite side or the back side. However, in that case, there is a disadvantage that the price becomes high.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の光照射が基板の上方からなされた光電
変換装置の縦断面図を示し、かつその作製工程を示した
ものである。 第2図は本発明の光照射が基板を通して下側からなされ
る光電変換装置の縦断面図を示し、かつその作製工程を
示したものである。 第1図
FIG. 1 shows a longitudinal cross-sectional view of a photoelectric conversion device according to the present invention in which light irradiation is performed from above a substrate, and also shows the manufacturing process thereof. FIG. 2 shows a longitudinal cross-sectional view of a photoelectric conversion device according to the present invention in which light is irradiated from below through a substrate, and also shows the manufacturing process thereof. Figure 1

Claims (1)

【特許請求の範囲】[Claims] 1、絶縁基板上に設けられた第1の電極と該電極上の光
起電力を発生させる水素またはハロゲン元素が添加され
た非単結晶半導体層と該半導体上の第2の電極とを有す
る光電変換装置とを複数個直列または並列に連接して設
けた半導体装置において、前記半導体層の光照射がなさ
れる側の面には透明電極が前記第1または第2の電極の
一部または全部を構成し、かつそれぞれの光電変換装置
における前記半導体層と前記第1または第2の電極とを
概略同一形状の端部を有して前記基板上に設けられたこ
とを特徴とする光電変換装置。
1. A photovoltaic device having a first electrode provided on an insulating substrate, a non-single crystal semiconductor layer doped with hydrogen or a halogen element that generates a photovoltaic force on the electrode, and a second electrode on the semiconductor. In the semiconductor device in which a plurality of conversion devices are connected in series or in parallel, a transparent electrode covers part or all of the first or second electrode on the side of the semiconductor layer that is irradiated with light. 1. A photoelectric conversion device characterized in that the semiconductor layer and the first or second electrode in each photoelectric conversion device are provided on the substrate with end portions having substantially the same shape.
JP2092739A 1990-04-06 1990-04-06 Photoelectric converter Pending JPH031577A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2092739A JPH031577A (en) 1990-04-06 1990-04-06 Photoelectric converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2092739A JPH031577A (en) 1990-04-06 1990-04-06 Photoelectric converter

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP9009979A Division JPS5613779A (en) 1979-07-16 1979-07-16 Photoelectric converter and its preparation

Publications (1)

Publication Number Publication Date
JPH031577A true JPH031577A (en) 1991-01-08

Family

ID=14062788

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2092739A Pending JPH031577A (en) 1990-04-06 1990-04-06 Photoelectric converter

Country Status (1)

Country Link
JP (1) JPH031577A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999038216A1 (en) * 1998-01-22 1999-07-29 Citizen Watch Co., Ltd. Solar cell device and method of producing the same
JP2013030779A (en) * 2006-06-05 2013-02-07 Dow Corning Corp Solar cell including silicone resin layer

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3483038A (en) * 1967-01-05 1969-12-09 Rca Corp Integrated array of thin-film photovoltaic cells and method of making same
JPS5337718A (en) * 1976-09-21 1978-04-07 Asahi Glass Co Ltd Laminated glass with heating wire incorporated therein
JPS5342693A (en) * 1976-09-29 1978-04-18 Rca Corp Semiconductor device including amorphous silicone layer
JPS53143180A (en) * 1977-05-18 1978-12-13 Energy Conversion Devices Inc Amorphous semiconductor structure and method of producing same
JPS5463690A (en) * 1978-05-22 1979-05-22 Yamazaki Shunpei Photovoltaic force generating semiconductor and method of producing same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3483038A (en) * 1967-01-05 1969-12-09 Rca Corp Integrated array of thin-film photovoltaic cells and method of making same
JPS5337718A (en) * 1976-09-21 1978-04-07 Asahi Glass Co Ltd Laminated glass with heating wire incorporated therein
JPS5342693A (en) * 1976-09-29 1978-04-18 Rca Corp Semiconductor device including amorphous silicone layer
JPS53143180A (en) * 1977-05-18 1978-12-13 Energy Conversion Devices Inc Amorphous semiconductor structure and method of producing same
JPS5463690A (en) * 1978-05-22 1979-05-22 Yamazaki Shunpei Photovoltaic force generating semiconductor and method of producing same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999038216A1 (en) * 1998-01-22 1999-07-29 Citizen Watch Co., Ltd. Solar cell device and method of producing the same
US6333456B1 (en) 1998-01-22 2001-12-25 Citizen Watch Co., Ltd. Solar cell device and method of producing the same
JP2013030779A (en) * 2006-06-05 2013-02-07 Dow Corning Corp Solar cell including silicone resin layer

Similar Documents

Publication Publication Date Title
US4517403A (en) Series connected solar cells and method of formation
US5527716A (en) Method of making integrated-circuit stacked-cell solar module
US5616185A (en) Solar cell with integrated bypass diode and method
US5580395A (en) Solar cell with integrated bypass function
US7339110B1 (en) Solar cell and method of manufacture
US4784701A (en) Multi-layered thin film solar cell
JPH04276665A (en) Integrated solar battery
US20080023065A1 (en) Thin film photovoltaic module wiring for improved efficiency
JP2986875B2 (en) Integrated solar cell
US9246028B2 (en) Silicon solar cell manufacture
US20220271178A1 (en) Photovoltaic device and photovoltaic unit
JPH0261158B2 (en)
KR101192345B1 (en) Pattern Of The Electrode Of Solar Cell And Sollar Cell Comprising The Said Electrode Pattern
JPH031577A (en) Photoelectric converter
JP3133494B2 (en) Photovoltaic element
JPH077168A (en) Photoeletcric conversion semiconductor device
US5458695A (en) Solar cell and process for fabricating the same
JPS60100483A (en) Photoelectric converter
JP2892929B2 (en) Manufacturing method of integrated photoelectric conversion element
JPS6313358B2 (en)
JPS5976483A (en) Semiconductor device for photoelectric conversion
JPS58180074A (en) Photoelectric conversion semiconductor device
JPS62142374A (en) Manufacture of photoelectric conversion semiconductor device
JPH0548134A (en) Solar battery and its manufacture
JPH06177408A (en) Thin film solar battery and its manufacture