JPH0315366B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a reactance circuit integrated into an integrated circuit, and particularly to a reactance circuit that prevents the possibility of oscillation. (b) Conventional technology A semiconductor integrated circuit of an equivalent reactance circuit that operates as a negative reactance was developed in JP-A-Sho.
It is described in Publication No. 59-57515. Figure 2 shows
This shows the negative reactance circuit described in the above-mentioned publication, in which 1 includes first and second transistors 2 and 3 whose emitters are commonly connected;
a variable current source 4 connected to a common emitter of transistors 2 and 3; a current mirror circuit 5 whose input side is connected to the collector of the first transistor 2 and whose output side is connected to the collector of the second transistor 3;
It consists of a resistor 6 connected between the bases of the first and second transistors 2 and 3, and a capacitor 8 whose one end is connected to the input terminal 7 and the other end is connected to the resistor 6, and when viewed from the input terminal 7, This is a reactance circuit that operates as a negative equivalent reactance. The reactance X of the reactance circuit 1 is as follows: 6 and C is the capacitance of capacitor 8]. Also, the mutual conductance of the differential amplifier circuit
gm is gm=αqI/4KT=α/104I...(2) [where, T is the absolute temperature, q is the amount of charge of the electron, and K
is the Boltzmann constant, α is the current amplification factor, and I is the current flowing through the variable current source 4 of the differential amplifier circuit.] Therefore, the reactance circuit 1 in FIG. 2 can be expressed by the above equation (1). It can be said to be a variable reactance circuit which has a negative capacitive reactance X and can change the negative capacitive reactance X by changing the current value of the variable current source 4. (C) Problems to be Solved by the Invention However, the circuit shown in FIG. 2 has a positive feedback loop, and in order to obtain a large negative reactance, the current flowing through the variable current source 4 is increased, and the
If the gain of the differential amplifier circuit made up of the second transistors 2 and 3 is increased, there is a possibility that oscillation will occur. That is, assume that the base voltage of the first transistor 2 has now increased in response to the input signal from the input terminal 7. Then, the collector current of the first transistor 2 becomes large, and the current on the input side of the current mirror circuit 5 becomes large. Therefore, a current equal to the current flowing to the input side flows to the output side of the current mirror circuit 5 . On the other hand, as the base voltage of the first transistor 2 increases, the collector current of the second transistor 3 decreases. Therefore, a high level voltage is generated at the input terminal 7, and the high level voltage is positively fed back to the base of the first transistor 2 via the capacitor 8, so that oscillation may occur. (d) Means for Solving Problems The present invention has been made in view of the above points, and includes first and second transistors whose emitters are commonly connected, and a common emitter of the first and second transistors. a load connected between the collector of the first transistor and a power source, a reactance element connected between the base of the first transistor and a reference power source, and a current source connected to the first transistor; It is characterized by comprising a series circuit consisting of a resistor and a capacitor connected in series between the collector of the reactance element and the reactance element. (E) Effect According to the present invention, the base of the first transistor
Since negative reactance can be obtained without providing a positive feedback path between the collectors, stable operation can be obtained without oscillation even if the current value is increased. (F) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention.
9 includes first and second transistors 10 and 11 whose emitters are commonly connected, a variable current source (large resistance) 12 which is connected to the common emitters of the first and second transistors 10 and 11, and the second transistor 9. a current mirror circuit 13 whose input side is connected to the collector of the transistor 11 and whose output side is connected to the collector of the first transistor 10;
a capacitor 14 and a resistor 15 connected between the base of the first transistor 10 and the reference potential point A; a resistor 30 connected between the reference potential point A and the base of the second transistor 11; Coupling capacitor 16 connected between collector and base
and a resistor 17, and is a reactance circuit that operates as a negative equivalent reactance when viewed from the input terminal 18. Assume now that a forward current I ₀ flows through the variable current source 12 and the reactance circuit 9 is operating. In this state, if an input signal e _p is applied to the input terminal 18 and a current i _c flows through the coupling capacitor 16 in response, the current i _c is i _c = e _p /Z ₁ + Z ₂ ...(3) [However, Z ₁ is the composite impedance of the resistor 17 and the coupling capacitor 16, and Z ₂ is the composite impedance of the capacitor 14 and the resistor 15]. Note that the impedances Z ₁ and Z ₂ are Z ₁ = Ra + 1/jωC ₁ ... (4) Z ₂ = 1/1/R ₁ + jωCa ... (5) [However, Ra is the resistance value of resistor 17, and C ₁ is the coupling Capacitance value _R1 of capacitor 16 is resistance 15
The resistance value Ca is the capacitance value of the capacitor 14, and ω is the angular frequency]. The base voltage e _c of the first transistor 10 is e _c =i _c Z ₂ (6). On the other hand, the collector current i ₁ of the first transistor 10 is i ₁ = gme _c (7), so by substituting equation (6) into equation (7), the collector current i ₁ is i ₁ = gmi _c Z ₂ ...(8) Therefore, when the input signal e _p is applied to the input terminal 18, the current i flowing through the input terminal 18 is expressed as i=2i ₁ +i _c ...(9) , by substituting equations (3) and (8) into equation (9), the current i is: i=(2gm/1/R ₁ +jωCa+1) e/{Ra+1/jωC ₁ }+{1/ (1/R ₁ +jωCa)} ...(9)' Here, Ra≫1/ωC ₁ and R _1≫1 /
If we substitute the condition ωCa, the current i becomes i≒(1+2gm/jωCa)e/Ra+1/jωCa...(9)'', and if we further substitute the condition Ra≫1/ωCa into equation (9)'', we get , the current i can be approximated as i≒(1/Ra+2gm/jωCaRa)e...(9)≫. When viewed from the input terminal 18, the reactance circuit 9 in Fig. 1 is a parallel circuit consisting of a resistor 19 with a resistance value of Ra and a coil 20 with an inductive reactance of ωCaRa/2gm, as shown in Fig. 3. This shows that it is equivalently converted to . Moreover, if gm=αI ₀ /104 shown in equation (2) is substituted for the inductive reactance ωCaRa/2gm,
_The inductive reactance X is _expressed as I understand. Now, the reactance circuit 9 in FIG. 1 does not have a positive feedback loop. Therefore, even if a large current is passed through the variable current source 12 in an attempt to obtain a large negative reactance, there is no possibility of oscillation. Furthermore,
Since it has two negative feedback loops, it also has the advantage of stable operation. In the embodiment shown in FIG. 1, the first and second transistors 10 and 11
Although the case where the current mirror circuit 13 is connected as a load has been described, a resistor or the like may be used. FIG. 4 shows another embodiment of the present invention,
In place of the capacitor 14 in FIG. 1, a coil 21 is connected to generate an equivalent capacitance reactance at the input terminal 22. The circuit operation and negative feedback loop are the same as in the case of FIG. 1, and a positive equivalent capacitance reactance is generated at the input terminal 22. (G) Effects of the Invention As described above, according to the present invention, a negative reactance circuit can be configured with a negative feedback loop, so a reactance circuit that has no possibility of oscillation and exhibits stable negative reactance characteristics can be created. can get.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a conventional negative equivalent reactance circuit, Fig. 3 is a partial equivalent circuit diagram of Fig. 1, and Fig. 4 is an alternative circuit diagram of the present invention. FIG. 2 is a circuit diagram showing an embodiment of the present invention. 10...First transistor, 11...Second transistor, 12...Variable current source, 13...Current mirror circuit, 14 ...Capacitor, 16...Coupling capacitor, 17...Resistor, 18...Input terminal.

Claims (1)

[Claims] 1 differentially connected first and second transistors, a load connected between the collector of the first transistor and a power source, and a reactance element connected between the base of the first transistor and a reference power source. and a series circuit consisting of a resistor and a capacitor connected in series between the collector of the first transistor and the reactance element, and the collector of the first transistor is used as a control terminal.