JPH03147857A - Recording control method of thermal recording device - Google Patents

Abstract

PURPOSE:To improve recording speed using the same power supply capacity as for a conventional thermally sensitive recording device by driving freely combined blocks for recording simultaneously within the maximum value of the number of simultaneously drivable black pixels to which the sum of count values obtained by counting the number of black pixels of each block is limited. CONSTITUTION:A thermal head device 1 uses a single line divided into four blocks. Block counters 4, 5, 6, 7 are under a state in which enable signals EN1, EN2, EN3, EN4 are added from a selector 11, and input recording data WD in synchronization with a clock signal CP under such a state. Further, the counters count the number of black pixels included in the recording data WD, and the count values BC1, BC2, BC3, BC4 are added to a recording mode interpretation part 3. The recording mode interpretation part 3 interprets the number of black pixels of each block based on the count values BC1, BC2, BC3, BC4 entered from each block counter 4, 5, 6, 7. In addition, the part 3 interprets which block should be driven for recording simultaneously within the range of the maximum number of recording pixels contained in data ID which is not exceeded by the total sum of black pixels. The part 3 also outputs recording mode data representing the combination of blocks to a writing control part 8. Consequently, a single or more than two block writing actions can be performed simultaneously and thereby time required for recording in a single line can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a recording control method for a thermal recording apparatus in which a thermal head is divided into a plurality of blocks and driven.

[Prior Art] Plotters of facsimile machines and the like use thermal recording devices that record images line by line on thermal recording paper using a thermal head having a recording width of one line.

The thermal head used in this thermal recording device is equipped with 1728 heating resistors, and each heating resistor is If you drive them at the same time, you will need a fairly large capacity power supply.
Equipment cost increases.

Therefore, we divided the thermal bed into multiple blocks,
By driving the thermal head in block units,
This allows the required power supply capacity to be reduced.

[Problems to be Solved by the Invention] However, in such a conventional device, in order to record an i-line image, as many recording cycles as the number of block divisions are required. This has caused the inconvenience of significantly increasing the time required.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a recording control method for a thermal recording apparatus that can eliminate the disadvantages of the conventional apparatus, reduce the power supply capacity required for recording, and improve the recording speed.

[Means for Solving the Problems] The present invention counts the number of black pixels in each block, and arbitrarily changes the number of blocks as long as the sum of the counted values does not exceed the maximum number of black pixels that can be opened at the same time. They are combined and driven for recording at the same time.

[Effect] Therefore, until the number of black pixels that can be moved simultaneously is reached,
Since multiple blocks are driven simultaneously, the recording speed can be increased with the same power supply capacity.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 shows a recording control system of a thermal recording apparatus according to an embodiment of the present invention.

In this case, the thermal bed device 1 is one in which the line (1) is divided into four blocks. Also,
The thermal head device 1 has a latch function capable of storing 1947 minutes of recorded data.

The recording control unit 2 is for controlling the operation of this recording control system, and prior to recording one page of images, it sends a data ID indicating the recording conditions at that time to the recording mode determination unit 3. At the same time as outputting a reset signal R3,
In addition, 1947 minutes of recording data VD is input to the clock signal CP.
Output in sync with.

It also outputs a start signal ST that instructs the start of recording operation for one line.

The clock signal CP is supplied to block counters 4, 5, 6, 7.
, the write control section 8, the white bit insertion section 9 and the counter 10, the recording data +10 is applied to the block counters 4, 5, 6.7 and the white bit insertion section 9, and the reset signal R3 is , block counter 4
, 5, 6.7 and the write control unit 8, and the start signal ST is applied to the counter 10 and the selector 1.
It has been added to 1.

Block counters 4, 5, 6.7 receive enable signals ENI, EN2 . EN3. With EN4 applied, record data 1/D is input in synchronization with clock signal CP, and the number of black pixels included in the record data vD is counted, and the counted values BCI, BC
2, BC3, and BC4 are added to the recording mode determination section 3.

The recording mode determining unit 3 detects each block counter 4,5゜6.
．． Count values input from 7 BCI, BC2, BC3, BC
4, the number of black pixels in each block is determined, and within the range where the total number of black pixels does not exceed the maximum number of recorded black pixels included in data 10, the blocks to be driven for recording at the same time are determined. Recording mode data MO indicating the combination of blocks is output to the write control unit 8.

The following table shows an example of the relationship between the combination of blocks that are simultaneously driven for recording and the recording mode.

(Left below) When the negative logic load pulse LD is output from the counter IO, the write control unit 8 refers to the above-mentioned table based on the recording mode data MD input from the recording mode determining unit 3 at that time. The recording timing of each block is determined, and based on the determination result, a negative logic strobe signal 5TBI is used to drive each block for recording.
, 5Tt32, 5TB3, and 5TB4 are output.

That is, for example, when mode l is specified, strobe signals 5T81.5TB2, 5rB3, 5T
When B4 is output as 1/number of terms and mode 2 is specified.

While simultaneously outputting strobe signals 5TBI and 5TB2, strobe signals 5TB3 and 5T are subsequently output.
Output B4 pieces in sequence. Furthermore, when mode 15 is specified, strobe signals 5TBI, 5TB2, 5
All TB3 and 5TB4 are output at the same time.

The write control unit 8 also receives a strobe signal 5TB1.
When the output of 5T82, 5TB3, and 5TB4 is completed and the next line of recording data VD can be accepted, the negative logic data enable signal ENd is set to logic L level. stand down.

Further, when the mode 1 continues for a certain number of times, the write control section 8 outputs white bit insertion data to the white bit insertion section 9 to forcefully insert a white bit. If the number of consecutive lines in mode I increases further, the white bit insertion data WM is increased.

When the white bit insertion data WM is not output, the white bit insertion section 9 outputs the clock signal CP to the thermal head device 1, and also outputs the recording data 1jD to the thermal head device 21 as recording data WDm. In addition, when the same white bit insertion data is output, the number of white pixels corresponding to the value of the 5 white bit insertion data WM is forcibly inserted into consecutive pixels.
Record data 1ilD is corrected to form record data WDm.

When the counter 10 detects the falling edge of the start signal SR while the data enable signal ENd is in the on state (logic Ll/bell), the counter 10 outputs the clock signal CP.
Start counting, and each time you count the number of pixels in one block,
Increase the value of data SC output to selector 11. At the same time, when the count value reaches the number of pixels for one line, a negative logic load pulse LD is output. This load pulse LD is applied to the write control section 8, the thermal head device 1, and the recording mode determination section 3.

When the selector 11 detects the falling edge of the start signal SR, it changes the logic level of the enable signal ENI to the on state, and thereafter, every time the value of the data SC changes, the enable signal EN2 . EN3. As well as changing the logic level of EN4 to the on state.

The enable signal EN1, which was turned on immediately before,
EN2. EN3. Change EN4 to OFF state.

With the above configuration, when the main control unit of the main device in which this recording device is installed instructs to record one page of images, the recording control unit 2 first outputs the reset signal R5 and (See FIG. 2(a)), and outputs the data ID to the recording mode determination section 3.

As a result, the internal states of the block counters 4, 5, 6.7 and the write control unit 8 are reset, and the write control unit 8 can accept the recording data IiD, so the data enable signal ENd is turned on. (See Figure 2(c)).

Therefore, when the counter 10 becomes operational, the recording control section 2 starts transferring the data of the I&first line 1.

That is, the recording control unit 2 outputs the start signal SR (FIG. 2(b)), and immediately thereafter outputs the recording data wD of line 1 in synchronization with the clock signal CP (FIG. 2(b)).
d), see Ce)).

Thereby, the counter 10 starts counting the clock signal CP and increments the value of the data SC every time the number of pixels in the block is counted.

When the count reaches the number of pixels for one line, a load pulse LD is output (see FIG. 2(f)).

Further, the clock signal CP and the recording data WDn+ are outputted to the thermal head device 1 via the white bit insertion section 9, whereby one line of recording data WDm is transferred to the thermal head device 1.

Immediately after this transfer is completed, as described above, the load pulse LD is output from the counter IO, so that the thermal head device tl.

One line of recording data vDI11 input at that time
is latched internally (see Figure 2(g)).

On the other hand, the selector 11 outputs the enable signal ENI immediately before starting the transfer of the recording data D, so the block counter 4 becomes operational, and therefore the black pixels included in the recording data vD of the first block are The counted value BCI is output to the recording mode determining section 3.

Further, since the data SC of the counter 10 changes at the timing when the transfer of the recording data D of the second block is started, the selector 11 turns off the enable signal ENI and turns on the enable signal EN2 at the same time.

As a result, the counting operation of the block counter 4 is completed, and the block counter 5 becomes operable. Therefore, the number of black pixels included in the recording data VD of the second block is counted by the block counter 5. , the count value BC2 is output to the recording mode determining section 3.

Thereafter, in the same manner, the recorded data 11 of the third block
At the timing when 0 is transferred, the enable signal EN2 is turned off and at the same time the enable signal EN3 is turned on, and the block counter 6 counts the number of black pixels included in the recording data wD of the third block. and record data 1l of the fourth block
At the timing when the ID is transferred, the enable signal EN3 is turned off, and at the same time, the enable signal EN4 is turned on, and the block counter 7 selects 3 of the fourth block.
The number of black pixels included in the self-recorded data l1lD is counted by a block count.

In this way, at the timing when the transfer of one line of recording data I/D is completed, the number of black pixels included in each block is the count value BCI, BC2, BC:3. B.C.
4, and therefore, the recording mode determination unit 3
Synchronizing with the output timing of the load pulse LD, input these count values BCI, BC2, BC3, BC4,
The recording mode is determined, and recording mode data MD corresponding to the determination result is output to the write control section 8.

When the load pulse LD is output, the write control unit 8 takes in the recording mode data and determines the recording mode, and outputs the strobe signals 5TBI, 5TB2, 5TB3, and 5TB4 at the timing when the output of the load pulse LD ends. Upon starting (see Figure 2 (h) to (k))
.

The data enable signal ENd is turned off.

As a result, the recording data wDffl latched in the thermal head device 1 becomes the strobe signal 5TBI.

Data is recorded in blocks corresponding to the outputs of 5TB2, 5TB3, and 5TB4, and the data transfer operation of the recording control unit 2 is put into a standby state.

Now, the write control unit 8 generates a data enable signal E at an appropriate timing so that the thermal head device 1 can latch the recording data WDm of the next line immediately after the write operation of the thermal head device 1 is completed.
Turn on Nd.

As a result, the same operation as described above is performed repeatedly, and therefore, the recording operation of the thermal head device 1 and the transfer operation of the recording data VD of the line next to the line being recorded are performed in parallel, so that the recording operation is performed in parallel. The time required is significantly reduced.

On the other hand, when recording lines in mode 1 are continuous, the 1M writing control section 8 outputs its own bit insertion data state as described above, so the white bit insertion section 9.

Convert pixels at appropriate positions to white pixels.

As a result, when the thermal head device 1 is in a state where heat is accumulated due to consecutive recording lines in mode l with a very high black pixel ratio, white pixels are inserted at appropriate positions, thereby preventing the thermal head device 1 from overheating. be done.

Furthermore, the white bit insertion section 9 changes the insertion position of white pixels line by line, thereby preventing a situation where white pixels are arranged at the same position and a blank line is created.

Furthermore, the recording control section 2 controls the conveyance operation of a conveyance section for thermal recording paper (not shown) in synchronization with this recording operation.

In this way, in this embodiment, the thermal head device W1
1 as long as the total number of black pixels does not exceed the maximum number of recordable black pixels when the four blocks of
Since the recording operation for one or more blocks is performed simultaneously, the time required to record one or more lines can be shortened.

Thereby, the recording speed of one image can be increased with a relatively small power supply capacity.

Incidentally, in the above-described embodiment, a case has been described in which a thermal head device that is divided into four blocks is used, but the number of divisions is not limited to this. Furthermore, since the number of pixels included in one block can be set arbitrarily, the same control section can be applied to thermal recording devices with different recording sizes.

Furthermore, the types of recording modes are not limited to those described above.

[Effects of the Invention] As explained above, according to the present invention, the number of black pixels in each block is counted, and as long as the sum of the counted values does not exceed the maximum number of black pixels that can be activated at the same time, Since blocks can be arbitrarily combined and recorded at the same time, ■
The time required for line recording operation can be shortened,
The effect is that the recording speed can be increased even with a relatively small power supply capacity.

[Brief explanation of the drawing]

1 is a block diagram showing a recording control system of a thermal recording apparatus according to an embodiment of the present invention, and FIG. 2 is a waveform diagram for explaining the operation of the apparatus shown in FIG. 1... Thermal head device, 2... Recording control section, 3
. . . Recording mode determination section, 4, 5, 6.7 . . . Block counter, 8 . . . Write control unit, 9 . . . White bit insertion section, 10 .

Claims (1)

[Claims] In a recording control method for a thermal recording device in which the thermal head is divided into multiple blocks and driven, the number of black pixels in each block is counted, and the sum of the counted values exceeds the maximum number of black pixels that can be driven simultaneously. 1. A recording control method for a thermal recording apparatus, characterized in that the blocks described above are arbitrarily combined and driven for recording at the same time, to the extent that the above blocks are combined arbitrarily and driven for recording at the same time.