JPH03144858A - Unconnected wire display system - Google Patents

Unconnected wire display system

Info

Publication number
JPH03144858A
JPH03144858A JP1284423A JP28442389A JPH03144858A JP H03144858 A JPH03144858 A JP H03144858A JP 1284423 A JP1284423 A JP 1284423A JP 28442389 A JP28442389 A JP 28442389A JP H03144858 A JPH03144858 A JP H03144858A
Authority
JP
Japan
Prior art keywords
unconnected
display
pin pair
pair
rat nest
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1284423A
Other languages
Japanese (ja)
Other versions
JP2861136B2 (en
Inventor
Osamu Ito
修 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1284423A priority Critical patent/JP2861136B2/en
Publication of JPH03144858A publication Critical patent/JPH03144858A/en
Application granted granted Critical
Publication of JP2861136B2 publication Critical patent/JP2861136B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To improve the efficiency of interactive wiring processing by displaying only the rat nest of a corresponding unconnected pin pair when the unconnected pin pair is selected. CONSTITUTION:An all rat nest display control part 2 displays an unconnected wire on the basis of information recognized by an all unconnected pin pair recognizing part 1, and when the unconnected pin pair is selected and instructed from among those, an instructed coordinate recognizing part 3 recognizes the coordinate position of an instructed point. An instructed unconnected pin pair recognizing part 4 recognizes the unconnected pin pair, and an instructed rat nest display control part 5 displays only the rat nest of the recognized unconnected pin pair. Then, unconnected wire connecting processing is executed interactively, and when connection results in success, a connection recognizing part 6 recognizes a connected situation, and an instructed rat nest non-display control part 7 erases the rat nest display of the corresponding unconnected pia pair. Thus, the interactive wiring of the unconnected wire can be processed efficiently.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はOADシステム、さらに詳しくいえば、LSl
、プリント板の対話配線処理にs−ケる未結線表示方式
に関する。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to an OAD system, more specifically, an LSL
, relates to an unconnected line display method suitable for interactive wiring processing of printed circuit boards.

(従来の技術) 従来、この種の未結線表示方式は対話配線処理時に、未
結線状態を知らせるラットネストの全体表示を行ない、
オペレータが接続をしたいビンペアの一点を指示するこ
とにより対象となるビンペアが選択されていた。
(Prior Art) Conventionally, this type of unconnected display method displays the entire rat nest to notify the unconnected state during interactive wiring processing.
The target bin pair was selected by the operator indicating a point in the bin pair to which the operator wanted to connect.

しかしながら1選択された後にひいても、ラットネスト
の全体表示は選択前と同様な状態で表示されていた。
However, even after one selection was made, the entire rat nest was displayed in the same state as before the selection.

(発明が解決しようとする課題) そのため、未結線ピンペアが多い場合、未納線表示の重
なりが生じ、配線接続の処理対象ピンペアを選択した後
で配線処理を行う際、未結線ピンペアの全体表示がされ
ているので1画面が見に〈〈な9.対話配線処理の効率
を大幅に低下させるという欠点があった。
(Problem to be solved by the invention) Therefore, when there are many unconnected pin pairs, the undelivered line displays overlap, and when performing wiring processing after selecting the pin pair to be processed for wiring connection, the entire display of unconnected pin pairs is 9. This has the drawback of significantly reducing the efficiency of interactive wiring processing.

本発明の目的は上記欠点を解決するもので。The object of the present invention is to overcome the above-mentioned drawbacks.

未結線ピンペアのみを表示できるようにすることにより
1画面が不要に交錯して表示されるのを防止し、未結線
の対話配線を効率的に処理できるようにした未結線表示
方式を提供することにある。
To provide an unconnected line display method that prevents one screen from being displayed in an unnecessary manner by displaying only unconnected pin pairs, and efficiently processes unconnected dialogue wiring. It is in.

(課題を解決するための手段) 前記目的を遺戒するために本発明による未結線表示方式
はLSIbよびプリント板の結線状態を表示すt方式に
おいて、全体のピンペアの結線t7’l:は未結線状態
?:認識する全未結線ピンペア認識部と、前記全未結線
ピンペア認識部で認識された情報に基づいて表示部に未
結線表示を行なう全ラット表示制御部と1選択された未
結線ピンペアの指示点の座標位置を認識する指示座標認
識部と、前記指示点の座標位置から未結線ピンペアを認
識する指示結線ピンペア認識部と、前記認識された未結
線ピンペアの2ツトネストのみを表示部に表示する指示
ラットネスト表示制御部と、前記未配線接続処Mを対話
的に行った結果、結線に成功したとき、結線状況を認識
する結線認識部と、前記結線が認識された結果を表示部
のラットネスト表示に反映し。
(Means for Solving the Problems) In order to accomplish the above object, the unconnected display method according to the present invention is such that in the t method for displaying the connection status of LSIb and printed circuit board, the connections t7'l: of all pin pairs are unconnected. Wiring condition? : All unconnected pin pair recognition unit to recognize, all rat display control unit to display unconnected on the display unit based on the information recognized by the all unconnected pin pair recognition unit, and the pointing point of one selected unconnected pin pair. an instruction coordinate recognition section that recognizes the coordinate position of the instruction point, an instruction connected pin pair recognition section that recognizes the unconnected pin pair from the coordinate position of the specified point, and an instruction that displays only the two nests of the recognized unconnected pin pair on the display section. A rat nest display control section, when a connection is successful as a result of interactively performing the unwired connection process M, a connection recognition section that recognizes the connection status, and a rat nest display section that displays the result of the connection recognition. reflected in the display.

該当未結線ピンペアを表示部から消去する指示ラットネ
スト非表示制御部とから構成し、指示された未結線ピン
ペアのみラットネスト表示するようにしである。
and a rat nest non-display control section for instructing to delete the corresponding unconnected pin pair from the display section, and only the designated unconnected pin pair is displayed in the rat nest.

(実 施例) 以下1図面を参照して本発明をさらに詳しく説明する。(Example) The present invention will be explained in more detail below with reference to one drawing.

第1図は本発明による未結線表示方式を適用したORT
画面表示例を示している。
Figure 1 shows an ORT to which the unconnected display method according to the present invention is applied.
An example of a screen display is shown.

同図(a)は、未結線ピンペア)!ll的前表示例、同
図(b)は未結線ピンペア選択後の状態の表示例である
Figure (a) shows an unconnected pin pair)! FIG. 3B is an example of the display after selecting the unconnected pin pair.

第2図は本発明による未結線表示方式の構成を示すブロ
ック図である。
FIG. 2 is a block diagram showing the configuration of the unconnected line display method according to the present invention.

曾ず、全未結線ピンペア認識部lが全体のピンペアの結
線噴たは未結線状況をgmする。
First, the all-unconnected pin pair recognition unit l gm the connected or unconnected status of all pin pairs.

次いで、全ラットネスト表示制御部2が全未結線ピンペ
ア認識部1で認識された情報に基づいて未結線表示を行
なう。
Next, the all rat nest display control section 2 displays an unconnected pin pair based on the information recognized by the all unconnected pin pair recognition section 1.

そして、この中から未結線ピンペアを選び、指示される
と指示座標認識部3は指示点の座標位置を認識する。指
示未結線ピンペア認識部4は指示点の座標位置から未結
線ピンペアを認識する。次いで指示ラットネスト表示制
御部5は認識された未結線ピンペアのラットネストのみ
を表示する。
Then, an unconnected pin pair is selected from among these, and when instructed, the indicated coordinate recognition unit 3 recognizes the coordinate position of the indicated point. The designated unconnected pin pair recognition unit 4 recognizes unconnected pin pairs from the coordinate position of the designated point. Next, the designated rat nest display control section 5 displays only the rat nests of the recognized unconnected pin pairs.

そして、この表示を見て、未結線接続処理を対話的に行
ない、結線に成功したとき、結線認識部6は結線状況を
amする。
Then, looking at this display, the unconnected connection process is performed interactively, and when the connection is successful, the connection recognition section 6 checks the connection status.

指示ラットネスト非表示l!lII御部7は結線が認識
された結果を反映し、該当未結線ピンペアのラットネス
ト表示を消去する。
Instructions to hide the rat nest! The II control unit 7 reflects the result of the connection recognition and erases the rat nest display of the corresponding unconnected pin pair.

次に第1図を用いて詳しく説明する。Next, a detailed explanation will be given using FIG. 1.

まず、対話配線処理に入ると、全未結線ピンベアg識部
lと全2ットネスト表示制御部2によp第1図(a)に
示されるような未結線ピンペアの全体表示がされる。
First, when entering the interactive wiring process, all unconnected pin pairs are displayed by the all unconnected pin pair identification unit 1 and the total 2 net nest display control unit 2 as shown in FIG. 1(a).

次にオペレータにより結線を希望する未結線ピンペアが
選択されるが、この例では未結線ピンペア11のA点が
指示されたとする。
Next, the operator selects an unconnected pin pair for which connection is desired, and in this example, it is assumed that point A of unconnected pin pair 11 is designated.

これによジ指示座標認識部3によりA点の座標位置が認
識され、その座標位置をもとにいずれの未結線ピンペア
が指示されたかを指示未結線ピンペアtiitm部4で
認識される。
As a result, the designated coordinate recognition section 3 recognizes the coordinate position of point A, and based on the coordinate position, the designated unconnected pin pair tiitm section 4 recognizes which unconnected pin pair has been designated.

さらに、この認識結果により、指示ラットネスト表示制
御部5は該当する未結線ピンペアA−Bのみを(blに
示されるようにCRT画面上に表示する。
Further, based on this recognition result, the instruction rat nest display control section 5 displays only the corresponding unconnected pin pair A-B on the CRT screen (as shown in bl).

その後、(b)の表示状態のまl、注目している未結線
ピンペア110対話配線処理で配線に成功すると、結線
認識部6がその状態を認識する。
Thereafter, in the display state of (b), when the unconnected pin pair 110 of interest is successfully wired in the interactive wiring process, the wire connection recognition unit 6 recognizes the state.

そして指示ラットネスト非表示制御部7により該当未結
線ピンペア11のラットネスト表示が消去され、再び残
りの未結線ピンペアについて第1図(a)で示される全
体表示に戻る。
Then, the designated rat nest hiding control section 7 erases the rat nest display of the corresponding unconnected pin pair 11, and returns to the overall display shown in FIG. 1(a) for the remaining unconnected pin pairs.

以上の作業を全未結線ピンペアについて繰り返し行なう
ことによジ作業は完了する。
This work is completed by repeating the above work for all unconnected pin pairs.

(発明の効果) 以上、説明したように本発明方式は対話配線処理時に於
ける未結線ピンペアのラットネスト表示を常時、全体表
示するのではなく、未結線ピンペアが選択された場合、
該量の未結線ピンペアのラットネスト表示のみを行なう
ように構成されているので、対話配線処理の効′4を大
幅に向上させることができるという効果がある。
(Effects of the Invention) As explained above, the method of the present invention does not always display the entire rat nest display of unconnected pin pairs during interactive wiring processing, but when an unconnected pin pair is selected,
Since it is configured to display only the rat nest display of the unconnected pin pairs of this amount, there is an effect that the efficiency of the interactive wiring processing can be greatly improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による未結線表示方式を適用したCRT
画面の実施例を示す図で、同図(a)は未結線ピンペア
(ラットネスト)全体表示を。 同図(b)は選択未結線ピンペア(ラットネスト)表示
をそれぞれ示している。 第2図は本発明による未結線表示方式の実施例を示すブ
ロック図である。 1・・・全未結線ピンペアi!識部 2・・・全ラットネスト表示制御部 3・・・指示座標認m部 4・・・指示未結線ピンペア認識部 5・・・指示ラットネスト表示制御部 6・・・結線認識部
Figure 1 shows a CRT to which the unconnected display method according to the present invention is applied.
This is a diagram showing an example of the screen, where (a) shows the entire unconnected pin pair (rat nest). FIG. 6B shows a selected unconnected pin pair (rat nest) display. FIG. 2 is a block diagram showing an embodiment of the unconnected line display method according to the present invention. 1...All unconnected pin pairs i! Identification section 2...All rat nest display control section 3...Instruction coordinate recognition m section 4...Instruction unconnected pin pair recognition section 5...Instruction rat nest display control section 6...Connection recognition section

Claims (1)

【特許請求の範囲】[Claims]  LSIおよびプリント板の結線状態を表示する方式に
おいて、全体のピンペアの結線または未結線状態を認識
する全未結線ピンペア認識部と、前記全未結線ピンペア
認識部で認識された情報に基づいて表示部に未結線表示
を行なう全ラット表示制御部と、選択された未結線ピン
ペアの指示点の座標位置を認識する指示座標認識部と、
前記指示点の座標位置から未結線ピンペアを認識する指
示結線ピンペア認識部と、前記認識された未結線ピンペ
アのラットネストのみを表示部に表示する指示ラットネ
スト表示制御部と、前記未配線接続処理を対話的に行つ
た結果、結線に成功したとき、結線状況を認識する結線
認識部と、前記結線が認識された結果を表示部のラット
ネスト表示に反映し、該当未結線ピンペアを表示部から
消去する指示ラットネスト非表示制御部とから構成し、
指示された未結線ピンペアのみラットネスト表示するよ
うにしたことを特徴とする未結線表示方式。
In a method for displaying the connection status of an LSI and a printed circuit board, an all-unconnected pin-pair recognition unit that recognizes the connected or unconnected status of all pin pairs, and a display unit based on information recognized by the all-unconnected pin-pair recognition unit. an all-lat display control unit that displays unconnected pins; a designated coordinate recognition unit that recognizes the coordinate position of the designated point of the selected unconnected pin pair;
an instruction connected pin pair recognition unit that recognizes an unconnected pin pair from the coordinate position of the instruction point; an instruction rat nest display control unit that displays only a rat nest of the recognized unconnected pin pairs on a display unit; and the unwired connection processing. As a result of performing this interactively, when the connection is successful, the connection recognition section recognizes the connection status, reflects the connection recognition result on the rat nest display on the display section, and displays the corresponding unconnected pin pair from the display section. Consists of a rat nest hiding control unit with instructions to erase,
An unconnected pin display method characterized in that only designated unconnected pin pairs are displayed in a rat nest.
JP1284423A 1989-10-31 1989-10-31 Unconnected display method Expired - Lifetime JP2861136B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1284423A JP2861136B2 (en) 1989-10-31 1989-10-31 Unconnected display method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1284423A JP2861136B2 (en) 1989-10-31 1989-10-31 Unconnected display method

Publications (2)

Publication Number Publication Date
JPH03144858A true JPH03144858A (en) 1991-06-20
JP2861136B2 JP2861136B2 (en) 1999-02-24

Family

ID=17678366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1284423A Expired - Lifetime JP2861136B2 (en) 1989-10-31 1989-10-31 Unconnected display method

Country Status (1)

Country Link
JP (1) JP2861136B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06180730A (en) * 1992-12-14 1994-06-28 Nec Corp Circuit design supporting system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06180730A (en) * 1992-12-14 1994-06-28 Nec Corp Circuit design supporting system

Also Published As

Publication number Publication date
JP2861136B2 (en) 1999-02-24

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