JPH03143007A - Frequency equalization circuit - Google Patents

Frequency equalization circuit

Info

Publication number
JPH03143007A
JPH03143007A JP1279677A JP27967789A JPH03143007A JP H03143007 A JPH03143007 A JP H03143007A JP 1279677 A JP1279677 A JP 1279677A JP 27967789 A JP27967789 A JP 27967789A JP H03143007 A JPH03143007 A JP H03143007A
Authority
JP
Japan
Prior art keywords
frequency
signal
resistor
amplifier
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1279677A
Other languages
Japanese (ja)
Other versions
JPH0738552B2 (en
Inventor
Tatsuya Nishizawa
西沢 辰哉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kenwood KK
Original Assignee
Kenwood KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kenwood KK filed Critical Kenwood KK
Priority to JP1279677A priority Critical patent/JPH0738552B2/en
Publication of JPH03143007A publication Critical patent/JPH03143007A/en
Publication of JPH0738552B2 publication Critical patent/JPH0738552B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)

Abstract

PURPOSE:To attain more accurate frequency equalization by connecting a resonance circuit directly to a signal source and adjusting the frequency characteristic of a series resonance circuit near the resonance frequency based on an original signal and a signal resulting from the signal given to the said series resonance circuit After impedance conversion through a buffer amplifier. CONSTITUTION:A signal source P connects to a noninverting input of an amplifier G1 via a resistor R1 and also connects to other terminal of a series resonance circuit comprising a capacitor C1 connecting to ground through a coil L1 and connecting to a resistor R4 in series./A connecting point between the resistor R4 and the capacitor C1 connects to a buffer amplifier G2 applying impedance conversion to a signal coming from the connecting point, and the frequency characteristic of the series resonance circuit around its resonance frequency is adjusted based on an output of the buffer amplifier G2 and a signal from the signal source. Thus, the frequency equalizing circuit whose Q characteristic is constant is realized and accurate frequency equalization is implemented.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は周波数等化回路に関し、特にQ特性を改善し
た周波数等化回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a frequency equalization circuit, and particularly to a frequency equalization circuit with improved Q characteristics.

(従来の技術) 周波数特性を所望特性に調節する周波数等化回路は、信
号伝送路の周波数特性変化を袖償するために広く使用さ
れている。また、この周波数等化回路は、オーディオ機
器の出力音声をユーザーの希望する音質に変化させるた
めの、いわゆるグラフィックイコライザとしても用いら
れている。
(Prior Art) Frequency equalization circuits that adjust frequency characteristics to desired characteristics are widely used to compensate for changes in frequency characteristics of signal transmission paths. Further, this frequency equalization circuit is also used as a so-called graphic equalizer for changing the sound quality output from an audio device to the sound quality desired by the user.

従来、グラフィックイコライザとして使われる周波数等
化回路は、全可聴周波数帯域の所定帯域を複数に分割し
、各分割領域に対応してLC共振回路を設け、各LC共
振回路の周波数特性く振幅特性〉を回路定数を変化させ
ることにより制御し、全体の周波数特性を調整している
Conventionally, a frequency equalization circuit used as a graphic equalizer divides a predetermined band of the entire audible frequency band into a plurality of regions, provides an LC resonant circuit corresponding to each divided region, and calculates the frequency characteristics and amplitude characteristics of each LC resonant circuit. is controlled by changing circuit constants to adjust the overall frequency characteristics.

第4図には、特定帯域(上記の分割領域)の周波数特性
を変化させる周波数等化回路の一例が示されている。
FIG. 4 shows an example of a frequency equalization circuit that changes the frequency characteristics of a specific band (the above-mentioned divided area).

第4図において、信号源Pからの信号は抵抗R41を通
して演算増幅器G、の非反転入力に供給される。演算増
幅器G、の反転入力には、増幅器G、の出力が抵抗R4
2を介して帰還接続されている。また、可変抵抗R43
が直列に接続され、コンデンサC41およびコイルL4
1から成り、一端が接地されているLC共振回路は、ス
イッチS4の動作を介して端子T、とT2のいずれかに
接続される。端子T、は抵抗R4,と増幅器G1の非反
転入力との接続点に接続され、端子T、は増幅器G。
In FIG. 4, the signal from signal source P is applied to the non-inverting input of operational amplifier G through resistor R41. The output of the amplifier G is connected to the inverting input of the operational amplifier G, through the resistor R4.
A return connection is made via 2. In addition, variable resistor R43
are connected in series, capacitor C41 and coil L4
1, one end of which is grounded, is connected to either terminal T or T2 through the operation of switch S4. Terminal T is connected to the connection point between resistor R4 and the non-inverting input of amplifier G1;

の反転入力に接続されている。スイッチS4により共振
回路が端子T1に接続されると、増幅器G1への入力は
、抵抗R6と可変抵抗Roとの分圧によって小さくなり
、増幅器G1は減衰特性をもつ、一方、スイッチSを端
子T、と接続すると、増幅器G、は増幅特性をもつ、こ
の減衰量、増幅量は、共振回路に直列に接続された可変
抵抗器R4,の可変量゛によって定まる。
connected to the inverting input of When the resonant circuit is connected to the terminal T1 by the switch S4, the input to the amplifier G1 is reduced by the voltage division between the resistor R6 and the variable resistor Ro, and the amplifier G1 has an attenuation characteristic, while the switch S is connected to the terminal T1. , the amplifier G has amplification characteristics.The amount of attenuation and the amount of amplification are determined by the variable amount of the variable resistor R4 connected in series with the resonant circuit.

従来の周波数等化回路は、第4図に示す回路を各分割帯
域毎に設け、その回路の増幅量、減衰量を可変抵抗R4
,の抵抗値を変化することにより変化させ、全周波数帯
域特性を調整している。
In the conventional frequency equalization circuit, the circuit shown in FIG.
, to adjust the overall frequency band characteristics.

(発明が解決しようとする課題〉 第4図に示すような従来の周波数等化回路の周波数特性
が第5図に示されている。
(Problems to be Solved by the Invention) The frequency characteristics of the conventional frequency equalization circuit as shown in FIG. 4 are shown in FIG.

第5図において、共振周波数f0はIKHzであり、縦
軸はレベルを示す。
In FIG. 5, the resonant frequency f0 is IKHz, and the vertical axis indicates the level.

第5図から理解されるように、従来の周波数等化回路の
周波数特性のQ特性は、増幅器G、の出力レベルが低下
するにつれて低下している。
As understood from FIG. 5, the Q characteristic of the frequency characteristic of the conventional frequency equalization circuit decreases as the output level of the amplifier G decreases.

したがって、周波数のずれに対するレベル変化が少なく
なるため、オーディオ装置のように可聴周波数帯域を多
くの分割帯域領1!!I!(通常5〜14分割)に分割
した場合には、隣接する分割帯域の特性間の差異が少な
くなり、帯域分割の意義が薄れてくるばかりでなく、所
望の周波数特性が得難くなるという問題があった。
Therefore, level changes due to frequency deviations are reduced, so the audible frequency band can be divided into many subband areas like an audio device! ! I! (usually 5 to 14), the difference between the characteristics of adjacent divided bands decreases, which not only reduces the significance of band division, but also makes it difficult to obtain the desired frequency characteristics. there were.

そこで、この発明の目的は、Q特性が一定な周波数等化
回路を提供することにある。
Therefore, an object of the present invention is to provide a frequency equalization circuit with a constant Q characteristic.

(課題を解決するための手段) 前述の課題を解決するため、この発明による周波数等化
回路は、抵抗を介して信号源に接続された直列共振回路
と、前記直列共振回路と抵抗との接続点からの信号をイ
ンピーダンス変換するMWI増幅器とを備え、このM街
増幅器の出力と前記信号源からの信号とに基づいて前記
直列共振回路の共振周波数の共振周波数を中心とする周
波数特性を調整する。
(Means for Solving the Problems) In order to solve the above problems, a frequency equalization circuit according to the present invention includes a series resonant circuit connected to a signal source via a resistor, and a connection between the series resonant circuit and the resistor. and an MWI amplifier that impedance converts a signal from a point, and adjusts a frequency characteristic centering on the resonant frequency of the series resonant circuit based on the output of the M-town amplifier and the signal from the signal source. .

(実施例) 次に、この発明について図面を参照しながら詳細に説明
する。
(Example) Next, the present invention will be described in detail with reference to the drawings.

第1図は、この発明による周波数等化回路の一実施例を
示す回路図である。
FIG. 1 is a circuit diagram showing an embodiment of a frequency equalization circuit according to the present invention.

信号源Pは、第4図の従来回路と同様に、抵抗R1を介
して増幅器G1の非反転入力に接続されている。信号源
Pは、また、抵抗R4が直列に接続され、一端が接地さ
れているコンデンサC口とコイルL、の直列共振回路の
他端と接続されている。抵抗R4とコンデンサC2の接
続点は、増幅器G、の非反転入力に接続されている。増
幅器G、の出力は、抵抗R2を介して増幅器Glの反転
入力に接続されている。高入力インピーダンス緩衝増幅
器G2の出力は高入力インピーダンス緩衝増幅器G2の
反転入力に接続されるとともに、可変抵抗R1を通して
スイッチS、に接続されている。この可変抵抗R3は、
スイッチS、の動作により端子T1とT、に切り換え接
続される。
Signal source P is connected to the non-inverting input of amplifier G1 via resistor R1, similar to the conventional circuit of FIG. The signal source P is also connected to the other end of a series resonant circuit consisting of a capacitor C port and a coil L, in which a resistor R4 is connected in series and one end is grounded. The connection point between resistor R4 and capacitor C2 is connected to the non-inverting input of amplifier G. The output of amplifier G is connected via a resistor R2 to the inverting input of amplifier Gl. The output of the high input impedance buffer amplifier G2 is connected to the inverting input of the high input impedance buffer amplifier G2, and is also connected to the switch S through a variable resistor R1. This variable resistance R3 is
The terminals T1 and T are switched and connected by the operation of the switch S.

スイッチS、が端子T、と接続されているときには、増
幅器G、から減衰度R1/ (R1+R4)の減衰出力
が得られ、スイッチSが端子T、に接続されているとき
には、増幅器G1から増幅度(R2+R,)/Rsの増
幅出力が得られる。この減衰、増幅度は可変抵抗R3の
抵抗値により定まる。
When switch S is connected to terminal T, an attenuated output with attenuation R1/(R1+R4) is obtained from amplifier G, and when switch S is connected to terminal T, an attenuated output is obtained from amplifier G1. An amplified output of (R2+R,)/Rs is obtained. This attenuation and amplification degree are determined by the resistance value of the variable resistor R3.

信号源Pからの信号は、常時、抵抗R4、コンデンサC
2、コイルL、の直列回路に印加されており、抵抗R4
とコンデンサCIとの接続点から高入力インピーダンス
緩衝増幅器G2で低インピーダンス化されて出力される
The signal from signal source P is always connected to resistor R4 and capacitor C.
2, is applied to the series circuit of coil L, and resistor R4
The high input impedance buffer amplifier G2 lowers the impedance of the signal from the connection point between the signal and the capacitor CI, and outputs the signal.

直列共振回路の共振周波数 においては、増幅器G2の非反転入力へのLlとCIの
インピーダンスが略零となるため、信号レベルは略零、
出力も略零となり、共振周波数f0から大きく離れた周
波数では、L、とC1から成るインピーダンスは無限に
近づくため、増幅器G2の非反転入力には信号源Pから
の信号が略そのまま入力され、出力ら略信号源出力と等
しくなる。
At the resonant frequency of the series resonant circuit, the impedance of Ll and CI to the non-inverting input of amplifier G2 is approximately zero, so the signal level is approximately zero,
The output also becomes approximately zero, and at a frequency far away from the resonant frequency f0, the impedance consisting of L and C1 approaches infinity, so the signal from the signal source P is input almost as is to the non-inverting input of the amplifier G2, and the output is is approximately equal to the signal source output.

したがって、この回路は逆共振特性となり、そのQは、
Q=2πfoL+/R1で表され、入力レベルに関係せ
ずQは一定となる。
Therefore, this circuit has anti-resonant characteristics, and its Q is:
It is expressed as Q=2πfoL+/R1, and Q is constant regardless of the input level.

以上のように、この発明では、従来の周波数等化回路の
ように直列共振回路を直接信号経路に接続してレベルの
増減を行うのではなく、独立な共振回路として常時信号
を印加しておき、その電圧を緩衝増幅器を介して電圧源
としながら原信号(信号源からの信号)に加算または減
算しているので加減算のレベルを変化させても共振回路
のQは変化しない。
As described above, in this invention, unlike conventional frequency equalization circuits, the series resonant circuit is not directly connected to the signal path to increase or decrease the level, but instead is used as an independent resonant circuit to constantly apply the signal. Since the voltage is added to or subtracted from the original signal (signal from the signal source) using a buffer amplifier as a voltage source, the Q of the resonant circuit does not change even if the level of addition and subtraction is changed.

第1図に示す周波数等化回路の周波数特性が第2図に示
されている。
The frequency characteristics of the frequency equalization circuit shown in FIG. 1 are shown in FIG.

第2図からも明らかなように、Qはレベルに依存せず常
に一定値をとっている。したがって、微小レベル調整が
可能となる。
As is clear from FIG. 2, Q always takes a constant value regardless of the level. Therefore, minute level adjustment becomes possible.

この発明による周波数等化回路の他の実施例を第3図に
示す。
Another embodiment of the frequency equalization circuit according to the present invention is shown in FIG.

第3図の実施例は、第1図の実施例のコイルL、の代わ
りに、集積化に有利な半導体インダクタを用いている点
に特徴がある。
The embodiment of FIG. 3 is characterized in that a semiconductor inductor, which is advantageous for integration, is used instead of the coil L of the embodiment of FIG. 1.

第3図において、抵抗R12、Ri6、コンデンサC1
2および増幅器G、から戒る半導体インダクタが、第1
図のコイルL、の代わりに設けられている。図中、抵抗
R3,とR,2はそれぞれ抵抗R,とR2に対応する。
In Fig. 3, resistor R12, Ri6, capacitor C1
2 and amplifier G, a semiconductor inductor is connected to the first
It is provided in place of the coil L shown in the figure. In the figure, resistors R3 and R,2 correspond to resistors R and R2, respectively.

可変抵抗R1は第1図の抵抗R1に対応するが、スイッ
チSによる切り換えは行われない。
Variable resistor R1 corresponds to resistor R1 in FIG. 1, but is not switched by switch S.

(発明の効果) 以上説明したように、この発明では、信号源に直接共振
回路が接続され、この直列jl:振回路への信号を緩衝
増幅器を通してインピーダンス変換して得られる信号と
、原信号に基づいて直列共振回路の共振周波数近傍につ
いての周波数特性を調整しているので、共振回路のQを
一定に維持でき、より微小なレベル変化でもQは変化せ
ず、より精密な周波数等化が可能となる。
(Effects of the Invention) As explained above, in the present invention, a resonant circuit is directly connected to a signal source, and a signal obtained by impedance conversion of the signal to this series jl: resonant circuit through a buffer amplifier and an original signal. Since the frequency characteristics near the resonant frequency of the series resonant circuit are adjusted based on this, the Q of the resonant circuit can be maintained constant, and the Q does not change even with minute level changes, allowing more precise frequency equalization. becomes.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この発明による周波数等化回路の一実施例を
示す回路図、第2図は第1図示す回路の共振特性を示す
図、第3図は、この発明による周波数等化回路の他の実
施例を示す回路図、第4図は従来の周波数等化回路図、
第5図は第4図に示す従来回路の共振特性を示す図であ
る。
FIG. 1 is a circuit diagram showing an embodiment of the frequency equalization circuit according to the present invention, FIG. 2 is a diagram showing the resonance characteristics of the circuit shown in FIG. 1, and FIG. 3 is a circuit diagram showing an embodiment of the frequency equalization circuit according to the invention. A circuit diagram showing another embodiment, FIG. 4 is a conventional frequency equalization circuit diagram,
FIG. 5 is a diagram showing the resonance characteristics of the conventional circuit shown in FIG. 4.

Claims (1)

【特許請求の範囲】[Claims] 抵抗を介して信号源に接続された直列共振回路と、前記
直列共振回路と抵抗との接続点からの信号をインピーダ
ンス変換する緩衝増幅器とを備え、この緩衝増幅器の出
力と前記信号源からの信号とに基づいて前記直列共振回
路の共振周波数の共振周波数を中心とする周波数特性を
調整することを特徴とする周波数等化回路。
It includes a series resonant circuit connected to a signal source via a resistor, and a buffer amplifier that converts the impedance of a signal from a connection point between the series resonant circuit and the resistor, and the output of the buffer amplifier and the signal from the signal source. A frequency equalization circuit that adjusts a frequency characteristic centering on the resonance frequency of the series resonant circuit based on.
JP1279677A 1989-10-30 1989-10-30 Frequency equalization circuit Expired - Lifetime JPH0738552B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1279677A JPH0738552B2 (en) 1989-10-30 1989-10-30 Frequency equalization circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1279677A JPH0738552B2 (en) 1989-10-30 1989-10-30 Frequency equalization circuit

Publications (2)

Publication Number Publication Date
JPH03143007A true JPH03143007A (en) 1991-06-18
JPH0738552B2 JPH0738552B2 (en) 1995-04-26

Family

ID=17614330

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1279677A Expired - Lifetime JPH0738552B2 (en) 1989-10-30 1989-10-30 Frequency equalization circuit

Country Status (1)

Country Link
JP (1) JPH0738552B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006261809A (en) * 2005-03-15 2006-09-28 Fujitsu Ten Ltd Tone quality adjustment apparatus and tone quality adjustment method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006261809A (en) * 2005-03-15 2006-09-28 Fujitsu Ten Ltd Tone quality adjustment apparatus and tone quality adjustment method
JP4560429B2 (en) * 2005-03-15 2010-10-13 富士通テン株式会社 SOUND QUALITY ADJUSTING DEVICE AND SOUND QUALITY ADJUSTING METHOD

Also Published As

Publication number Publication date
JPH0738552B2 (en) 1995-04-26

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