JPH0261825B2 - - Google Patents

Info

Publication number
JPH0261825B2
JPH0261825B2 JP6097780A JP6097780A JPH0261825B2 JP H0261825 B2 JPH0261825 B2 JP H0261825B2 JP 6097780 A JP6097780 A JP 6097780A JP 6097780 A JP6097780 A JP 6097780A JP H0261825 B2 JPH0261825 B2 JP H0261825B2
Authority
JP
Japan
Prior art keywords
stereo
signal
demodulation
gain
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6097780A
Other languages
Japanese (ja)
Other versions
JPS56157149A (en
Inventor
Masahiko Sonoda
Junichi Hikita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP6097780A priority Critical patent/JPS56157149A/en
Publication of JPS56157149A publication Critical patent/JPS56157149A/en
Publication of JPH0261825B2 publication Critical patent/JPH0261825B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/1646Circuits adapted for the reception of stereophonic signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H04H40/63Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for separation improvements or adjustments

Description

【発明の詳細な説明】 この発明はステレオ復調装置に係り、特にその
ステレオセパレーシヨン調整に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a stereo demodulator, and particularly to stereo separation adjustment thereof.

一般にFMチユーナーのFM検波回路から出力
される検波出力において、高域成分であるサブ信
号成分がFM検波回路の位相特性のためメイン信
号成分より減衰し、このためステレオ復調回路に
おいてステレオセパレーシヨンが悪化することが
知られている。
Generally, in the detection output output from the FM detection circuit of an FM tuner, the sub signal component, which is a high frequency component, is attenuated from the main signal component due to the phase characteristics of the FM detection circuit, resulting in poor stereo separation in the stereo demodulation circuit. It is known to do.

従来、ステレオセパレーシヨンの悪化を補正す
るため、ステレオ復調回路において、サブ信号及
びメイン信号のゲイン調整が行われている。第1
図はこのゲイン調整方式を用いたステレオマレチ
プレツクス復調回路のステレオデコーダである。
このステレオデコーダ2はトランジスタ4,6,
8,10,12,14,16,18,20,2
2,24,26、抵抗28,30、可変抵抗32
及び定電流源34で構成されている。トランジス
タ12,14,16,18の各ベースにはステレ
オスイツチ回路36より19KHzのスイツチング信
号が与えられ、トランジスタ20,22,24,
26のベースには増幅器38よりステレオ検波出
力が与えられる。電源端子40は電源Vccに接続
され、R信号出力端子42及びL信号出力端子4
4からそれぞれ右信号及び左信号が取りだされ
る。端子46はステレオセパレーシヨン調整用の
端子で、この端子46に接続された可変抵抗32
はメイン信号ゲインの調整のために付加される。
このように構成されたステレオデコーダ2を含む
ステレオ復調回路において、端子46に外付けさ
れた可変抵抗32を除いて各端子4……34は半
導体集積回路(IC)で構成されており、ステレ
オセパレーシヨン調整のための、メイン信号ゲイ
ン調整はIC内部のモノリシツク抵抗である抵抗
28,30と、IC外部の可変抵抗32との異種
の特性を持つ抵抗の抵抗比で行うこととしてい
る。このため、ICの特性不均一による抵抗28,
30の値のバラツキからサブ信号及びメイン信号
のゲイン調整が取りにくく、このゲイン調整方式
ステレオ復調回路には安定したセパレーシヨンが
得られない欠点がある。
Conventionally, in order to correct deterioration of stereo separation, gain adjustment of a sub signal and a main signal is performed in a stereo demodulation circuit. 1st
The figure shows a stereo decoder of a stereo multiplex demodulation circuit using this gain adjustment method.
This stereo decoder 2 includes transistors 4, 6,
8, 10, 12, 14, 16, 18, 20, 2
2, 24, 26, resistance 28, 30, variable resistance 32
and a constant current source 34. A 19KHz switching signal is applied from the stereo switch circuit 36 to the bases of the transistors 12, 14, 16, and 18, and the transistors 20, 22, 24, and
A stereo detection output is given to the base of 26 from an amplifier 38. The power supply terminal 40 is connected to the power supply Vcc, and the R signal output terminal 42 and the L signal output terminal 4
A right signal and a left signal are respectively taken out from 4. The terminal 46 is a terminal for adjusting stereo separation, and the variable resistor 32 connected to this terminal 46
is added to adjust the main signal gain.
In the stereo demodulation circuit including the stereo decoder 2 configured as described above, each terminal 4...34 is configured with a semiconductor integrated circuit (IC) except for the variable resistor 32 externally attached to the terminal 46. The main signal gain adjustment for the main signal gain adjustment is performed by adjusting the resistance ratio of resistors 28 and 30, which are monolithic resistors inside the IC, and a variable resistor 32 outside the IC, which have different characteristics. For this reason, the resistance 28 due to non-uniform characteristics of the IC,
It is difficult to adjust the gain of the sub signal and the main signal due to the variation in the value of 30, and this gain adjustment type stereo demodulation circuit has the disadvantage that stable separation cannot be obtained.

また、従来、他の方法にはステレオ復調回路の
入力信号の高域補正を行う方式がある。第2図は
この方式を示し、FM検波回路48ステレオ復調
回路50との間に抵抗52及びコンデンサ54か
ら構成される高域フイルタ56を挿入して高域補
正を行い、高域成分であるサブ信号成分の減衰を
補償している。この方式によれば、理論上はサブ
信号成分の減衰補償ができる反面、低域信号ゲイ
ンが外付けの抵抗52とステレオ復調回路50の
入力インピーダンスとの比で決定されるが、抵抗
52は比較的抵抗値が高いため、抵抗52を調整
して高域フイルタの特性を可変し、ステレオセパ
レーシヨンを調整しようとするとステレオ復調回
路の入力レベルが変化してしまい、結局安定なス
テレオセパレーシヨンを得ることができない。
Furthermore, conventionally, there is a method of performing high frequency correction on the input signal of the stereo demodulation circuit. FIG. 2 shows this method, in which a high-frequency filter 56 consisting of a resistor 52 and a capacitor 54 is inserted between the FM detection circuit 48 and the stereo demodulation circuit 50 to perform high-frequency correction. Compensates for attenuation of signal components. According to this method, while theoretically it is possible to compensate for the attenuation of sub-signal components, the low-frequency signal gain is determined by the ratio of the external resistor 52 and the input impedance of the stereo demodulation circuit 50; If you try to adjust the stereo separation by adjusting the resistor 52 to vary the characteristics of the high-pass filter, the input level of the stereo demodulation circuit will change, and in the end you will not be able to achieve stable stereo separation. I can't.

この発明は簡易な調整により良好なステレオセ
パレーシヨンを得ることができるステレオ復調装
置を提供することを目的とし、ステレオ復調回路
のサブ信号復調ゲイン及びメイン信号復調ゲイン
は一定ゲインに設定しておき、その前段に設けた
ローパスフイルタの時定数を可変するようにした
ことを特徴とするものである。
An object of the present invention is to provide a stereo demodulation device that can obtain good stereo separation through simple adjustment, and the sub-signal demodulation gain and main signal demodulation gain of the stereo demodulation circuit are set to constant gains. This is characterized in that the time constant of the low-pass filter provided in the preceding stage is variable.

以下、この発明を図面に示した実施例について
説明する。
Embodiments of the present invention shown in the drawings will be described below.

第3図はこの発明のステレオ復調装置の好適な
実施例を示している。図において、入力端子60
には図示しない中間周波増幅回路から中間周波出
力が入力され、FM検波回路62の検波出力はロ
ーパスフイルタ64を介してステレオ復調回路6
6に入力される。このステレオ復調回路66にお
いて、復調により得られた右信号及び左信号は右
信号出力端子68R及び左信号出力端子68Lか
ら個別に出力される。
FIG. 3 shows a preferred embodiment of the stereo demodulator of the present invention. In the figure, input terminal 60
An intermediate frequency output is input from an intermediate frequency amplifier circuit (not shown), and the detection output of the FM detection circuit 62 is sent to the stereo demodulation circuit 6 via a low-pass filter 64.
6 is input. In this stereo demodulation circuit 66, the right signal and left signal obtained by demodulation are individually output from a right signal output terminal 68R and a left signal output terminal 68L.

ローパスフイルタ64はFM検波出力の高域位
相に補正を施してステレオ復調出力のステレオセ
パレーシヨンを良好にするために挿入されたもの
である。この実施例の場合、ローパスフイルタ6
4は可変抵抗70及びコンデンサ72で構成さ
れ、ローパスフイルタ64が持つ時定数は可変抵
抗70の値で設定される。即ち、可変抵抗70に
よる時定数の変更で、ステレオセパレーシヨンが
最高状態に設定されるように構成されている。
The low-pass filter 64 is inserted to correct the high-frequency phase of the FM detection output and improve the stereo separation of the stereo demodulation output. In this embodiment, the low pass filter 6
4 is composed of a variable resistor 70 and a capacitor 72, and the time constant of the low-pass filter 64 is set by the value of the variable resistor 70. That is, by changing the time constant using the variable resistor 70, the stereo separation is set to the highest state.

ステレオ復調回路66は半導体集積回路(IC)
で構成され、メイン信号復調ゲイン及びサブ信号
復調ゲインはICの内部における構成素子のみで
一定値に設定されている。第4図はステレオ復調
回路66に含まれるステレオデコーダ74の具体
的回路図を示している。このステレオデコーダ7
4はトランジスタ76,78,80,82,8
4,86,88,90,92,94,96,9
8、抵抗100,102,104及び定電流源1
06で構成されている。トランジスタ76……9
8及び定電流源106については、第1図に示す
デコーダ2と同様の構成であり、トランジスタ8
4,86,88,90のベースにはステレオスイ
ツチ回路36から19KHzのスイツチング信号が与
えられ、またトランジスタ92,94,96,9
8のベースには増幅器38を介してFM検波回路
62のFM検波出力ローパスフイルタ64より入
力されている。電源端子108は電源Vccに接続
され、右信号出力端子68R及び左信号出力端子
68Lは第3図中のそれに対応するものである。
このように構成されるステレオデコーダ74にお
いて、抵抗100,102,104は集積回路上
の構成素子であるモノリシツク抵抗で構成され、
メイン信号復調ゲインが抵抗100で、サブ信号
復調ゲインが抵抗102,104でそれぞれ一定
値に設定されている。各設定値の大小関係につい
ては、サブ信号復調ゲインが、メイン信号復調ゲ
インより大きい値とされている。即ち、ステレオ
復調回路66の入力に正規の配分位相のステレオ
信号が印加される場合、復調出力に最高のステレ
オセパレーシヨンが得られるメイン信号復調ゲイ
ンGmとサブ信号復調ゲインGsの比率を基準にし
てメイン信号復調ゲインGmを設定し、一方サブ
信号復調ゲインの設定値Gsoは前記ゲインGsより
大きい値(Gso>Gs)に設定されている。最高の
ステレオセパレーシヨンが得られるのはメイン信
号レベルとサブ信号レベルが同一の場合である。
従つて、理論的にはそれぞれのゲインはGm及び
Gsに設定すれば十分であるが、実際には製造上
のバラツキ等で設定値どおりのゲインを得ること
は困難である。そこで、本発明はサブ信号復調ゲ
インの設定値をGsではなくGsoに設定し、かつサ
ブ信号を減衰しうる時定数調整可能なローパスフ
イルタを用いてサブ信号レベルとメイン信号レベ
ルを同一にするものである。
The stereo demodulation circuit 66 is a semiconductor integrated circuit (IC)
The main signal demodulation gain and the sub signal demodulation gain are set to constant values only by the constituent elements inside the IC. FIG. 4 shows a specific circuit diagram of the stereo decoder 74 included in the stereo demodulation circuit 66. This stereo decoder 7
4 is transistor 76, 78, 80, 82, 8
4,86,88,90,92,94,96,9
8. Resistors 100, 102, 104 and constant current source 1
It consists of 06. Transistor 76...9
8 and the constant current source 106 have the same configuration as the decoder 2 shown in FIG.
4, 86, 88, and 90 are supplied with a 19KHz switching signal from the stereo switch circuit 36, and transistors 92, 94, 96, and 9
The FM detection output low-pass filter 64 of the FM detection circuit 62 is input to the base of the FM detection circuit 62 via the amplifier 38. The power supply terminal 108 is connected to the power supply Vcc, and the right signal output terminal 68R and left signal output terminal 68L correspond to those shown in FIG.
In the stereo decoder 74 configured in this way, the resistors 100, 102, and 104 are composed of monolithic resistors that are components on an integrated circuit.
The main signal demodulation gain is set to a constant value by a resistor 100, and the sub signal demodulation gain is set to a constant value by resistors 102 and 104, respectively. Regarding the magnitude relationship of each setting value, the sub signal demodulation gain is set to be a larger value than the main signal demodulation gain. That is, when a stereo signal with a normal distributed phase is applied to the input of the stereo demodulation circuit 66, the ratio between the main signal demodulation gain Gm and the sub signal demodulation gain Gs that provides the best stereo separation in the demodulated output is used as a reference. A main signal demodulation gain Gm is set, and a set value Gso of the sub signal demodulation gain is set to a value larger than the gain Gs (Gso>Gs). The best stereo separation is obtained when the main signal level and sub signal level are the same.
Therefore, theoretically, the respective gains are Gm and
It is sufficient to set it to Gs, but in reality it is difficult to obtain the same gain as the set value due to variations in manufacturing. Therefore, the present invention sets the sub signal demodulation gain setting value to Gso instead of Gs, and makes the sub signal level and main signal level the same by using a low pass filter with an adjustable time constant that can attenuate the sub signal. It is.

なお、ローパスフイルタのカツトオフ周波数は
オーデイオ周波数に影響せずサブ信号を減衰でき
る周波数であればよく種々な値が設定可能である
が、たとえば20KHzは好適なカツトオフ周波数の
1つである。
Note that the cutoff frequency of the low-pass filter can be set to various values as long as it can attenuate the sub-signal without affecting the audio frequency; for example, 20 KHz is one of the suitable cutoff frequencies.

以上のように構成したので、サブ信号復調ゲイ
ンの補正は、IC内部のモノリシツク抵抗である
抵抗100,102,104によつて一定値とし
ているため、バラツキが少なく安定である。一
方、FM検波出力の位相補正はローパスフイルタ
64で行つている。ローパスフイルタ64を構成
する抵抗70の抵抗値Rは、ステレオ復調回路の
入力インピーダンスZin比較して十分小さく設定
できるため、抵抗70を調整して位相補正を行つ
てもステレオ復調回路66の入力レベルが大きく
変化することがない。従つて、FM検波出力の位
相補正を可変抵抗70の調整のみによつて行うこ
とができる。
With the above configuration, the sub-signal demodulation gain is corrected to a constant value by the monolithic resistors 100, 102, and 104 inside the IC, so it is stable with little variation. On the other hand, phase correction of the FM detection output is performed by a low-pass filter 64. The resistance value R of the resistor 70 constituting the low-pass filter 64 can be set sufficiently small compared to the input impedance Zin of the stereo demodulation circuit, so even if the resistor 70 is adjusted and phase correction is performed, the input level of the stereo demodulation circuit 66 remains unchanged. It doesn't change much. Therefore, phase correction of the FM detection output can be performed only by adjusting the variable resistor 70.

以上説明したように、この発明によればサブ信
号復調ゲインと、メイン信号復調ゲインの補正は
ステレオ復調回路のサブ信号復調ゲインをメイン
信号復調ゲインより高い値とすることにより補正
し、FM検波出力の位相補正はローパスフイルタ
の時定数を調整することによつて補正することと
したため、復調ゲインの補正と位相補正を互いに
影響を与えることなく補正することができ、従つ
て安定したステレオセパレーシヨンを維持できる
と共に、簡易な調整で良好なステレオセパレーシ
ヨンを得ることができる。
As explained above, according to the present invention, the sub signal demodulation gain and the main signal demodulation gain are corrected by setting the sub signal demodulation gain of the stereo demodulation circuit to a higher value than the main signal demodulation gain, and the FM detection output Since the phase correction was made by adjusting the time constant of the low-pass filter, the demodulation gain correction and the phase correction can be corrected without affecting each other, and therefore stable stereo separation can be achieved. It is possible to maintain good stereo separation and obtain good stereo separation with simple adjustment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のステレオ復調回路のデコーダ
IC等価回路を示す回路図、第2図は従来のステ
レオセパレーシヨン調整装置を示すブロツク図、
第3図はこの発明のステレオ復調装置の実施例を
示すブロツク図、第4図はステレオ復調回路のデ
コーダのIC等価回路を示す回路図である。 64…ローパスフイルタ、66…ステレオ復調
回路、70…可変抵抗、72…コンデンサ、10
0,102,104…抵抗。
Figure 1 shows the decoder of a conventional stereo demodulation circuit.
A circuit diagram showing an IC equivalent circuit. Figure 2 is a block diagram showing a conventional stereo separation adjustment device.
FIG. 3 is a block diagram showing an embodiment of the stereo demodulation apparatus of the present invention, and FIG. 4 is a circuit diagram showing an IC equivalent circuit of a decoder of the stereo demodulation circuit. 64...Low pass filter, 66...Stereo demodulation circuit, 70...Variable resistor, 72...Capacitor, 10
0, 102, 104...resistance.

Claims (1)

【特許請求の範囲】[Claims] 1 サブ信号復調ゲインをメイン信号復調ゲイン
より高い値になるような一定値に設定したステレ
オ復調回路と、このステレオ復調回路に前段に設
けられた復調回路のサブ信号復調ゲインとメイン
信号復調ゲインの相違に基づき、メイン信号に対
してサブ信号を減衰しうる時定数調整可能なロー
パスフイルタとから構成したことを特徴とするス
テレオ復調装置。
1 A stereo demodulation circuit in which the sub-signal demodulation gain is set to a constant value higher than the main signal demodulation gain, and a sub-signal demodulation gain and main signal demodulation gain of the demodulation circuit installed in the preceding stage of this stereo demodulation circuit. 1. A stereo demodulator comprising: a low-pass filter with an adjustable time constant capable of attenuating a sub-signal with respect to a main signal based on the difference between the sub-signals and the main signal.
JP6097780A 1980-05-08 1980-05-08 Stereo separation control device for fm tuner Granted JPS56157149A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6097780A JPS56157149A (en) 1980-05-08 1980-05-08 Stereo separation control device for fm tuner

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6097780A JPS56157149A (en) 1980-05-08 1980-05-08 Stereo separation control device for fm tuner

Publications (2)

Publication Number Publication Date
JPS56157149A JPS56157149A (en) 1981-12-04
JPH0261825B2 true JPH0261825B2 (en) 1990-12-21

Family

ID=13157987

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6097780A Granted JPS56157149A (en) 1980-05-08 1980-05-08 Stereo separation control device for fm tuner

Country Status (1)

Country Link
JP (1) JPS56157149A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS614335A (en) * 1984-06-19 1986-01-10 Nec Corp Fm stereo demodulator
US4959859A (en) * 1988-12-15 1990-09-25 Delco Electronics Corporation FM Channel separation adjustment
JP3891896B2 (en) * 2002-07-12 2007-03-14 株式会社豊田自動織機 Separation adjustment circuit
CN103532577A (en) * 2013-10-22 2014-01-22 苏州贝克微电子有限公司 Amplitude modulation stereo receiver capable of realizing separation control

Also Published As

Publication number Publication date
JPS56157149A (en) 1981-12-04

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