JPH0314277A - Dc level difference compensation circuit - Google Patents

Dc level difference compensation circuit

Info

Publication number
JPH0314277A
JPH0314277A JP1149823A JP14982389A JPH0314277A JP H0314277 A JPH0314277 A JP H0314277A JP 1149823 A JP1149823 A JP 1149823A JP 14982389 A JP14982389 A JP 14982389A JP H0314277 A JPH0314277 A JP H0314277A
Authority
JP
Japan
Prior art keywords
level
signal
level difference
signals
calculation means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1149823A
Other languages
Japanese (ja)
Inventor
Kenji Matsuo
研志 松尾
Akira Kumada
明 久万田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP1149823A priority Critical patent/JPH0314277A/en
Publication of JPH0314277A publication Critical patent/JPH0314277A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a circuit enabling DC level difference between a plurality of signals to be compensation easily by providing specific DC signal output means, DC level difference calculation means, and DC level compensation means. CONSTITUTION:The tittle item has a plurality of DC signal output means which output the same level DC signal as each DC level Va and Vb of a plurality of signal Vi1 and Vi2, a DC level difference calculation means A3 which performs subtraction between a reference DC level reference signal E1 and the above each DC signal and then output DC level difference signal Ve, and a DC level compensation calculation means A4 which performs subtraction between each of the above plurality of signals Vi1 and Vi2 and the above DC level difference signal Ve corresponding to them and compensates each DC level Va and Va of the above plurality of signals Vi1 and Vi2. For example, it is connected to a bi-phase differential magnetic sensor. A preamplifier 1 consists of a DC level difference calculation means using the operational amplifier A3 and a DC level compensation calculation means using the operational amplifier A4.

Description

【発明の詳細な説明】 「産業上の利用分野コ この発明は、複数の信号間の直流レベル差補正回路に関
し、特に2相以」−のロークリエンコーダのプリアンプ
に有用である。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a DC level difference correction circuit between a plurality of signals, and is particularly useful for a preamplifier of a low reencoder of two or more phases.

[従来の技術] 第2図は2相ロークリエンコーダの模式図である。[Conventional technology] FIG. 2 is a schematic diagram of a two-phase low reencoder.

Gは磁性体製の検出用ギアで、Sが2相差動磁気センサ
てあり、その下部にはマグネットmが設置されている。
G is a detection gear made of a magnetic material, S is a two-phase differential magnetic sensor, and a magnet m is installed at the bottom thereof.

第3図は上記2相差動磁気センサSの構造を示すもので
あり、4個の磁気抵抗素子Mal、 Mb1Ma2. 
Mb2が所定ピッチで並べられ、磁気抵抗素子Malと
Ma2の直列回路に電圧EOが加えられ、その中点から
信号電圧Vilが導出されている。信号電圧Vilは、
検出用ギアGの回転で変動する変化分Waと検出用ギア
Gの回転と無関係の直流分Vaからなっている。また、
磁気抵抗素子MblとMb2の直列回路に電源電圧EO
が加えられ、その中点から信号電圧Vi2が導出されて
いる。信号電圧Vi2は、検出用ギアGの回転で変動す
る変化分wbと検出用ギアGの回転と無関係の直流分v
bからなっている。
FIG. 3 shows the structure of the two-phase differential magnetic sensor S, which includes four magnetoresistive elements Mal, Mb1Ma2 .
Mb2 are arranged at a predetermined pitch, a voltage EO is applied to a series circuit of magnetoresistive elements Mal and Ma2, and a signal voltage Vil is derived from the midpoint. The signal voltage Vil is
It consists of a change amount Wa that fluctuates with the rotation of the detection gear G and a direct current component Va that is unrelated to the rotation of the detection gear G. Also,
Power supply voltage EO is applied to the series circuit of magnetoresistive elements Mbl and Mb2.
is added, and the signal voltage Vi2 is derived from the midpoint. The signal voltage Vi2 includes a variation wb that fluctuates due to the rotation of the detection gear G and a DC component v that is unrelated to the rotation of the detection gear G.
It consists of b.

第4図は」1記2相差動磁気センサSに接続される従来
のプリアンプ回路51と比較器C1とを示すものである
FIG. 4 shows a conventional preamplifier circuit 51 and a comparator C1 connected to the two-phase differential magnetic sensor S described in "1".

信号電圧Vilは、抵抗R1を介してオペアンプA1の
負入力端子に入力されている。
The signal voltage Vil is input to the negative input terminal of the operational amplifier A1 via the resistor R1.

そのオペアンプΔ1の負入力端子は抵抗R2を介して出
力端子に接続され、また、正入力端子には信号電圧Vi
lの直流分Vaと合致せしめられた直流電圧が入力され
ている。そこで、オペアンプA1の出力電圧VOIは、 VO1=Wa−R2/R1+Va となり、例えば第5図(a)に実線で示すようになる。
The negative input terminal of the operational amplifier Δ1 is connected to the output terminal via the resistor R2, and the positive input terminal is connected to the signal voltage Vi.
A DC voltage matched with the DC component Va of l is input. Therefore, the output voltage VOI of the operational amplifier A1 becomes VO1=Wa-R2/R1+Va, as shown by the solid line in FIG. 5(a), for example.

もう一つの信号電圧Vi2についても同様であり、オペ
アンプA2の出力電圧VO2は、 VO2=Wb−R2/R1+Vb となり、第5図(a)に点線に示すようになる。
The same holds true for the other signal voltage Vi2, and the output voltage VO2 of the operational amplifier A2 is as follows: VO2=Wb-R2/R1+Vb, as shown by the dotted line in FIG. 5(a).

これらの出力電圧VOI、 VO2は比較器C1に入力
され、比較器C1は第5図(b)に示す如きパルス信号
Paを出力する。
These output voltages VOI and VO2 are input to a comparator C1, and the comparator C1 outputs a pulse signal Pa as shown in FIG. 5(b).

このパルス信号Paのパルス数と位相とにより回転位置
を検出することが出来る。
The rotational position can be detected based on the pulse number and phase of this pulse signal Pa.

[発明が解決しようとする課題] 第5図(a)(b)から理解されるように、出力信号V
OIとVO2の直流分Va、 Vbのバラツキによって
パルス信号Paの位相は変動する。
[Problems to be Solved by the Invention] As understood from FIGS. 5(a) and (b), the output signal V
The phase of the pulse signal Pa fluctuates due to variations in the DC components Va and Vb of OI and VO2.

そこで、磁気抵抗素子Mal〜Mb2として抵抗値の近
いものを選別して用い、直流分Vaとvbとがなるべく
一致するようにしている。
Therefore, magnetoresistive elements Mal to Mb2 having similar resistance values are selected and used so that the direct current components Va and vb match as much as possible.

しかし、このように磁気抵抗素子Mal〜Mb2を選別
するのは煩雑であり、歩留りが悪くなる問題点かある。
However, sorting out the magnetoresistive elements Mal to Mb2 in this way is complicated, and there is a problem in that the yield is reduced.

従って、この発明の目的は、複数の信号間に直流レベル
の差が存在してもこれを簡単に補正することができる直
流レベル差補正回路を提供することにある。
Therefore, an object of the present invention is to provide a DC level difference correction circuit that can easily correct even if there is a difference in DC level between a plurality of signals.

[課題を解決するための手段] この発明の直流レベル差補正回路は、複数の信号の各直
流レベルと同レベルの直流信号を出力する複数の直流信
号出力手段と、基準直流レベルの基準信号と前記各直流
信号の間で減算を行って直流レベル差信号を出力する直
流レベル差演算手段と、前記複数の信号の各々とそれら
に対応する前記直流レベル差信号の間で減算を行って前
記複数の信号の各直流レベルを補正する直流レベル補正
演算手段とを具備してなることを構成上の特徴とするも
のである。
[Means for Solving the Problems] The DC level difference correction circuit of the present invention includes a plurality of DC signal output means for outputting DC signals of the same level as each DC level of a plurality of signals, and a reference signal of a reference DC level. DC level difference calculation means that performs subtraction between each of the DC signals and outputs a DC level difference signal; and DC level difference calculation means that performs subtraction between each of the plurality of signals and the DC level difference signal corresponding thereto, The present invention is characterized in that it includes DC level correction calculation means for correcting each DC level of the signals.

」1記構成において、基準信号として複数の信号のいず
れかを用いてもよい。
In the configuration described in item 1, any one of a plurality of signals may be used as the reference signal.

[作用] この発明の直流レベル差補正回路では、直流レベル差演
算手段と直流レベル補正演算手段の2段の演算手段によ
って、複数の信号の各直流レベルを基準直流レベルに合
致せしめる。
[Operation] In the DC level difference correction circuit of the present invention, each DC level of a plurality of signals is made to match the reference DC level by the two-stage calculation means of the DC level difference calculation means and the DC level correction calculation means.

そこで、複数の信号の直流レベルの差に起因する位相の
ずれが生じないこととなる。
Therefore, a phase shift due to a difference in DC level of a plurality of signals does not occur.

[実施例] 以下、図に示す実施例に基づいてこの発明を更に詳tく
説明する。なお、これによりこの発明が限定されるもの
ではない。
[Example] Hereinafter, the present invention will be explained in more detail based on the example shown in the drawings. Note that this invention is not limited to this.

第1図は、第4図に示すプリアンプ回路51に替えて、
この発明の一実施例の直流レベル差補正回路を含むプリ
アンプ回路1を用いたものである。
In FIG. 1, instead of the preamplifier circuit 51 shown in FIG.
A preamplifier circuit 1 including a DC level difference correction circuit according to an embodiment of the present invention is used.

このプリアンプ回路1において、オペアンプA1および
オペアンプA2の機能は従来と同様である。すなわち、
オペアンプA1の出力電圧VOIは、VO1=Wa−R
2/R1+Va となり、オペアンプA2の出力電圧VO2は、VO2=
Wb−R2/R1+Vb となる。
In this preamplifier circuit 1, the functions of the operational amplifier A1 and the operational amplifier A2 are the same as in the prior art. That is,
The output voltage VOI of operational amplifier A1 is VO1=Wa-R
2/R1+Va, and the output voltage VO2 of operational amplifier A2 is VO2=
Wb-R2/R1+Vb.

一方、オペアンプA3の負入力端子には、直流電圧Va
が抵抗Rsを介して入力されている。また、そのオペア
ンプA3の負入力端子は抵抗Rfを介して出力端子に接
続されている。
On the other hand, the negative input terminal of the operational amplifier A3 has a DC voltage Va
is input via the resistor Rs. Further, the negative input terminal of the operational amplifier A3 is connected to the output terminal via a resistor Rf.

さらに、オペアンプA3の正入力端子には、直流電圧v
bと参照電圧EOの差を抵抗Rsと抵抗Rfで分圧した
電圧が入力されている。
Furthermore, the positive input terminal of operational amplifier A3 has a DC voltage v
A voltage obtained by dividing the difference between b and reference voltage EO by resistors Rs and Rf is input.

そこで、オペアンプA3の出力電圧をVeとすると、負
入力端子の電圧Vcは、 Vc=Ve−(Ve−Va)Rf/(Rf十Rs)とな
り、正入力端子の電圧Vdは、 Vd=E1−(El−Vb)Rf/(Rf+Rs)とな
るが、イマジナリ−ショー1・によりVc二Vclであ
るから、これより、 Ve=E 1+(Vb−Va)Rf/Rsとなる。ここ
で、Rf=Rsとすれば、Ve= E 1 + (Vb
 −Va)となる。
Therefore, if the output voltage of operational amplifier A3 is Ve, the voltage Vc at the negative input terminal is Vc=Ve-(Ve-Va)Rf/(Rf+Rs), and the voltage Vd at the positive input terminal is Vd=E1- (El-Vb)Rf/(Rf+Rs), but since it is Vc2Vcl according to Imaginary Show 1, from this, Ve=E1+(Vb-Va)Rf/Rs. Here, if Rf=Rs, Ve=E 1 + (Vb
-Va).

同様にして、オペアンプΔ4の出力電圧Vmは、Vm=
 E 1 + (VO2−Ve)となるが、これを変形
すれば、 Vm=Wb−R2/R1+Va となる。
Similarly, the output voltage Vm of the operational amplifier Δ4 is Vm=
E 1 + (VO2-Ve), but if this is transformed, it becomes Vm=Wb-R2/R1+Va.

そこで、比較器C1から見ると、入力される電圧VOI
とVmの直流レベルはいずれもVaで等しいから、変化
分の比較だけを行なうようになる。
Therefore, from the perspective of comparator C1, the input voltage VOI
Since the DC levels of V and Vm are both Va and equal, only the changes are compared.

かくして、信号電圧VilとVi2の間に直流レベルの
差があっても、パルス信号Paには位相のズレを生じな
いこととなる。
Thus, even if there is a difference in DC level between the signal voltages Vil and Vi2, no phase shift occurs in the pulse signal Pa.

[発明の効果] この発明の直流レベル差補正回路によれば、直流レベル
に差がある複数の信号の直流レベルを一致させて出力で
きるようになる。
[Effects of the Invention] According to the DC level difference correction circuit of the present invention, it becomes possible to match the DC levels of a plurality of signals having different DC levels and output the signals.

そこで、例えば2相以上の差動磁気センサにおいて磁気
抵抗素子の選別を行なう必要がなくなり、工数を削減で
き、歩留りを向」二できる。
Therefore, for example, in a differential magnetic sensor having two or more phases, it is no longer necessary to select the magnetoresistive elements, thereby reducing the number of man-hours and improving the yield.

また、例えばロータリーエンコーダの分解能を上げるた
めの多相化、高逓倍化が可能となる。
Further, for example, multi-phase and high multiplication are possible in order to increase the resolution of the rotary encoder.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例の直流レベル差補正回路を
含むロータリーエンコーダの検出回路の要部回路図、第
2図は2相式ロークリエンコーダの構成を示す模式図、
第3図は2相差動磁気センサの素子配置と接続を示す模
式図、第4図は従来のロータリーエンコーダの検出回路
の要部回路図、第5図(a )(b )は第5図の回路
における各部の信号波形図である。 (符号の説明) 1・・・直流レベル差補正回路を含むプリアンプ回路V
a、Vb・・・直流電圧 A3  A4・・・オペアンプ Vil、Vi2・・信号電圧。
FIG. 1 is a circuit diagram of a main part of a rotary encoder detection circuit including a DC level difference correction circuit according to an embodiment of the present invention, and FIG. 2 is a schematic diagram showing the configuration of a two-phase low-return encoder.
Figure 3 is a schematic diagram showing the element arrangement and connections of a two-phase differential magnetic sensor, Figure 4 is a circuit diagram of the main part of a conventional rotary encoder detection circuit, and Figures 5 (a) and (b) are the same as those shown in Figure 5. FIG. 3 is a signal waveform diagram of each part in the circuit. (Explanation of symbols) 1... Preamplifier circuit V including a DC level difference correction circuit
a, Vb... DC voltage A3 A4... Operational amplifier Vil, Vi2... Signal voltage.

Claims (1)

【特許請求の範囲】[Claims] 1、複数の信号の各直流レベルと同レベルの直流信号を
出力する複数の直流信号出力手段と、基準直流レベルの
基準信号と前記各直流信号の間で減算を行って直流レベ
ル差信号を出力する直流レベル差演算手段と、前記複数
の信号の各々とそれらに対応する前記直流レベル差信号
の間で減算を行って前記複数の信号の各直流レベルを補
正する直流レベル補正演算手段とを具備してなることを
特徴とする直流レベル差補正回路。
1. A plurality of DC signal output means for outputting DC signals of the same level as each DC level of the plurality of signals, and outputting a DC level difference signal by subtracting between the reference signal of the reference DC level and each of the DC signals. and DC level correction calculation means for correcting the DC level of each of the plurality of signals by subtracting between each of the plurality of signals and the corresponding DC level difference signal. A DC level difference correction circuit characterized by:
JP1149823A 1989-06-13 1989-06-13 Dc level difference compensation circuit Pending JPH0314277A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1149823A JPH0314277A (en) 1989-06-13 1989-06-13 Dc level difference compensation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1149823A JPH0314277A (en) 1989-06-13 1989-06-13 Dc level difference compensation circuit

Publications (1)

Publication Number Publication Date
JPH0314277A true JPH0314277A (en) 1991-01-22

Family

ID=15483475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1149823A Pending JPH0314277A (en) 1989-06-13 1989-06-13 Dc level difference compensation circuit

Country Status (1)

Country Link
JP (1) JPH0314277A (en)

Similar Documents

Publication Publication Date Title
US5241267A (en) Rotation detector using differential hall sensor circuitry
US4246497A (en) Phase measuring circuit
EP0235750A2 (en) Apparatus for magnetically detecting position or speed of moving body
US7347096B2 (en) Digital accelerometer
US8502529B2 (en) Magnetic sensor device
US9354279B2 (en) Magnetic sensor device for generating an output in accordance with a magnetic field intensity applied to a magnetoelectric conversion hall effect element
JP5343691B2 (en) Magnetic rotation angle detector and encoder
JP2005127762A (en) Sensor signal processing apparatus
JP3008503B2 (en) Position detection device
JPH0314277A (en) Dc level difference compensation circuit
JPH08205502A (en) Reluctance resolver
WO2022103514A1 (en) Bridge sensor dc error cancellation scheme
JPS5868615A (en) Output circuit of magnetic type rotary encoder
JPH10311742A (en) Position detection sensor
EP3130894A2 (en) Abnormality detection device for sensor and sensor device
JPH07139967A (en) Signal processing circuit of encoder
JP5964473B1 (en) Phase modulation signal generation circuit and displacement amount detection apparatus using the generation circuit
JPH0658769A (en) Signal processing method and displacement detector using method thereof
JP3265807B2 (en) Capacitive sensor
JP2828172B2 (en) Multiplier circuit
RU2099722C1 (en) Low-resistance meter
JP2938472B2 (en) Rotation angle detector
JP2671343B2 (en) Capacity measuring device
SU1702171A1 (en) Turning angle-to-electrical signal magnetoresistor converter
JPS61295852A (en) Rotating phase detector of dc motor