JPH03141720A - Power switch circuit - Google Patents

Abstract

PURPOSE:To accelerate switching speed while simplifying a power switch circuit by providing a switch means, etc., to transmit the drain voltage of a power switch MOSFET temporarily to a gate corresponding to the signal change of an input signal. CONSTITUTION:When a power switch MOSFET (insulated gate field effect transistor) Q1 is switched from an OFF state to an ON state, a switching element SW is temporarily turned to the ON state and the drain of the Q1 is connected with the gate. Namely, the gate capacity of a comparatively large capacity value provided in the Q1 is rapidly executed by a power supply voltage VDD of the Q1 itself through a load and the Q1 is switched from the OFF state to the ON state at high speed. At such a time, an input current to be supplied to an input terminal G can be made small corresponding to the input currents of an amplifier circuit AMP and a pulse generating circuit PG. Accordingly, the circuit AMP forms only a gate voltage required for practically maintaining the Q1 in the ON state and the circuit can be simplified by using a logic IC, etc. Then, high-speed switch control can be executed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a power switch circuit, and in particular, to a technique that is effective when applied to a power switch using a MOSFET (insulated gate field effect transistor). be.

[Conventional technology]

Examples of power switch circuits using power MOSFETs include the magazine "Electronic Technology J, November 1987 issue,
There are pages 22 to 25. This power MOSFET has a source grounded and a drain connected to an inductive load such as a motor.

Further, in order to perform switch control using a pulse width modulation signal, a ramp voltage generation circuit, a pulse width modulation comparator, a launch circuit, and a buffer drive circuit are provided.

[Problem to be solved by the invention]

In the above power switch circuit, the power switch MOS
An internal circuit is provided to switch the FET using a pulse width modulation signal. Therefore, the number of external terminals is 5, and it cannot be used as a switch element like a 3-terminal. Therefore, prior to the present invention, the inventors of the present application considered direct switch control of the power switch MOSFET. In this case, as shown in FIG. 5, it is necessary to provide a resistor R between the gate and the input terminal G in order to charge up the large gate capacitance of the power switch MOSFET QI. In other words, if an excessive current is passed through the drive circuit AMP composed of a logic IC, etc., the logic I equipped with this drive circuit AMP will
This may result in large fluctuations in the power supply voltage of C or damage to the device. To prevent this, the power swift f
By providing a resistor R between the gate of the MOS FET Ql and the input terminal G, the power switch MOSFET
In order to control the switching of ETQ1, it is necessary to charge and amplify the gate capacitance and to limit the input terminal for discharging. However, if this is done, a problem arises in that the switching speed of the power switch MOSFETQI becomes slow.

The purpose of this invention is to simplify the circuit while providing high speed and
An object of the present invention is to provide a power switch circuit that increases notching speed.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

That is, a switch means is provided for temporarily transmitting the drain voltage of the power switch MO5FET to the gate in response to a change in the human input signal that changes the power switch MOSFET from an off state to an on state.

[For production]

According to the above means, since the charge-up current of the gate capacitance flows from the drain, the power switch MOSFET can be quickly turned on without increasing the input current.

〔Example〕

FIG. 1 shows a circuit diagram of a basic embodiment of a power switch circuit according to the present invention.

The power switch circuit in the figure is formed as one integrated circuit IC as shown by the broken line in the figure. Although not particularly limited, the power switch MOS FETQl uses the substrate as its drain region, and the back side of the substrate It has a vertical structure with a drain electrode provided on the side.

The drain of the power switch MOSFETQI is connected to an external terminal. Although not particularly limited, this external terminal is connected to the power supply voltage VDD via a load. The source of this power switch MOSFETQ1 is connected to an external terminal S. As above, power switch MOS
When a load is provided to the drain of FETQI, the external terminal S coupled to the source of power switch MO5FETQI is connected to ground potential. An amplifier circuit AMP is provided at the gate of the power switch MOSFET QI via a resistor R for limiting the input current. The input terminal of this amplifier circuit AMP is connected to an external terminal G. This amplifier circuit AMP may be omitted since the resistor R is provided.

As described above, the power switch circuit of this embodiment can be treated as a three-terminal switch element in which S and G are regarded as drain, source, and gate, since there are no external terminals from outside the semiconductor integrated circuit device IC. It is intended to do so.

In this example, the power switch MOS FETQl
In order to increase the switching speed from the OFF state to the ON state, a 1-shot pulse generation circuit PG receives a human input signal supplied from an external terminal G, which is regarded as a gate, and an 1-shot output pulse formed thereby. After receiving the
A switch element SW is provided to connect the drain and gate of the power switch M○S FETQ 1. The pulse generating circuit PG is composed of a one-shot multivibrator or a trigger circuit, and detects a signal change in the input signal supplied to the input terminal G of a human input signal that changes the power switch MOSFET Q1 from an OFF state to an ON state. Then, an l-shot pulse is generated in synchronization with this.

As a result, when the power switch MOSFETQI is switched from the off state to the on state, the switch element S
W temporarily turns on and the power switch MOS
Connect the drain and gate of FETQI. That is,
The gate capacitance of the power switch MOSFET QI, which has a relatively large capacitance value, is rapidly increased by the power supply voltage VDD of the power switch MOSFET Q1 itself via the load, and is quickly switched from the off state to the on state. At this time, the input current supplied to the input terminal G can be an extremely small current corresponding to the input terminals of the amplifier circuit AMP and pulse generation circuit PC. Therefore, the amplifier circuit AMP essentially only forms the gate voltage necessary to maintain the power switch MOSFET QI in the on state. Therefore, a power switch circuit capable of direct high-speed switch control can be obtained using a logic IC or the like having only a small current drive capability.

Note that the operating voltage of the pulse generating circuit PG uses the drain voltage of the power switch MOSFET QI. Therefore, in a configuration in which a load is provided on the drain, when the power switch MOSFET Q1 is turned on, the drain (external terminal D) becomes a low level like the ground potential. However, the pulse generation circuit P
Since C achieves its purpose by generating a single shot pulse that turns on the switch element only when the above signal changes, there is no problem even if it becomes inoperable.

Therefore, the amplifier circuit AMP is different from an amplifier circuit in the normal sense, and may be a circuit using an amplifier element as described below.
It may be omitted as described above.

FIG. 2 shows a circuit diagram of a specific embodiment of the power switch circuit according to the present invention.

In this embodiment, the roles of the amplifying circuit AMP and pulse generating circuit PG are performed by a switch MOSFET Q2 and a diode D. The above MOSFE
The gate of TQ2 is connected to input terminal G. As the above power switch MOSFET Q1, N-channel type M
When using OSFET, the above switch M OS
FETQ2 is composed of an N-channel MOSFET of the same conductivity type. Also, power switch M
In order to quickly switch the OSFETQ1 from the on state to the off state, a P-channel switch MOSFETQ3 is provided between the gate and source of the power switch MOSFETQ1. This MOSFETQ3
The gate of is connected to input terminal G.

FIG. 3 shows a circuit diagram of a specific embodiment of the power switch circuit according to the present invention.

In this embodiment, instead of the above switch MOSFET,
A bipolar transistor is used as a switch element. That is, power switch MOSFETQ
When an N-channel MOSFET is used as I, the bipolar transistor TI serving as the switch element is an NPN transistor. In order to quickly switch the power switch MOSFET QI from an on state to an off state, a bipolar transistor T2 provided between its gate and source is a PNP transistor.

The operation of the embodiment circuit shown in FIGS. 2 and 3 will be explained with reference to the waveform diagram shown in FIG. 4.

In the figure, the gate voltage VG, output voltage, and input current 1i shown by dotted lines are based on the circuit of the above embodiment,
The solid line indicates the circuit shown in FIG.

When the human input signal IN at the input terminal G is at a low level, the P-channel type switch MO5FE is
TQ3 is in the on state, and in the embodiment circuit of FIG.
Since the PN transistor is effectively turned on,
The gate voltage of the power switch MO5FETQI is fixed at a low level like the ground potential of the circuit. Therefore, the power switch MOSFET QI is turned off, and the potential at the external terminal to which its drain is connected is at a high level such as the power supply voltage VDD.

When the human input signal IN supplied from the input terminal G changes from low level to high level, the N-channel switch MOSFET Q2 is activated in the embodiment circuit of FIG.
is turned on, and in the embodiment circuit of FIG. 3, the NPN transistor T1 is turned on. These switching elements Q
2. Depending on the on state of Tl, the power switch MOS
The gate capacitance of FETQl is rapidly charged up from the power supply voltage VDD through the load and external terminals. In this way, the power switch MOSFETQI is substantially turned on together with the turn-on state of the switch MOSFETQ2 in response to the change of the input signal IN to the high level. Note that as the gate voltage to the power switch MO5FETQI increases, the voltage difference between the input signal IN and the gate voltage becomes lower than or equal to the threshold voltage of the switch MOSFETQ2 or the base of the bipolar transistor Tl.

When the voltage between the emitters or lower, this switch MOSFE
TQ2 and bipolar transistor T1 are turned off. Therefore, the gate voltage for maintaining the power switch MOSFET QI in the on state is determined by the human power signal IN supplied from the input terminal G. In addition, when the human input signal IN changes from low level to high level as described above, since the resistor R is provided, the current value of the input current ri supplied from the input terminal G is suppressed to a small constant value. ing. Further, the output signal OUT changes from high level to low level at high speed in response to the high speed switching of the power switch MOSFE'FQ1 to the on state.

On the other hand, in the case of the circuit shown in FIG.
In response to the change to the high level, the input current 1i suddenly flows and starts charging up the gate capacitance of the power switch MOSFET QI, but the gate voltage VG increases according to the time constant of the current limiting resistor R and the gate capacitance. Since the voltage rises only gradually, the switching speed to the on state becomes slow, and accordingly, the fall of the output signal OUT becomes slow.

Although not shown, when the input signal IN changes from high level to low level, the P-channel MOSFE
TQ3 and PNPNPN transistor are turned on,
To quickly discharge the charges accumulated in the gate capacitance of a power switch MOSFETQI. This results in
The gate voltage of the power switch MOSFET QI can be quickly changed to a low level according to the resistance R and the gate capacitance without depending on a large time constant, so that it can be switched from an on state to an off state at a high speed.

The effects obtained from the above examples are as follows. That is, (1) A simple method of providing a switch means that temporarily transmits the drain voltage of the power switch MOS FET to the gate in response to a change in the human input signal that changes the power switch MOS FET from an off state to an on state. Since the charge amplifier current of the gate capacitance flows from the drain due to the tank bottom, it is possible to quickly turn on the power switch MO3FET without increasing the number of input terminals.

(2) The above (1) provides the effect that a three-terminal switch circuit can be directly switched controlled by a logic IC or the like having a small drive current.

(3) A power switch that receives an input signal as a switch means that temporarily transmits the drain voltage of the power switch MOSFET to the gate in response to a change in the human input signal that changes the power switch MO5FET from an off state to an on state. A series circuit of a switch MOS FET and a diode of the same conductivity type as the MOS FET is used, and a power switch M that receives a human input signal between the gate and source of the power switch MOS FET is used.
O5FET and opposite conductivity type switch M OS F E '
The simple configuration of providing T' provides the effect that the power switch MO5FE'T' can be controlled at high speed.

(4) The power switch MOSFET is used as a switch means for temporarily transmitting the drain voltage of the power switch MOSFET to the gate in response to a change in the input signal that changes the power switch MOSFET from an off state to an on state.
If the SFET is an N-channel MOSFET (or P-channel MO5FET), the NPN (
or PNP) type bipolar transistor and a diode in series, and the bipolar transistor and the PNP (opposite conductivity type) receiving an input signal between the gate and source of the power switch MOSFET.
Power switch MOS F E
This provides the effect that T can be controlled quickly and in a controlled manner.

Although the invention made by the present inventor has been specifically explained based on Examples above, the present invention is not limited to the above-mentioned Examples, and various changes can be made without departing from the gist thereof. For example, power switch MOSFETQI
may be used as a source follower circuit. That is, the power supply voltage VDD may be supplied to the external terminal connected to the drain, and the load may be connected to the external terminal S connected to the source. Also,
A plurality of them may be provided on one semiconductor substrate.

In this case, a vertically structured power MOS with the substrate as the drain
In an FET, it is inevitably used as a high-side drive circuit (source follower circuit) with a common drain. Furthermore, the conductivity types of the power switch MO5FET, switch MOSFET, and bipolar type may be reversed. That is, when configuring a low-side drive circuit while forming a plurality of power switch MOSFETs on one semiconductor substrate, the output M
P-channel MOS FETs may be used as the OS FETs and the control MOS FETs.

In this configuration, since the ground potential of the circuit is applied to the drain of the P-channel MOSFET, a low-side drive circuit whose load is the power supply voltage VDD can be configured.

This invention can be widely used as a power switch circuit.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows. That is, the above-mentioned method can be achieved by a simple configuration in which a switch means is provided that temporarily transmits the drain voltage of the power switch MOSFET to the gate in response to a change in the input signal that changes the power switch MOSFET from an off state to an on state. Since the charge amplifier current of the gate capacitance flows from the drain, the power switch MOS FET can be quickly turned on without increasing the input current.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a basic embodiment of a power switch circuit according to the present invention, FIG. 2 is a circuit diagram showing a specific embodiment of a power switch circuit according to the present invention, and FIG. , a circuit diagram showing another specific embodiment of the power switch circuit according to the present invention, FIG. 4 is a waveform diagram for explaining the present invention, and FIG. 5 is a power switch circuit considered prior to the present invention. FIG. 2 is a circuit diagram for explaining an example of a switch circuit. IC: Semiconductor integrated circuit, PG: Pulse generation circuit, A
M P... Amplifier circuit, Ql... Power switch MOS
FET, Q2. 'Q3...Switch MOSFET, D
...Diode, T1. T2...Bipolar transistor

Claims (1)

[Claims] 1. A power switch MOSFET and a switch means for temporarily transmitting the drain voltage of the power switch MOSFET to the gate in response to an input signal that changes the power switch MOSFET from an off state to an on state. A power switch circuit characterized by: 2. A resistive element is provided between the gate of the power switch MOSFET and an input terminal to which an input signal is supplied, and a resistive element is provided between the gate and drain to which an input signal is supplied from the input terminal. A series circuit is provided between the gate and the source, and includes a first switch MOSFET having the same conductivity type as the power switch MOSFET, and a diode configured to flow current from the drain to the gate. receives the input signal supplied from the input terminal, and connects a second switch MOSFET having a conductivity type opposite to that of the power switch MOSFET.
2. The power switch circuit according to claim 1, wherein T is provided. 3. A resistive element is provided between the gate of the power switch MOSFET and the input terminal to which the input signal is supplied, and a resistance element is provided between the gate and the drain to receive the input signal supplied from the input terminal. and a first bipolar transistor, which is an NPN type when the power switch MOSFET is an N-channel MOSFET, and a PNP type when the power switch MOSFET is a P-channel MOSFET, and a first bipolar transistor that causes a current to flow from the drain to the gate. A series circuit consisting of a diode configured as shown in FIG.
A second bipolar transistor, which receives an input signal supplied from the input terminal and is of a conductivity type opposite to that of the first bipolar transistor, is provided between the gate and the source. A power switch circuit according to claim 1.