JPH03141716A - Circuit for counter, counter and scanning type optical dimension measuring device - Google Patents

Abstract

PURPOSE:To improve the resolution of measurement and accuracy for the measurement by providing a first FF, to which a count pulse is inputted, a second FF, to which the count pulse is inputted, to be operated by the edge of a polarity reverse to that of the first FF, and an exclusive OR circuit. CONSTITUTION:When a count pulse 98(A) of a rectangular wave is inputted to a first FF 92, the FF 92 is set by the edge for the leading of the first count pulse and reset by the edge for the leading of the next count pulse and a signal (B) is outputted from the FF 92. The pulse (A) is inputted to a second FF 94 and the FF 94 is set by the edge for the trailing of the first count pulse and reset by the edge for the trailing of the next count pulse. Then, a signal (C) is outputted. The output signals of the FF 92 and FF 94 are inputted to an exclusive OR circuit 96 and a waveform signal (D) similar to the pulse 98(A) is outputted from the circuit 96. Thus, without increasing a response processing speed required for the count pulse, one clock of the count pulse can be increased to 2 clocks and the counting ability of a counter can be made double. Then, the resolution of the measurement and the accuracy for the measurement can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a counter circuit, a counter, and a scanning type optical dimension measuring device, and particularly relates to a counter circuit that doubles the counting ability of the counter and The present invention relates to a counter using a counter circuit and a scanning type optical dimension measuring device with improved measurement resolution by using the counter, and it is necessary to count counting pulses at high speed and/or with high precision. Effective in industrial applications.

[Prior Art] When trying to measure a certain time width, it is common to count pulses that repeat at regular intervals using a counter, and then calculate the time width from the counted value. In order to obtain the time width with high resolution, it is necessary to use high frequency counting pulses in order to reduce so-called quantization errors.

Conventionally, in order to increase the frequency of the counting pulse, if you can obtain a higher frequency crystal oscillator, you can use it, but if you cannot do it manually, for example,
The circuit shown in the figure was used to increase the frequency of counting pulses.

The circuit shown in FIG.
2 and a capacitor 116 to produce a delayed counting pulse (B), and the counting pulses (A), (B
) is input to the exclusive OR circuit 96 to obtain a counting pulse (C) with twice the frequency.

The circuit shown in FIG. 6 inputs a counting pulse (A) to a differentiator circuit consisting of a capacitor 118 and a resistor 110 to generate a counting pulse (B), and similarly, the counting pulse (A)
) After inverting with inverter 104, capacitor 1
20 and a resistor 114 to create a counting pulse (C), and the counting pulses (B) and (C) are input to an OR element 122 to produce a counting pulse with a frequency doubled. (D) is obtained.

[Problems to be Solved by the Invention] However, the circuits shown in FIGS. 5 and 6
Increasing the frequency of the counting pulses, that is, changing one clock to two clocks, is unsuitable for high-speed operation due to waveform distortion in the integrating circuit and differentiating circuit, and is only practical in the range of several MHz at most.

Furthermore, if, as is the case in many cases, the frequency of the original counting pulse is selected at the edge of the response processing speed limit of the counter that counts the counting pulses, then By the circuit shown in the figure, 2 of l clocks
If clocked, the response processing speed limit of the counter would be exceeded, making it impossible to count the counting pulses.

Also, the object to be measured is irradiated with a parallel scanning beam.

The brightness of the parallel scanning beam that has passed through the object to be measured is detected, and the scanning time of the dark or bright area that occurs when a part of the parallel scanning beam is blocked by the object to be measured is counted using a counting pulse. A scanning optical dimension measuring device for measuring the dimension in the scanning direction (for example,
3-172907), it was desired to be able to perform counting using counting pulses of a higher frequency than conventional ones in order to increase the measurement resolution. However, it is impossible to simply use a higher frequency counting pulse oscillator or the like because this would exceed the response processing speed of the counter that counts the counting pulses. Also.

Increasing the processing speed of the counting pulses to a higher response processing speed would not be possible using readily available commercially available circuit elements, would be extremely expensive, large and complicated, and would therefore be impractical.

The present invention has been made in view of the above situation, and is a counter that doubles the counting capability of the counter by converting one clock pulse of the counting pulse into two clocks without increasing the necessary response processing speed of the counting pulse. It is an object of the present invention to provide a scanning optical dimension measuring device in which measurement resolution is improved by using a circuit, a counter 4R using the counter circuit, and the counter.

[Means for Solving the Problems] To this end, the present invention provides a first flip-flop means to which a counting pulse is input, and an edge to which the counting pulse is input and operates with an edge having a polarity opposite to that of the first flip-flop means. The above problem is solved by comprising a second flip-flop means and an exclusive OR circuit into which the output signal of the first flip-flop means and the output signal of the second flip-flop means are input. This is what I did.

Further, the present invention solves the above problem by providing a counter having a plurality of flip-flops with the counter circuit at the first stage of the counter.

Furthermore, the present invention provides a parallel scanning beam generator that converts a light beam emitted from a laser light source into a parallel scanning beam, a light receiving element that detects the brightness of the parallel scanning beam that has passed through an object to be measured, and a waveform of the output of the light receiving element. A scanning device that measures the dimensions of the object in the scanning direction, comprising an edge detection circuit for shaping and a counter that counts the scanning time of a dark or bright area that is generated when a part of the parallel scanning beam is blocked by the object to be measured. In the type optical dimension measuring device, the above-mentioned problem is solved by the above-mentioned counter being a counter according to the present invention. , in synchronization with the rising edge or the falling edge of the counting pulse, the counting pulse becomes a pulse with a period double that of the counting pulse, and at the same time as the input to the first flip-flop means, the counting pulse is input to the second flip-flop means, and the falling edge thereof becomes a pulse. Alternatively, in synchronization with the rising edge of the pulse, the output signal of the first flip-flop means and the output signal of the second flip-flop means become a pulse with a period twice that of the counting pulse, and the output signal of the first flip-flop means and the output signal of the second flip-flop means are input to the exclusive OR circuit, and the exclusive logic The output of the sum circuit becomes the same pulse as the counting pulse, which is essentially synchronized at both the rising and falling edges of the counting pulse, which is not possible in the first place, and one clock pulse of the counting pulse is converted into two clocks. will be held.

Also, II! By providing a counter having several flip-flops with the counter circuit according to the present invention at its first stage, the counting capability of counting pulses can be doubled.

Furthermore, in a scanning optical dimension measuring device, the brightness of the parallel scanning beam that has passed through the object to be measured is detected, and the scanning time of the dark or bright area that occurs when a part of the parallel scanning beam is blocked by the object to be measured is determined. The counting pulses are counted using the counter according to the present invention, and the counting resolution of the scanning time is doubled.

[Embodiment 1] An embodiment according to the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to this example.

FIG. 1 shows an embodiment of a counter circuit according to the present invention.

The counter circuit 90 of this embodiment includes a first flip-flop means 92 and a second flip-flop means 94 that operates with an edge of opposite polarity to the first flip-flop means 92.
and an exclusive OR circuit 96, a counting pulse 98 is input to the input sides of the first flip-flop means 92 and the second flip-flop means 94, and The output side of the pull means 94 is connected to the input side of an exclusive OR circuit 96.

Next, the operation of the counter circuit 90 of this embodiment will be explained with reference to FIG.

When a square wave counting pulse (A) is input to the first flip-flop means 92, the first flip-flop means 92 is set at the rising edge of the first counting pulse, and reset at the rising edge of the next counting pulse, The first flip-flop means 92 outputs the signal shown in FIG. 2(B).

The period of this signal (B) is twice the period of the counting pulse (A).

On the other hand, the counting pulse (A) is generated by the second flip-flop means 9
4, the second flip-flop means 94 is set at the falling edge of the first counting pulse, and reset at the falling edge of the next counting pulse, and the second flip-flop means 94 outputs the signal as shown in FIG. The signal shown in C) is output.

Then, the output fε of both flip-flop means 92 and 94
When the signal is input to the exclusive OR 96, the exclusive OR 96 outputs the signal shown in FIG. 2(D). Output signal (
D) is a waveform similar to counting pulse (A); No. 3.

When considering the counter circuit 90 as one flip-flop means, this means that the warm counter circuit 90 is substantially set or reset at both the rising and falling edges of the input counting pulse 98 (A). In this way, one counting pulse clock can be converted into two counting pulses.

Furthermore, the circuit configuration of the counter circuit 90 is suitable for integration into an integrated circuit (IC) due to its characteristics.

Next, a third embodiment of the counter according to the present invention will be explained.
This will be explained using figures.

The counter 100 according to this embodiment includes a counter circuit 90 and a counter rc130. The counter circuit 90 is located at the first stage of the counter 100, and the output signal (C) of the counter circuit 90 is
Connected to the input counting terminal of C130. The counter 100 receives an input signal (CI, K
), control number 3 (C
It has an input terminal into which signals such as NT) and a cancel signal (CLR) for canceling counting are input. The counter IC 130 is a commercially available n-bit counter IC, and its Φth
The bits, first bit, second bit, . . . are the first bit output (D), second bit output (E), third bit output (F), . . . of the counter 100, respectively. The first bit output (C) of the counter 100 is the output signal (C,) of the counter circuit 90 itself. The counter circuit 90 is similar to the explanation of FIG. 1, so a description thereof will be omitted.

Next, the operation of the counter 1000 of this embodiment will be explained using the waveform diagram of FIG. 3.

FIG. 3 shows a case where the counter 100 according to this embodiment is used in a scanning optical dimension measuring device. input signal(
The counting pulse 98 as (CLK) is supplied from the clock 54 and has a wave velocity of a rectangular wave as shown in the waveform diagram (CLK) of FIG. The control signal (CNT) is supplied from the gate circuit. Signal waveform of this control signal (CNT)
corresponds to the brightness and darkness of the light created when a part of the parallel scanning beam 20 is blocked by the measurement object 22, and corresponds to the waveform diagram (C
NT), the measurement target area is indicated by diagonal lines (1), (2) and (
3). In actual measurement, a segment is specified to determine which diagonal line portion of the diagonal line is to be measured. Then, the gate of the counter 100 is opened during the designated hatched portion, and the counting pulses 98 during that period are counted. Note that the release signal (CLR) is supplied from the reset circuit 52, and when the counter 100 is reset by the release signal (CLR), it starts counting from zero.

As can be seen from the waveform diagram in Figure 3, the control fε (CNT)
In the shaded area, the output signal (A) of the first flip-flop 92 of the counter circuit 90 is set and reset at the falling edge of the counting pulse 98. The output signal (B) of the second flip-flop means 94 is the counting pulse 9
It is set and reset at the rising edge of 8. Then, in the output signal (C) created by inputting the output signals (A) and (B) to the exclusive OR circuit 96, the control signal (CNT)
The number of pulses in a certain shaded area is equal to the number of counting pulses 98 contained therein, not half thereof.

As a result, for example, when the shaded area (L) is designated as a segment, conventionally, if you count the output signal (A), you can only count two pieces, but in this embodiment, the output signal (C) It can be seen that by counting with , it is possible to count as 4 pieces, which is twice as many as before. In other words, the scanning time can be measured with twice the resolution than before. In addition, in the waveform diagram of FIG. 3, by intentionally displaying the case where the edge of the shaded part of the control signal (CNT) does not correspond to the edge of the counting pulse 98, in this embodiment, the so-called quantization error is reduced and the time is reduced. This shows that the resolution is high.

Next, an embodiment of the scanning optical dimension measuring device according to the present invention will be described.

The optical system of this example is as shown in FIG.
and a polygon mirror I4 that converts the laser beam 12 generated by the laser light source lO into a rotating scanning beam 16;
A mirror 28 for guiding the laser beam to the polygon mirror 14, a motor 30 for rotating the polygon mirror 14, and a collimator lens ([O lens) for converting the rotating scanning beam 16 into a parallel scanning beam 20. )
18, and a parallel scanning beam 20 that has passed through the measurement object 22.
a condenser lens 24 for condensing light; and a condenser lens 24 for condensing light.
A light receiving element 26 that detects the brightness of the light focused by
and a noset light receiving element arranged outside the effective scanning range of the rotating set meal beam 16 or the parallel scanning beam 20 and for detecting the start or end of I scanning. As shown in detail in FIG. 4, the electric circuit includes a central processing unit (CPU) 40 that performs various arithmetic operations, and provides necessary commands to the CPU 40.
or a keyboard and display circuit 42 for displaying the results etc. of the CPU 40, an input/output device 44, a storage device 46 such as a read only memory (ROM) or a random access memory (RAM), and the light receiving element. 26
An edge detection circuit 50 for performing edge detection by shaping the output of the waveform FJ IF; A reset circuit 52 that generates a noset signal, and a clock 54 that generates a clock signal.
, a gate circuit 56 that passes the clock signal between the predetermined edge and the reset signal detected by the edge detection circuit 50, and a count pulse 98, which is a clock signal that has passed through the gate circuit 56, is counted to detect the predetermined edge. a counter lOO for counting the length of time between the clock signal and the reset signal; and a motor synchronization signal generator 60 for generating a synchronization signal for driving the motor 30 in synchronization with the clock signal output from the clock 54. , a motor drive circuit 62 for driving the motor 30 according to the output of the motor synchronization signal generator 60 and automatic control so that the power of the laser beam 12 generated from the laser light source 10 is constant. The apparatus includes an APC circuit 70 and a control signal circuit 82 that outputs a control signal for stopping the automatic control of the APC circuit 70 during a scanning period during which light is returned to the laser light source 10.

Counter lOO in this embodiment is a counter according to the present invention. The clock 54 is selected to have a high frequency that is just within the limit of the response processing speed of the signal processing system of this embodiment. Therefore, it is not possible to use the circuits shown in FIGS. 5 and 6, and the counter (00) of the present invention is used to convert 1 clock to 2 clocks for the first time.

As described above, the counter circuit and counter 4 according to the present invention
The embodiments of the I2 and Scan 411 optical dimension measuring devices have been described. In the above embodiments, the first flip-flop means and the second flip-flop means are not limited to a single flip-flop element, but the present invention also covers flip-flop means made by combining various logic elements. Needless to say. Also regarding the exclusive OR circuit 96.

Similarly, devices made by combining various logic elements are also included within the scope of the present invention. Also, counter 1
00 is the counter circuit 90, counter IC 130
It goes without saying that the scope of the present invention is also applicable to cases where each of the two is separately integrated into an IC, or both are integrated into an RC. In addition, in the embodiment of the scanning optical dimension measuring device, the rotating scanning beam 16 was generated using the polygon mirror 14, but the application of the present invention is not limited to this. It goes without saying that the present invention can be similarly applied to anything that generates the scanning beam 11.

[Two results] According to the present invention, it is possible to increase the number of counting pulses to two clocks without reducing the necessary response processing speed of the counting pulses, thereby doubling the counting capacity of the counter. By providing a counter circuit that improves and by providing a counter using said counter circuit and by using said counter, measurement resolution is improved. A scanning optical dimension measuring device with high measurement accuracy can be provided.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of an actual hf process example of a counter circuit according to the present invention, Fig. 2 is an operational waveform amount of each part of the circuit shown in Fig. 1, and Fig. 3 is a circuit diagram according to the present invention. A block diagram of an embodiment of the counter, a waveform diagram of each part when the embodiment is used in a scanning optical dimension measuring device, and FIG. 4 show an embodiment of the scanning optical dimension measuring device according to the present invention. FIG. 5 is a conventional example of a circuit that converts one clock into two clocks, and FIG. 6 shows a conventional example of a circuit that converts one clock into two clocks. FIG. 2 is a diagram showing a conventional example. 90 ... 92 ... 94 ... 96 ... 100 ... Counter circuit, first flip-flop means, second flip-flop means, exclusive OR circuit, counter' ---Fox product----, -J Figure 1 Figure 5

Claims (3)

[Claims] (1) A first flip-flop means to which a counting pulse is input; a second flip-flop means to which the counting pulse is input and operates with an edge of opposite polarity to that of the first flip-flop means; and the first flip-flop means. A counter circuit comprising: an exclusive OR circuit to which the output signal of the means and the output signal of the second flip-flop means are input. (2) A counter having a plurality of flip-flops, characterized in that the first stage of the counter is provided with the counter circuit according to claim (1). (3) A parallel scanning beam generator that converts the light beam emitted from the laser light source into a parallel scanning beam, a light receiving element that detects the brightness of the parallel scanning beam that has passed through the object to be measured, and a waveform shaping of the output of the light receiving element. A scanning optical system that includes an edge detection circuit and a counter that counts the scanning time of a dark area or a bright area that is generated when a part of the parallel scanning beam is blocked by the object to be measured, and measures the dimensions of the object to be measured in the scanning direction. A scanning optical dimension measuring device, wherein the counter is the counter according to claim 2.