JPH03138777A - Interpolating circuit - Google Patents

Abstract

PURPOSE:To calculate an interpolation value approximating an expected value by counting fractions less than one as a whole number to output the result of an arithmetic average in one of vertical and horizontal directions and omitting them to output it in the other direction. CONSTITUTION:Picture element data adjacent in vertical and horizontal directions out of plural picture element data in vertical and horizontal directions of a moving picture are inputted to interpolating circuits 200 and 300, and these circuits 200 and 300 obtain and output arithmetic averages. For example, fractions less than one are omitted when vertical interpolating operation is performed in the interpolating circuit 200 for positive logic, and fractions less than one are counted as a whole number when horizontal interpolating operation is performed in the interpolating circuit 300 of negative logic. Thus, results of interpolating operation in the vertical direction and the horizontal direction are averaged, and a calculated value more approximating an expected value is obtained in comparison with positive logic operation in both directions.

Description

[Detailed Description of the Invention] [Summary] The present invention aims to provide an interpolation circuit that calculates interpolated values close to expected values with respect to interpolation circuits for video processing used in televisions (TVs), personal combinations, computers, etc. , In an interpolation circuit that inputs pixel data adjacent to each other in the vertical and horizontal directions of pixel data of a moving image consisting of a plurality of pixel data in the vertical and horizontal directions, calculates the arithmetic mean, and outputs the arithmetic average, For one, the decimal part of the arithmetic average result is rounded up and output, and for the other, the decimal part of the arithmetic average result is rounded down and output.

[Industrial application field]

The present invention is applicable to televisions (TV), personal computers (
This invention relates to improvements to interpolation circuits for video processing used in computers (hereinafter referred to as personal computers) and the like.

In video processing on TVs, personal computers, etc., when images are enlarged or reduced, the images become distorted, so interpolation processing is performed so that the images are connected smoothly.

At this time, there is a demand for an interpolation circuit that calculates interpolated values closer to expected values.

[Conventional technology]

FIG. 4 is a diagram showing interpolation processing when an example image is enlarged.

FIG. 5 is a block diagram showing the configuration of a conventional circuit.

FIG. 6 is a diagram showing interpolated values in a conventional example.

For example, as shown in FIG. 4, it is assumed that a TV image consists of pixels in the horizontal and vertical directions, and the degree of brightness of each pixel is expressed as a number in the lO base. Now, if you try to double the size of a TV image both horizontally and vertically, the image will be distorted, so interpolation processing is performed. That is, 2 in each horizontal and vertical direction.
The value of the pixel after the row (interpolated value) is determined by the arithmetic mean of the value immediately before it. The horizontal interpolation value is (Xn-1+x
n)/2, the vertical interpolation value is (y-+ +y,,)
/2 calculation. A circuit in this case is shown in FIG.

In the horizontal direction, as shown in the figure, by adding Xl'l-1 and xn to the input terminals A and B of the interpolation circuit l, respectively, and performing integer arithmetic processing, the output terminal C is determined by positive logic.
Outputs the calculation result to. Positive logic means that in the case of an odd number, the calculation result is rounded down to the decimal point and output.

Also, in the case of vertical direction, Y is connected to input terminals A and B respectively.
By adding n-+s and Yn and similarly performing integer arithmetic processing, the arithmetic result is output to the output terminal C using positive logic.

For example, in Figure 6), if we focus on the data "8" in the second row and third column of the video data, the vertical direction is the interpolated value (3+8)/2=5 (rounded down to the nearest whole number), and the horizontal direction is the interpolated value. (2+5)/2=3 (round down to the nearest whole number)
It is required as.

In this way, interpolated values in the vertical and horizontal directions were obtained.

[Problem to be solved by the invention]

However, in the above circuit, since positive logic is used in both the horizontal and vertical directions, the interpolated value (Xn-1+
X, l) /2, (ya-1+3'n) /2 is rounded down to the decimal point. For example, in FIG. 6(a), the expected value is 4, which is an error of -1 compared to the value (3) in the conventional example. Therefore, there is a problem that the interpolated value is often smaller than the expected value.

Therefore, an object of the present invention is to provide an interpolation circuit that calculates an interpolated value close to an expected value.

[Means to solve the problem]

The above problem is solved by the circuit configuration shown in FIG.

That is, in FIG. 1, interpolation circuits 200 and 300 manually calculate the arithmetic mean of pixel data adjacent to each other in the vertical and horizontal directions of a plurality of moving image pixel data in the vertical and horizontal directions, and output the result. In this case, the arithmetic mean result is rounded up to the decimal point for either the vertical or horizontal direction, and the arithmetic mean result is rounded down to the decimal point and output for the other direction.

[For production]

In FIG. 1, for example, if the vertical interpolation calculation is performed by the positive logic interpolation circuit 200 (FIG. 1(a)), the decimal places are rounded down. Furthermore, when the horizontal interpolation calculation is performed by the negative logic interpolation circuit 300 (FIG. 3(b)), the fractions below the decimal point are rounded up.

As a result, the results of the interpolation calculations in the vertical and horizontal directions are averaged, and a calculated value closer to the expected value can be obtained than when positive logic calculations are performed in both directions.

〔Example〕

FIG. 2 shows the configuration of a circuit according to an embodiment of the present invention.

The same reference numerals indicate the same objects throughout the figures.

As shown in FIG. 2, for example, the vertical direction is determined by a positive logic circuit, and the horizontal direction is determined by a negative logic circuit. As a result, the decimal parts of the calculation result are rounded down in the vertical direction, but the decimal parts in the horizontal direction are rounded up.

In FIG. 3, for example, “
Focusing on the data "8", the expected interpolated value is "4" ((a) in the same figure). On the other hand, in the method according to the embodiment, the vertical interpolated value is (3+8)/2=5 (rounded down to the nearest whole number), The horizontal interpolation value is obtained as (2+5)/2=4 (rounding up to the nearest whole number) ((b) in the same figure).

As a result, the error from the expected value becomes 0.

In this way, an interpolated value close to the expected value can be obtained.

FIG. 2 is a block diagram showing the configuration of a circuit according to an embodiment of the present invention; FIG. 3 is a diagram showing interpolation values in the embodiment; FIG. 4 is a diagram showing interpolation processing when an example image is enlarged; FIG. 5 is a block diagram showing the configuration of a conventional circuit, and FIG. 6 is a diagram showing interpolated values in the conventional example.

In the figure 200.300 is an interpolation circuit shows.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to obtain a value closer to the expected value as an interpolated value than in the conventional case.

[Brief explanation of the drawing]

Figure 1 is a diagram of the principle of the present invention. Positive logic (D,) Negative logic (b) Figure 7 shows the configuration of the circuit in series A. Indicates F”Q,y7Figure 2 5
Diagram C = (A tB)/2 C2 (X + B)/2-Koyo Logic (superimposition)
Negative logic (7L-f-interpolation)
0) (1,,) Tiger of the present invention & 4! The configuration of the circuit of '1 is shown. Tied up for 1 minute
Part 2

Claims (1)

[Claims] In the interpolation circuits (200, 300) that input pixel data adjacent to each other in the vertical and horizontal directions of pixel data of a moving image consisting of a plurality of pixel data in the vertical and horizontal directions, calculate the arithmetic mean, and output the arithmetic average. An interpolation circuit characterized in that for one of the horizontal directions, the result of arithmetic mean is rounded up and outputted, and for the other, the result of arithmetic mean is rounded down and outputted.