JPH03136416A - Time constant switching type automatic equalization circuit - Google Patents

Abstract

PURPOSE:To obtain a stable output by providing a 1st capacitor and a 2nd capacitor having a larger capacitance than that of the 1st capacitor to a time constant circuit, and using the capacitors selectively. CONSTITUTION:The output of a peak detection integration circuit 2 is integrated by an integration device 3 and the integrated voltage is compared with a threshold voltage Vref regarded as a voltage for stable operation by a comparator 4. When an input signal is inputted after its disconnection, while the integration voltage is small to be regarded as a voltage for a stable operation, the time constant circuit of the integration circuit of the peak detection integration circuit 2 is selected smaller than a time constant comprising a resistor R and a capacitor C1 and the output is quickly brought into a stable region. When the voltage integrated by the integration device 3 is larger than the threshold voltage Vref, the capacitor C1 is switched into the capacitor C2 with a larger capacitance to increase the time constant. Thus, even when fluctuation takes place in the input signal or the pulse interval of the input signal becomes wider, a stable output is obtained.

Description

[Detailed Description of the Invention] [Summary] The output of the line equalization gain adjustment circuit is outputted and inputted to a peak detection and integration circuit, and the peak detection and integration circuit
The input amplitude is compared with a first threshold voltage indicating a stable output voltage, and the portion exceeding the first threshold voltage is detected by an integrating circuit having a small time constant circuit consisting of a resistor and a first capacitor. The integrated voltage is applied to the line equalization gain adjustment circuit by negative feedback, and in the line equalization gain adjustment circuit, the amplitude of the output voltage is adjusted to the first level.
Regarding automatic equalization circuits that control the gain so that it is the same as the threshold voltage of The purpose of this invention is to provide a time constant switching type automatic equalization circuit that can obtain a stable output even when the pulse interval becomes wider, and a second capacitor having a larger capacity than the first capacitor is added to the time constant circuit. The output of the peak detection integration circuit is integrated by an integrator, and the integrated voltage is compared with a second threshold voltage that is considered to be a stable region by a comparator. The first capacitor of the time constant circuit is configured to be switched to the second capacitor when the time constant circuit reaches the second capacitor.

[Industrial application field]

The present invention relates to a time constant switching type automatic equalization circuit that is an improved automatic equalization circuit that equalizes the line loss of a line and is used in a digital transmission device.

[Prior Art] FIG. 2 is a block diagram of a conventional automatic equalization circuit, and FIG. 3 is a time chart of waveforms of various parts.

In FIG. 2, the output of the line equalization gain adjustment circuit 1 is output and is also input to the peak detection integration circuit 2.

In the peak detection integration circuit 2, a signal is input from the input cut-off state and is equalized and amplified by the line equalization gain adjustment circuit 1.As shown in FIG. Since the gain is large, the amplitude is large, and an output that becomes gradually stable is input, and the input amplitude is compared with a threshold voltage indicating a stable output voltage. , resistance R.

The integrated voltage Vpd as shown in FIG. 3(B) is integrated by an integrator circuit having a small time constant consisting of a capacitor C1, and is input to the line equalization gain adjustment circuit 1 by negative feedback. The gain is adjusted so that the amplitude of the output voltage Vo is equal to the threshold voltage indicating the stable output voltage.

[Problem to be solved by the invention]

However, due to the influence of noise, the amplitude of the input signal is
As shown in Figure (C), there may be undulations, or the number after “1” may be “1”.
As shown in FIG. 3(E), the pulse interval may become wide.

In the case of Fig. 3, the time constant circuit consisting of the resistor R and capacitor CI is set to a small time constant (approximately 10m5) so that the output returns to the stable region as soon as possible when a signal is input from a state where the input is cut off. Therefore, when there is a undulation as shown in Figure 3 (C), the integrated voltage vpct is as shown in Figure 3 (C).
As shown in D), the gain of the line equalization gain adjustment circuit l changes.

In particular, if there is an undulation with the same period as the time constant, there is a problem that the output becomes extremely unstable.

Also, as shown in Figure 3(E), when the pulse interval becomes wider,
There is a problem that the integrated voltage Vpd fluctuates as shown in FIG. 3(F), and the gain of the line equalization gain adjustment circuit 1 fluctuates.

The present invention aims to bring the output into a stable region as quickly as possible when a signal is input from a state where the input is cut off, and to obtain a stable output even if the input signal fluctuates or the pulse interval of the input signal becomes wide. The purpose of this invention is to provide a time constant switching type automatic equalization circuit that can perform the following steps.

[Means to solve the problem]

Generally, a signal in a digital transmission system has a constant amplitude at the transmitter, and the signal level at the receiver is determined mostly by line loss.

Therefore, after the automatic equalization circuit compensates for line loss and enters a stable region, there is no need to vary the gain, so the following means are provided.

FIG. 1 is a block diagram of a time constant switching type automatic equalization circuit according to an embodiment of the present invention.

As shown in FIG. 1, the output of the line equalization gain adjustment circuit 1 is outputted and is also input to the peak detection and integration circuit 2. In the peak detection and integration circuit 2, the input amplitude is converted into a The part exceeding the first threshold voltage is integrated by an integrating circuit having a small time constant circuit consisting of a resistor R and a first capacitor C1. In addition to the line equalization gain adjustment circuit 1,
In the line equalization gain adjustment circuit 1, in an automatic equalization circuit that performs gain control so that the amplitude of the output voltage becomes the same as the first threshold voltage, the time constant circuit is provided with a capacitance greater than the first capacitor CI. A second, larger capacitor C2 is added to enable switching.

Further, the output of the peak detection integration circuit 2 is integrated by an integrator 3,
The integrated voltage is compared with the second threshold voltage Vref, which is considered to be in the stable region, by the comparator 4, and when it becomes larger, the first capacitor C1 of the time constant circuit is replaced with the second capacitor C2. Switch to .

[Function] According to the present invention, the output of the peak detection integration circuit 2 is integrated by the integrator 3, and the integrated voltage is compared by the comparator 4 with the second threshold voltage Vrer that is considered to be in the stable region. However, as long as the integrated voltage value is small until the signal is input from the input disconnection state and is considered to be in the stable region, the time constant circuit of the integrating circuit of the peak detection integrating circuit 2 is connected to the resistor R, as in the conventional example. Capacitor C
A small time constant of 1 is used to bring the output into a stable region quickly.

After the voltage integrated by the integrator 3 becomes larger than the second threshold voltage Vref, which is considered to be in the stable region, the capacitor CI of the time constant circuit of the integrating circuit of the peak detection integrating circuit 2 is changed to a larger capacitor. The switching time constant of capacitor C2 is increased.

In this way, even if there is an undulation as shown in FIG. 3(C) or a wide pulse interval as shown in FIG. 3(E), the time constant is large, so the output of the peak detection integration circuit 2 is Variations in vpa are small, and variations in the gain of the line equalization gain adjustment circuit 1 are very small and stable.

〔Example〕

FIG. 1 is a block diagram of a time constant switching type automatic equalization circuit according to an embodiment of the present invention.

The output of the peak detection integration circuit 2 is integrated by the integrator 3, and the integrated voltage is compared with the threshold voltage Vref which is considered to be in the stable region by the comparator 4. While the integrated voltage value is small until it is detected, the time constant circuit of the integrating circuit of the peak detection integrating circuit 2 has a small time constant consisting of the resistor R and the capacitor C1, as in the conventional example, to quickly stabilize the output. I'm trying to make it into an area.

After the voltage integrated by the integrator 3 becomes larger than the threshold voltage Vref that is considered to be in the stable region, the capacitor C of the time constant circuit of the integrating circuit of the peak detection integrating circuit 2
As explained above, I is switched to a capacitor C2 with a large capacity to increase the time constant.

Here, the integrator 3 integrates vpct of the output of the peak detection integration circuit 2 as shown in FIGS. 3(C) and 3(E).
If there is undulation and the pulse interval is wide, Figure 3 (D) (
As shown in F), the output voltage Vp of the peak detection integration circuit 2
d may become smaller than the threshold voltage Vref, which can be considered as a stable region, but by integrating the output voltage VPd, the integral voltage ■ becomes the integral voltage ■, and this integral voltage ■ temporarily becomes the threshold voltage Vref.
This is because if it becomes larger than ref, it remains large until an input interruption occurs, and the time constant circuit of the integrating circuit of the peak detection integrating circuit 2 uses a capacitor C2 with a large capacity to increase the time constant.

Therefore, as shown in Figure 3 (C), even if there is undulation,
Even when the pulse interval is wide as shown in FIG. 3(E), the time constant is large, so the fluctuation in the output Vpd of the peak detection integration circuit 2 is small, and the fluctuation in the gain of the line equalization gain adjustment circuit 1 is very small. It becomes stable.

Furthermore, even if there is a momentary interruption in the input, the output can remain stable without momentary interruption.

〔Effect of the invention〕

As described in detail above, according to the present invention, when a signal is input from a state where the input is cut off, the output can be quickly brought into a stable region, and after entering the stable region, the input signal does not waver or the input signal Even if the pulse interval is wide, a stable output can be obtained, and even if there is a momentary interruption in the input, the output can be stable without momentary interruption.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a time constant switching type automatic equalization circuit according to an embodiment of the present invention, Fig. 2 is a block diagram of a conventional automatic equalization circuit, and Fig. 3 is a time chart of waveforms of various parts in one example. It is. In the figure, 1 is a line equalization gain adjustment circuit, 2 is a peak detection integration circuit, 3 is an integrator, 4 is a comparator, and upper range S' 9

Claims (1)

[Claims] The output of the line equalization gain adjustment circuit (1) is output and is also input to a peak detection and integration circuit (2), and the peak detection and integration circuit (2) converts the input amplitude into a stable output. The voltage is compared with a first threshold voltage indicating the voltage, and the portion exceeding the first threshold voltage is detected by an integrating circuit having a small time constant circuit including a resistor (R) and a first capacitor (C1). The line equalization gain adjustment circuit (1) integrates and negative feedbacks the integrated voltage.
In addition, in the line equalization gain adjustment circuit (1), in the automatic equalization circuit that performs gain control so that the amplitude of the output voltage is the same as the first threshold voltage, the time constant circuit is provided with the first threshold voltage. A second capacitor (C2) with a larger capacity than the capacitor (C1) is added to enable switching, and the output of the peak detection integration circuit (2) is integrated by an integrator (3), and the integrated voltage is compared. The first capacitor (C1) of the time constant circuit
) is switched to the second capacitor (C2).