JPH03132695A - Video processor - Google Patents
Video processorInfo
- Publication number
- JPH03132695A JPH03132695A JP1271202A JP27120289A JPH03132695A JP H03132695 A JPH03132695 A JP H03132695A JP 1271202 A JP1271202 A JP 1271202A JP 27120289 A JP27120289 A JP 27120289A JP H03132695 A JPH03132695 A JP H03132695A
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- video
- signal
- video signal
- rgb luminance
- superimposition
- Prior art date
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- 230000001360 synchronised effect Effects 0.000 claims abstract description 5
- 238000012544 monitoring process Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 6
- 239000002131 composite material Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
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Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、複数の動画映像を重ね合わせた映像信号を作
成する映像処理装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video processing device that creates a video signal in which a plurality of moving images are superimposed.
いわゆるパーソナルコンピュータ（パソコン）の分野で
は、パソコン映像の中にテレビ映像などを重ねて表示す
るピクチャーインピクチャーと呼ばれる画像処理が行わ
れるようになってきた。In the field of so-called personal computers (PCs), image processing called picture-in-picture, which displays television images superimposed on computer images, has become popular.
しかしながら、従来の装置では多数の動画映像を重ねた
り、その重ね合わせの順番を切り換えるといった複雑な
重畳処理を行うことが困難であった。However, with conventional devices, it has been difficult to perform complex superimposition processing such as superimposing a large number of moving images or switching the order of superimposition.
本発明の課題は、このような問題点を解消することにあ
る。An object of the present invention is to solve these problems.
上記課題を解決するために、本発明の映像処理装置は複
数の映像重畳回路と重畳順位切換回路とを備えており、
各映像重畳回路は、第１映像信号と第２映像信号とを合
成し、第１映像信号の同期信号に同期したＲＧＢ輝度信
号であって第１映像信号に基づく映像の所定領域に第２
映像信号に基づ（映像を上から重ねた映像のＲＧＢ輝度
信号を出力するものであり、重畳順位切換回路は、基本
映像信号の同期信号を各映像重畳回路に第１映像信号の
同期信号として与える同期信号供給部と、基本映像信号
のＲＧＢ輝度信号を映像重畳回路のいずれかに選択的に
第１映像信号のＲＧＢ輝度信号として与えると共に各映
像重畳回路が出力するＲＧＢ輝度信号を選択的に他の映
像重畳回路の第１映像信号のＲＧＢ輝度信号として与え
るＲＧＢ輝度信号切換部とを備え、いずれかの映像重畳
回路が出力するＲＧＢ輝度信号と基本映像信号の同期信
号とをモニタ用映像信号として出力するものである。In order to solve the above problems, a video processing device of the present invention includes a plurality of video superimposition circuits and a superimposition order switching circuit,
Each video superimposition circuit combines a first video signal and a second video signal, and generates a second video signal in a predetermined area of a video based on the first video signal, which is an RGB luminance signal synchronized with a synchronization signal of the first video signal.
Based on the video signal, it outputs the RGB luminance signal of the video superimposed from above, and the superimposition order switching circuit sends the synchronization signal of the basic video signal to each video superimposition circuit as the synchronization signal of the first video signal. a synchronization signal supply unit that selectively supplies the RGB luminance signal of the basic video signal to one of the video superimposing circuits as the RGB luminance signal of the first video signal, and selectively supplies the RGB luminance signal of the basic video signal as the RGB luminance signal output from each video superimposing circuit. an RGB luminance signal switching unit that supplies the first video signal of the other video superimposing circuit as an RGB luminance signal, and converts the RGB luminance signal outputted from one of the video superimposing circuits and the synchronization signal of the basic video signal into a monitor video signal. This is what is output as.
重畳順位切換回路によって、各映像重畳回路がＲＧＢ輝
度信号に関して鎖状に接続され、各映像重畳回路の第２
映像信号として与えられる映像が基本映像の上に順に重
畳される。また、全映像重畳回路における第１映像信号
の同期信号が基本映像信号の同期信号によって共通化さ
れているので、ＲＧＢ輝度信号に関しての接続順序を切
り換えるだけで、重畳の優先順位が入れ替わる。The superimposition order switching circuit connects the video superimposition circuits in a chain with respect to the RGB luminance signals, and the second video superimposition circuit of each video superimposition circuit
Images provided as video signals are sequentially superimposed on the basic image. Further, since the synchronization signal of the first video signal in all the video superimposition circuits is shared by the synchronization signal of the basic video signal, the priority order of superimposition can be changed simply by switching the connection order regarding the RGB luminance signals.
第１図は本発明の一実施例を示すブロック図である。情
報処理装置であるパソコン本体１は信号線２〜４に自己
が表示したい映像信号を出力する。FIG. 1 is a block diagram showing one embodiment of the present invention. A personal computer main body 1, which is an information processing device, outputs a video signal that it wants to display to signal lines 2-4.
この映像信号は基本映像信号として重畳順位切換回路５
内で加工され、パソコンモニタ６に与えられる。パソコ
ン本体１が出力する映像信号は、同期信号とＲＧＢ輝度
信号に分離されており、信号線２には垂直同期信号ｖ
５ｙｎｃが、信号線３には水平同期信号Ｈ５ｙｎｃが、
信号線４にはＲＧＢ輝度信号がそれぞれ与えられる。This video signal is used as a basic video signal by the superimposition order switching circuit 5.
The image is processed within the computer and provided to the computer monitor 6. The video signal output from the computer main body 1 is separated into a synchronization signal and an RGB luminance signal, and a vertical synchronization signal v is connected to the signal line 2.
5ync, and the horizontal synchronization signal H5ync is on the signal line 3.
RGB luminance signals are applied to the signal lines 4, respectively.
重畳順位切換回路５は、ＲＧＢ輝度輝度信号部換部７期
信号供給部８とで構成されており、映像重畳回路９〜１
１が接続されている。なお、同図では映像重畳回路９〜
１１が重畳順位切換回路５に固定的に接続されているよ
うに描かれているが、実際には接続端子を介して取り外
し容易に接続されている。ＲＧＢ輝度輝度信号部換部７
部における信号線の全ての交差部にビデオスイッチが設
けられており、信号線１５を介してパソコン本体１から
与えられる指令に基づいて、各交差部における接続・非
接続が決定される。The superimposition order switching circuit 5 is composed of an RGB luminance luminance signal switching section 7-stage signal supply section 8, and video superimposition circuits 9 to 1.
1 is connected. In addition, in the same figure, video superimposition circuits 9 to
11 is depicted as being fixedly connected to the superimposition order switching circuit 5, but in reality it is easily detachably connected via a connection terminal. RGB luminance luminance signal converter 7
A video switch is provided at every intersection of the signal lines in the section, and connection/disconnection at each intersection is determined based on a command given from the personal computer main body 1 via the signal line 15.
映像重畳回路９〜１１は、それぞれ第１映像信号用人力
部ａ１第２映像信号用入力部５１制御信号人力部Ｃおよ
び映像信号出力部ｄからなる４種類の入出力部を備えて
いる。第１映像信号入力部ａおよび映像信号出力部ｄは
重畳順位切換回路５に接続されており、制御信号入力部
Ｃは信号線１９を介してパソコン本体１に接続されてお
り、第２映像信号入力部すは重畳されるべ］映像の発生
源１２〜１４に接続されている。映像源とじては、ＴＶ
チューナ、ビデオデツキなどがある。The video superimposition circuits 9 to 11 each include four types of input/output sections, each consisting of a first video signal input section a1, a second video signal input section 51, a control signal input section C, and a video signal output section d. The first video signal input section a and the video signal output section d are connected to the superimposition order switching circuit 5, the control signal input section C is connected to the personal computer main body 1 via the signal line 19, and the second video signal The input portions are connected to video sources 12-14, which should be superimposed. The video source is TV
There are tuners, video decks, etc.
第２図は、映像重畳回路９〜１１の内部構成を示すブロ
ック図である。第２映像信号用入力部すであるビデオ−
インコネクタ２４はＴＶチューナなどの映像発生源１２
〜１４からの複合映像信号を受ける。この複合映像信号
はＡ／Ｄ変換器２５で量子化され、デジタイズメモリ制
御部２７、フレームメモリ２８、モニタメモリ制御部２
９を経ることによって映像の縮小拡大、位置の設定等に
関する処理が為され、Ｄ／Ａ変換器３１で再びアナログ
映像信号に変換される。映像の縮小拡大、位置の設定等
の制御は、タイミングジェネレータ３０がデジタイズメ
モリ制御部２７、フレームメモリ２８、モニタメモリ制
御部２９に対して与える各タイミング信号を調整するこ
とにより行われる。タイミングジェネレータ３０は、同
期信号分離部２６で抽出された第２映像信号の同期信号
および第１映像信号用入力部ａであるパソコン映像入力
コネクタ２０を介して与えられるパソコン映像信号の垂
直同期信号ｖｓｙｎｃおよび水平同期信号Ｈ５ｙｎｃを
基礎とし、パソコン本体１から信号線２１を介して与え
られる映像の縮小拡大、位置の設定に関する指令に応じ
てタイミング信号を制御する。Ｄ／Ａ変換器３１から出
力された映像信号は、信号線３８を介してビデオスイッ
チ３３の一方の固定接点に与えられる。ビデオスイッチ
３３の他方の固定接点にはパソコン映像入力コネクタ２
０から信号線３７を介してパソコン映像のＲＧＢ輝度信
号が与えられる。そして、タイミングジェネレータ３０
からのタイミング信号に基づいてビデオスイッチ３３の
可動接点の切り換えが行われ、これによりパソコン映像
を親の画面とし、外部映像発生源１２〜１４からの映像
を子の画面とする映像のＲＧＢ輝度信号が信号線３９に
出力される。このＲＧＢ輝度信号は、信号線３６上のパ
ソコン映像信号用同期信号と共に映像出力コネクタ３５
に送られる。映像出力コネクタ３５をパソコンモニタの
入力コネクタに接続すれば、基本映像であるパソコン映
像の上の所定の位置に第２映像が重畳された映像がモニ
タ上に得られる。FIG. 2 is a block diagram showing the internal configuration of the video superimposing circuits 9-11. The second video signal input section is the video
The in-connector 24 is a video source 12 such as a TV tuner.
14 receives composite video signals. This composite video signal is quantized by the A/D converter 25 and sent to the digitizing memory controller 27, frame memory 28, and monitor memory controller 2.
9, the video undergoes processing related to reduction/enlargement, position setting, etc., and is converted back into an analog video signal by the D/A converter 31. Controls such as reduction/enlargement of the image, setting of the position, etc. are performed by adjusting each timing signal provided by the timing generator 30 to the digitizing memory control section 27, frame memory 28, and monitor memory control section 29. The timing generator 30 receives the synchronization signal of the second video signal extracted by the synchronization signal separation section 26 and the vertical synchronization signal vsync of the PC video signal provided via the PC video input connector 20 which is the input section a for the first video signal. Based on the horizontal synchronization signal H5ync, the timing signal is controlled in accordance with commands related to image reduction/enlargement and position setting given from the personal computer main body 1 via the signal line 21. The video signal output from the D/A converter 31 is applied to one fixed contact of the video switch 33 via a signal line 38. The other fixed contact of the video switch 33 is connected to the PC video input connector 2.
0 through a signal line 37, RGB luminance signals of a personal computer image are applied. And timing generator 30
The movable contacts of the video switch 33 are switched based on the timing signal from the video switch 33, and the RGB luminance signal of the video is thereby set so that the PC video is the parent screen and the video from the external video sources 12 to 14 is the child screen. is output to the signal line 39. This RGB luminance signal is sent to the video output connector 35 along with the synchronization signal for the PC video signal on the signal line 36.
sent to. When the video output connector 35 is connected to the input connector of a personal computer monitor, an image in which the second image is superimposed at a predetermined position on the computer image, which is the basic image, is obtained on the monitor.
つぎに、第１図に示す本実施例の動作を第３図を参照し
ながら説明する。Next, the operation of this embodiment shown in FIG. 1 will be explained with reference to FIG. 3.
映像発生源１２は映像Ａの映像信号を、映像発生源１３
は映像Ｂの映像信号を、映像発生源１４は映像Ｃの映像
信号をそれぞれ発生しているものとする。パソコン本体
１は、親画面（基本映像）であるパソコン映像の上に、
第３図（Ａ）に示すように映像Ｂ１映像Ｃ１映像Ａの順
に重ねることを重畳順位切換回路５に対して指令してい
るものとする。重畳順位切換回路５はこの指令を受け、
ＲＧＢ輝度輝度信号部換部７内デオスイッチを図中のＸ
印において接続するように切り換える。The video generation source 12 transmits the video signal of video A to the video generation source 13.
It is assumed that the video generation source 14 generates the video signal of video B and the video signal of video C, respectively. The computer main body 1 displays the computer image, which is the main screen (basic image), on top of the computer image.
Assume that the superimposition order switching circuit 5 is instructed to superimpose video B1 video C1 video A in the order shown in FIG. 3(A). The superimposition order switching circuit 5 receives this command,
The RGB luminance luminance signal conversion section 7 internal switch is connected to the X in the figure.
Switch to connect at the mark.
パソコン映像信号の垂直同期信号Ｖ ５ｙｎｃおよび水
平同期信号Ｈ５ｙｎｃは、同期信号供給部８を介して映
像重畳回路９〜１１のそれぞれの第１映像信号用同期信
号入力端子、および同期信号出力端子１６．１７に与え
られる。The vertical synchronizing signal V5ync and the horizontal synchronizing signal H5ync of the personal computer video signal are supplied to the first video signal synchronizing signal input terminals of each of the video superimposing circuits 9 to 11 and the synchronizing signal output terminal 16. given to 17.
パソコン映像信号のＲＧＢ輝度信号は、ＲＧＢ輝度輝度
信号部換部７内デオスイッチ７−１を介して映像重畳回
路１０の第１映像信号用ＲＧＢ輝度信号入力端子に与え
られる。映像重畳回路１０には、第２映像信号として映
像Ｂを作る映像信号が映像発生源１３から与えられてお
り、パソコン本体１から与えられた拡大縮小および位置
に関する指令に基づくパソコン映像内の所定領域に映像
Ｂが第３図（Ｃ）に示すように重畳される。この映像信
号は、ビデオスイッチ７−２および７−３を経て映像重
畳回路１１の第１映像信号用ＲＧＢ輝度信号入力端子に
与えられる。映像重畳回路１１には、第２映像信号とし
て映像Ｃの映像信号が与えられており、パソコン本体１
から与えられた拡大縮小および位置に関する指令に基づ
いて、第３図（Ｃ）の画面にさらに映像Ｃが第３図（Ｄ
）に示すように重畳される。そして、この映像信号はさ
らにビデオスイッチ７−４および７−５を経て映像重畳
回路９の第１映像信号用ＲＧＢ輝度信号入力端子に与え
られ、そこで映像Ａが重畳され、ビデオスイッチ７−６
を介してＲＧＢ輝度信号出力端子１８に与えられる。し
たがって、パソコンモニタ６を出力端子１６〜１８に接
続すれば、第３図（Ａ）に示す画面が得られる。The RGB luminance signal of the personal computer video signal is applied to the RGB luminance signal input terminal for the first video signal of the video superimposition circuit 10 via the deoswitch 7-1 in the RGB luminance/luminance signal section 7. The video superimposition circuit 10 is supplied with a video signal from a video generation source 13 to create a video B as a second video signal, and is configured to superimpose a predetermined area within the computer video based on commands related to enlargement/reduction and position given from the computer main body 1. Image B is superimposed on the image B as shown in FIG. 3(C). This video signal is applied to the first video signal RGB luminance signal input terminal of the video superimposition circuit 11 via video switches 7-2 and 7-3. The video superimposition circuit 11 is given a video signal of video C as a second video signal, and the computer main body 1
Image C is further displayed on the screen of FIG. 3(C) based on instructions regarding scaling and position given from
) are superimposed as shown. This video signal is further applied to the first video signal RGB luminance signal input terminal of the video superimposing circuit 9 via video switches 7-4 and 7-5, where video A is superimposed, and the video switch 7-6
The RGB luminance signal is applied to the RGB luminance signal output terminal 18 via the RGB luminance signal output terminal 18. Therefore, by connecting the personal computer monitor 6 to the output terminals 16 to 18, the screen shown in FIG. 3(A) can be obtained.
第３図（Ｂ）に示すように映像Ａ１映像Ｂ１映像Ｃの順
に重ねたい場合には、ＲＧＢ輝度輝度信号部換部７部の
ビデオスイッチをＯ印のポイントで接続するように切り
換えるだけで容易に達成できる。If you want to superimpose video A1 video B1 video C in the order shown in Figure 3 (B), you can easily switch the video switch of the RGB luminance luminance signal converter section 7 so that it is connected at the point marked O. can be achieved.
以上説明したように本発明の映像処理装置によれば、基
本映像に対して他の複数の映像を順次重畳できると共に
、その重畳順序を極めて簡易に変更することができる。As described above, according to the video processing device of the present invention, a plurality of other videos can be sequentially superimposed on a basic video, and the superimposition order can be changed extremely easily.
第１図は本発明の一実施例を示すブロック図、第２図は
映像重畳回路の内部構成を示すブロック図、第３図は重
畳画面を示す図である。
１・・・パソコン本体、５・・・重畳順位切換回路、６
・・・パソコンモニタ、７・・・ＲＧＢ輝度信号切換部
、８・・・同１期信号供給部、９〜１１・・・映像重畳
回路、１２〜１４・・・映像発生源。
と
ｅ４Ａ重畳口路の内部構成
第２図
映像の重畳状態を示す図（前半）
第３図（１）FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing the internal configuration of a video superimposing circuit, and FIG. 3 is a diagram showing a superimposing screen. 1... Personal computer body, 5... Superimposition order switching circuit, 6
. . . Personal computer monitor, 7 . . . RGB luminance signal switching section, 8 . Fig. 2 Diagram showing the superimposed state of images (first half) Fig. 3 (1)
Claims (1)
の同期信号に同期したＲＧＢ輝度信号であって第１映像
信号に基づく映像の所定領域に第２映像信号に基づく映
像を上から重ねた映像のＲＧＢ輝度信号を出力する複数
の映像重畳回路と、基本映像信号の同期信号を各映像重
畳回路に第１映像信号の同期信号として与える同期信号
供給部と、基本映像信号のＲＧＢ輝度信号を映像重畳回
路のいずれかに選択的に第１映像信号のＲＧＢ輝度信号
として与えると共に各映像重畳回路が出力するＲＧＢ輝
度信号を選択的に他の映像重畳回路の第１映像信号のＲ
ＧＢ輝度信号として与えるＲＧＢ輝度信号切換部とを有
し、いずれかの映像重畳回路が出力するＲＧＢ輝度信号
と基本映像信号の同期信号とをモニタ用映像信号として
出力する重畳順位切換回路と を備えた映像処理装置。[Scope of Claims] A first video signal and a second video signal are combined, and a second video signal is generated in a predetermined area of a video based on the first video signal, which is an RGB luminance signal synchronized with a synchronization signal of the first video signal. a plurality of video superimposition circuits that output RGB luminance signals of a video overlaid with a video based on the signal; and a synchronization signal supply unit that supplies a synchronization signal of the basic video signal to each video superimposition circuit as a synchronization signal of the first video signal. , the RGB luminance signal of the basic video signal is selectively given to one of the video superimposing circuits as the RGB luminance signal of the first video signal, and the RGB luminance signal output from each video superimposing circuit is selectively applied to the other video superimposing circuit. R of the first video signal
and a superimposition order switching circuit that outputs the RGB luminance signal outputted by any of the video superimposition circuits and the synchronization signal of the basic video signal as a monitor video signal. video processing equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1271202A JPH03132695A (en) | 1989-10-18 | 1989-10-18 | Video processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1271202A JPH03132695A (en) | 1989-10-18 | 1989-10-18 | Video processor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03132695A true JPH03132695A (en) | 1991-06-06 |
Family
ID=17496769
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1271202A Pending JPH03132695A (en) | 1989-10-18 | 1989-10-18 | Video processor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03132695A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0744688A (en) * | 1993-07-30 | 1995-02-14 | Sony Corp | Device and method for outputting data |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63177196A (en) * | 1987-01-19 | 1988-07-21 | 株式会社日立製作所 | Display device |
| JPS63248283A (en) * | 1987-04-03 | 1988-10-14 | Fujitsu Ltd | Display synchronization control system |
| JPH01229291A (en) * | 1988-03-09 | 1989-09-12 | Akira Nakano | Electronic hieroglyph unit and electronic hieroglyph machine |
-
1989
- 1989-10-18 JP JP1271202A patent/JPH03132695A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63177196A (en) * | 1987-01-19 | 1988-07-21 | 株式会社日立製作所 | Display device |
| JPS63248283A (en) * | 1987-04-03 | 1988-10-14 | Fujitsu Ltd | Display synchronization control system |
| JPH01229291A (en) * | 1988-03-09 | 1989-09-12 | Akira Nakano | Electronic hieroglyph unit and electronic hieroglyph machine |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0744688A (en) * | 1993-07-30 | 1995-02-14 | Sony Corp | Device and method for outputting data |
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