JPH03132270A - Video signal processor - Google Patents

Abstract

PURPOSE:To attain smooth scene change by writing a desired video signal regenerated from a VTR to a field memory or a frame memory and cross-fading a moving video signal from the video camera and the still picture signal read from the memory when the operation of the video camera is started. CONSTITUTION:A memory means 11 writing a desired one-field or one-frame of a moving video signal regenerated from a video tape recorder 5 and a cross fade means 12 are provided. The cross fading means 12 is constituted of, e.g. a couple of coefficient devices 13, 14 and an adder 15, the coefficient devices 13, 14 include a component such as a read only memory(ROM) and a desired coefficient data is stored in each ROM. When the operation of the video camera 1 is started, the moving video signal from the video camera and the still picture video signal read from the memory means 11 are cross-faded. Thus, a scene change at an editing point is implemented smoothly with simple constitution.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a camera-integrated videotape recorder (V
This invention relates to a video signal processing device suitable for TR) and the like.

[Summary of the Invention] The present invention provides a video signal processing device equipped with a field memory or a frame memory, in which a desired video signal reproduced from a VTR is written into the memory, and when a video camera starts operating, this video signal is By cross-fading the moving image signal from the camera and the still image signal read from the memory, it is possible to smoothly change scenes with a simple configuration.

[Prior Art] Conventionally, when editing video or audio program materials (sources), in order to eliminate the sense of discontinuity at the editing point, the signal level of the preceding source is gradually reduced and faded out, and at the same time the signal level of the subsequent source is faded out. Techniques for gradually increasing the signal level and fading in, so-called dissolves or crossfades, are often used.

[Problems to be Solved by the Invention] However, conventionally, in order to perform crossfading, in addition to two signal sources such as a video camera and a VTR, one additional signal source is required to record the crossfaded video signal.
The problem is that this requires multiple VTRs, which complicates the configuration and requires a large amount of cost.

In view of the above, an object of the present invention is to provide a video signal processing device that has a simple configuration and can smoothly change scenes at editing points.

[Means for Solving Problems] The present invention provides a memory means (11) for writing one desired field or one frame of a moving image signal reproduced from a video tape recorder (5), and a cross-fade means (12). This is a video signal processing device which cross-fades a moving image signal from a video camera (1) and a still image signal read from a memory means when the video camera (1) starts operation.

[Operation] According to the present invention, a scene change at an editing point can be smoothly performed with a simple configuration.

[Embodiment] Hereinafter, an embodiment of a video signal processing device according to the present invention will be described with reference to FIGS. 1 to 3.

FIG. 1 shows the configuration of an embodiment of this invention.

In FIG. 1, (10) shows the video signal processing device as a whole, which is mainly composed of a field memory (11) and a cross-fade circuit (12). Coefficient unit <13)
, (14) and an adder (15).

Both coefficient units (13) and (14) include, for example, read-only memories (ROMs), and required coefficient data is stored in each ROM.

The input video signal St from the video camera (1) passes through the rec side fixed contact and the movable contact of the changeover switch (2).
It is commonly supplied to the field memory (11), the coefficient unit (13), and the ee-side fixed contact of the changeover switch (3).

The video signal Sd delayed by one field period from the field memory (11) is supplied to a coefficient unit (14), and the outputs of both coefficient units (13) and (14) are supplied to an adder (15). The cross-fade video signal Sf output from this adder (15) passes through the wry side fixed contact and moving contact of the switch (3) to the monitor (viewfinder).
(4) and VTR (5): Commonly supplied, VTR (5)
(7) The output is supplied to the pb side fixed contact of switch (2).

A control signal output from a memory control circuit (16) is supplied to the field memory (11). This memory control circuit (16) and changeover switches (2), (3): Coefficient units (13), (14); D is a system control circuit (microcomputer) (6) that is also used as a VTR (5);
From, key (7e).

(7f), (7p), (7r) + (7ss
) Various control signals corresponding to the operation of "" are supplied. Further, the output of the power supply (9) is supplied to each part through the switch (8).

Next, the operation of one embodiment of the present invention will be described with reference to FIGS. 2 and 3.

First, the edit playback key (7e) is operated to put the VTR (5) into the edit playback (edit search) mode, as shown in FIG. 2A. At this time, as shown in B and C of the figure, the switch control signals Scb and Scc are rH and "L", respectively, and the switch (2) is connected to the pb side and the switch (3) is connected to the wry side. Ru. In addition, as shown in the same figure and 2, the memory control signal Scd
and cross-fade control signal See are both "L", the memory (11) is in a writable (through) state, and both coefficient multipliers (13).

The coefficients of (14) each become k=0.

As a result, the reproduced video signal Sp from the VTR (5)
b is supplied to the monitor (4) through the memory (11), and the screen of the monitor (4) displays the images previously taken by the user and
The image of the preceding scene that you are about to edit, for example the third
An image of a mountain as shown in Figure A is displayed.

At time t1, start/stop key (7ss)
is operated, and as shown in FIG. 2A, the VTR (5
) enters the stop mode, the magnetic tape stops running, and the control signal Scb changes from rHJ to rl to J, and the control signal Sc
are switched from "L" to r)IJ, the switch (2) is switched to the rec side, and the switch (3) is switched to the ee side. Further, as shown in the figure, the control signal Scd is switched from rl, J to rHJ, and the memory (11) is switched from the through state to the write inhibit (hold) state.

At this time, the switch (8) is in the on state, and the power supply (9) is in the on state.
) is supplied to each part.

As a result, at the switching time t1, VTR(5)
For example, the video signal of the image of a mountain as shown in FIG. 3A is held in the memory (11). Furthermore, an image of the same mountain is displayed on the screen of the monitor (4).

At time t2, the recording key (7r) and the -time stop key (7p) are operated at the same time, and as shown in FIG. 2A,
The same state is maintained even when the VTR (5) enters the recording-pause mode.

In this state, for example, VTR as shown in FIG.
(5) Point the camera (1) at the subject in the next scene that you want to connect to the σ playback image, such as the jogging person shown in C in the same figure, and operate the fader key (7f) to create a crossfade. The desired scene is determined.

At time t3, start/stop key (7ss)
is operated, and as shown in FIG. 2A, the VTR (5
) enters the recording mode, as shown in B and C in the same figure, the control signal Scb remains rl and J, and the control signal Scc changes to "
H" to r L J, and the switch (3) is switched to the try side while the switch (2) remains on the rec side.

Then, as shown in E in the same figure, during a period from time t3 to time t4 after a predetermined time (for example, 1 second), the control signal Scd is held at rl (J, and the hold state of the memory (11) is At the same time, the control 'a signal Sce is
The cross-fade circuit (12) operates as follows.

The coefficients of coefficient units (13) and (14) are respectively expressed as (
1-k) (O≦≦1), the output of the adder (15), that is, the cross-fade video signal S is expressed as the following equation (1).

Sf -ksi+(1-k)Sd...(1)
In this case, if k gradually increases from 0 to 1 in one second, for example, the still image video signal Sd read out from the memory (11) fades out, and the camera ( The input moving image video signal Si from 1) fades in.

During this cross-fade period (t3 to t4),
As shown in , the images of the preceding scene and the succeeding scene are overlapped and displayed on the screen of the monitor (4), and the still image signal of the preceding scene and the moving image signal of the succeeding scene are overlapped and magnetically generated. recorded on tape.

After time t4, a moving image of a jogging person as shown in FIG. 3C is displayed on the screen of the monitor (4) and recorded on the magnetic tape.

Therefore, when this magnetic tape is played back, the scenes before and after the editing point are clearly switched across the overlapped portion.

Next, another embodiment of the video signal processing device according to the present invention will be described with reference to FIGS. 4 and 5.

The structure of another embodiment of the invention is shown in FIG.

In FIG. 4, parts corresponding to those in FIG. 1 are given the same reference numerals, and redundant explanation will be omitted.

In FIG. 4, (IOc) indicates the video signal processing device as a whole, and the time base correction (TBC) of VTR (5)
In order to support the
IIT), a closed loop is formed, and a cyclic cross-fade circuit is constructed.

This cyclic circuit configuration is similar to a known noise reduction circuit (see Japanese Patent Publication No. 62-3639, etc.).

As is well known, in the case of time axis correction, the timing of successive outputs from the memory varies depending on the jitter of the reproduction signal of the VTR. On the other hand, in the case of noise reduction, cross-fade, etc., the data is read out from the memory with a delay of one field period.

For this reason, in this embodiment, a three-port field memory is used which can obtain two outputs independently of each other.

The input video signal Sl from the video camera (1) passes through the rec side fixed contact and moving contact of the switch (2), the ee side fixed contact of the switch (3), the adder (17), and the subtracter (18). ), and the output signal Sr of the adder (17) is supplied to the field memory (IIT). The first delayed video signal Sdl read from the field memory (IIT) is supplied to the wry side fixed contact of the switch (3), and the second delayed video signal Sd2 delayed by one field period is supplied. is supplied to a subtracter (18), and the input video signal Si is subtracted from this delayed video signal Sd2. The output of the subtracter (18) is supplied to the adder (17) through a coefficient unit (19).

A memory control circuit (16S) is installed in the field memory (IIT).
A control signal from the system control circuit (6) is supplied to the memory control circuit (16S) and the coefficient unit (19). The rest of the configuration is the same as that shown in FIG. 1 above.

Next, the operation of another embodiment of the present invention will be described with reference to FIG.

Initially, the switch (8) is opened and the entire unit is in a power-off state, as shown in FIG. 5A. Also, in the same figure B-
As shown by the broken line in E, each of the control signals Scb to Sce is not output, and the connection state of the switches (2) and (3) is undefined.

At time 111, the switch (8) is turned on, the start/stop key (7ss) is operated, and the VTR (5) enters the stop mode as shown in FIG. As shown in C, the control signal Scb becomes rL, 1, the control signal Scc becomes "I("), the switch (2) is set to the rec side, and the switch (3) is set to the e side.
They are respectively connected to the e side. Also, as shown in the same figure, the control signal Scd becomes r)iJ, and the memory (IIT
) is in a hold state.

This state is the same as at time ti in FIG.
The VTR (5) is configured so that the tape is rewound a little when transitioning from the previous recording mode to the stop mode, and as shown in Figure 5H, the magnetic head (
(not shown) on the tape is in the rw) direction, which is slightly rewound with respect to the final recording point.

When the VTR (5) is switched to the recording pause mode at time t12, as shown in FIG. mode, the switch control signals Scb and Scc are respectively rH as before the time t1 in FIG.
, and "L", and both the memory control signal Scd and the crossfade control signal Sce become "L", and the switch (2) is set to the pb side and the switch (3) is set to the rec side.
The memory (IIT) is in the through state, and the coefficients of both coefficient multipliers (13) and (14) are respectively in the k-0 state.

Furthermore, as shown in FIG. 5H, the tape runs in the forward (fw) direction, and the VTR (5) outputs an image of a previously photographed preceding scene, such as the one shown in FIG. 3A. The image of the mountain is reproduced, and the reproduced video signal Spb is stored in the memory (IIT
) is supplied to the monitor (4).

At time tla, the VTR (5) returns to the recording pause mode, and as shown in FIG. is in the hold state again.

As a result, the image being reproduced from the VTR (5) at time tla, for example, the video signal of a mountain image as shown in FIG. 3A, is held in the memory (IIT). Also, as shown in FIG. 5H, the tape is rewound slightly.

At the time tlJ, as shown in FIG. 5A, V T
When R(5) is switched to recording mode, B and C in the same figure
As shown in , the control signals Scb and Scc become "L", and the switch (2) is switched to the rec side, and the switch (3) is switched to the -ry side. Also, as shown in the same figure, the control signal Scd becomes "L" and the memory (IIT)
is switched to the through state.

As shown in the same figure, during a period from time tlJ to time tls after a predetermined time (for example, 1 second), the control signal See becomes rH, and the loss fade operation is performed as follows.

Assuming that the coefficient of the coefficient unit (19) is k (0≦≦1), the output signal Sf of the adder (17) is expressed as in the following equation (2).

Sf =Si+k(Sd2-3t) =(1-k)Si+kSd2 (2) In this case, contrary to the embodiment shown in FIG. 1 above, for example, in one second,
When k gradually decreases from 1 to O, as shown in FIG.
The input moving image video signal Si from the input video signal Si fades in.

Then, as shown in Figure H, the tape is running in the forward (r-) direction, including the run-up period just before time tlJ,
During the cross-fade period (t14 to t15), the images of the preceding scene and the succeeding scene are overlapped and recorded on the magnetic tape as described above, and after time t15, the video of the succeeding scene is recorded and edited. The scene before and after the point changes smoothly.

In the embodiment shown in FIG. 4, the crossfade circuit forms a closed loop and is configured in a cyclic manner, and the video signal read out in line order from the memory (IIT) passes through this closed loop and returns to the memory (IIT). However, due to the signal processing time in the coefficient unit (19) etc., the line where the video signal after coefficient multiplication is written is the same as the line from which the original video signal was read.

In the embodiment shown in FIG. 4, the timing control of the field memory (IIT) is simpler and the scale of the memory control circuit (16S) is smaller than in the embodiment shown in FIG. 1 described above.

Note that in the above embodiment, a field memory is used, but a frame memory may also be used.

In addition, when the cross-fade circuit forms a closed loop and is configured in a cyclic manner, as in the embodiment shown in FIG. 4, noise reduction and so-called multiple Strobe 1, Cran still/
It is also used for slow playback, etc.

[Effects of the Invention] As described in detail above, according to the present invention, a desired video signal reproduced from a VTR is written into a field memory or a frame memory, and when the video camera starts operating, By cross-fading the moving image signal from the camera and the still image signal read from the memory, it is possible to obtain a video signal processing device with a simple configuration that can smoothly change the scene at the editing point. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of a video signal processing device according to the invention, FIG. 2 is a time chart for explaining the operation of an embodiment of the invention, and FIG. 3 is an example of an embodiment of the invention. FIG. 4 is a block diagram showing the configuration of another embodiment of the present invention. FIG. 5 is a time chart for explaining the operation of another embodiment of the present invention. It is. (1) is a video camera, (4) is a monitor, (5) is a VT
R. (6) is a system control circuit (microcomputer);
(10), (IOC) is a video signal processing device, (11
), (IIT) is field memory, (12) is cross-fade circuit, (13), + (14), (
19) is a coefficient unit, (16), (16S) is / -E
- It is a control circuit. Agent Hidemori Matsukuma

Claims (1)

[Claims] A video camera comprising memory means for writing one desired field or one frame of a moving image signal reproduced from a video tape recorder, and cross-fade means, when the video camera starts operating. A video signal processing device characterized in that the video signal processing device is configured to cross-fade a moving picture video signal from the camera and a still picture video signal read from the memory means.