JPH03132207A - Automatic gain controller - Google Patents

Automatic gain controller

Info

Publication number
JPH03132207A
JPH03132207A JP27071989A JP27071989A JPH03132207A JP H03132207 A JPH03132207 A JP H03132207A JP 27071989 A JP27071989 A JP 27071989A JP 27071989 A JP27071989 A JP 27071989A JP H03132207 A JPH03132207 A JP H03132207A
Authority
JP
Japan
Prior art keywords
gain coefficient
gain
adder
calculated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27071989A
Other languages
Japanese (ja)
Other versions
JPH0732338B2 (en
Inventor
Mihoko Hirano
平野 美穂子
Hisashi Naito
内藤 悠史
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1270719A priority Critical patent/JPH0732338B2/en
Publication of JPH03132207A publication Critical patent/JPH03132207A/en
Publication of JPH0732338B2 publication Critical patent/JPH0732338B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To obtain a stable gain by providing a comparison means to find whether or not a difference between a calculated gain coefficient and a gain coefficient in preceding sampling is within a range set in advance, and a selection means to select the gain coefficient corresponding to a comparison result at a gain coefficient generating part. CONSTITUTION:The gain coefficient generating part 5 is equipped with an adder 53 which finds the difference between the gain coefficient calculated with an adder 52 and that in the preceding sampling from a delay circuit T2, an absolute value circuit 54 which makes the above calculated output into an absolute value, and a comparator 55 which finds whether or not the output is within the range Wf between upper and lower limits set in advance. Also, it is equipped with a switching circuit 56 which performs the switching of a switch to an off side to select and supply the gain coefficient in the preceding sampling in the delay circuit T2 to a multiplier 2 based on a command from the comparator 55 when the output is within a set range, and also, selects the gain coefficient calculated newly with the adder 52 and performs the switching of the switch to an on side to supply it to the multiplier 2 when it is outside the set range. Thereby, the stable gain can be obtained.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、電話回線における音声合成(ミキシング)
や音声レベル調整など音声信号処理に用いられるディジ
タル形の自動利得制御装置に関する。
[Detailed Description of the Invention] (Industrial Application Field) This invention relates to speech synthesis (mixing) on a telephone line.
This invention relates to a digital automatic gain control device used for audio signal processing such as sound level adjustment and audio signal processing.

(従来の技術〕 近年、通信分野の発展はめざましいものであり、数々の
新しい製品が生み出されている0例えば、複数の端末を
接続することで互いに離れた場所にいる人が移動するこ
となく会議を行なうことのできるTV会議システムや、
受信側の人間が不在の場合でも音声の伝言を残すことの
できる音声メール装置などはその顕著な例であり、これ
によって時間の節約が可能な限り行なわれている。
(Conventional technology) In recent years, the field of communications has made remarkable progress, and many new products have been created. A TV conference system that allows you to
A prominent example is a voice mail system that allows voice messages to be left even when the person on the receiving end is not available, thereby saving as much time as possible.

こうした新しい発明が忙しい都市社会で果たす役割は大
きく、あらゆる視点から多大な関心が寄せられている。
The role these new inventions play in our busy urban societies is significant, and they are of great interest from all perspectives.

最近では、より自然な音声と安価な使用料金の実現が望
まれており伝送分野での新たな革新が期待されている。
Recently, there has been a desire to realize more natural sound and lower usage fees, and new innovations in the transmission field are expected.

この高品質な音声の実現に応えるものの1つに自動利得
制御装置がある。自動利得制御(Auto−matic
 Ga1n Contorol、以下AGCと記す)と
け入力信号レベルの範囲が広い場合にもその出力を一定
の範囲に保つ働きを言い、伝送に伴う損失を補い送受信
の信号レベルの大きさを調整するために音声信号処理に
も用いられ、通信分野の発展に大きく貢献している。
An automatic gain control device is one of the devices that help achieve this high quality audio. Automatic gain control
Ga1n Control (hereinafter referred to as AGC) is a function that maintains the output within a certain range even when the range of input signal levels is wide. It is also used in signal processing and has greatly contributed to the development of the communications field.

このAGC作用は通常演算増幅器を用いたアナログ回路
によって行なわれてきた。ところが近年のディジタル処
理技術の発展により、このAGC作用をディジタル回路
によって行なわせることが可能となってきた。さらに現
在ではディジタル信号処理用プロセッサシステムでディ
ジタル形AGC回路を実現しているものも多く、より限
定された目的のためのAGC装置が開発されつつある。
This AGC function has normally been performed by an analog circuit using an operational amplifier. However, with the recent development of digital processing technology, it has become possible to perform this AGC function using a digital circuit. Furthermore, many digital signal processing processor systems are now implementing digital AGC circuits, and AGC devices for more limited purposes are being developed.

第3図はディジタル形AGC装置の概要を示すシステム
図の一例である。AGCをかけるべきアナログ信号^t
nは、A10変換器(1)によりディジタル信号Xに変
換され、該ディジタル信号Xはディジタル形AGCシス
テムのAGCループAL内に入力される。ここで、乗算
器(2) に入り、利得係数へgとの乗算が行なわれて
AGC出力yすなわち、y−八g−Xとなる。出力yは
分岐されてレベル検出回路(3)及び平均化回路(4)
 を経て利得係数発生部(5) に入る。ここに利得係
数へgは利得ループALを一巡することにより各出力y
毎に定まる。
FIG. 3 is an example of a system diagram showing an overview of a digital AGC device. Analog signal to which AGC should be applied ^t
n is converted into a digital signal X by an A10 converter (1), which digital signal X is input into the AGC loop AL of the digital AGC system. Here, the signal enters the multiplier (2), where the gain coefficient is multiplied by g, resulting in the AGC output y, that is, y-8g-X. Output y is branched to level detection circuit (3) and averaging circuit (4)
It then enters the gain coefficient generator (5). Here, the gain coefficient g is changed to each output y by going around the gain loop AL.
Determined each time.

上記第3図における利得ループALをハードウェア的に
実現するものの一例として、例えば第4図に示す如く、
特公昭63−19089号公報に示されたものがある。
As an example of hardware implementation of the gain loop AL in FIG. 3, as shown in FIG. 4, for example,
There is one shown in Japanese Patent Publication No. 19089/1989.

以下、第4図の動作について詳しく説明する。The operation shown in FIG. 4 will be explained in detail below.

入力音声信号^1oは、^/D変換器(1)によりディ
ジタル信号Xに変換された後、本回路へ与えられる。デ
ィジタル入力信号Xはまず乗算器(2)に入力され、こ
こで利得係数Agとの乗算が行なわれて利得出力信号y
が算出される。ディジタル出力信号yは利得ループ内に
分岐されて、先ずレベルを検出するために二乗回路(3
1)を介して加算器(32)に入力される。ただし、加
算器(32)にはマイナス入力として入力される。加算
器(32)には別途基準値Drが印加されており、出力
yがD「を越えるときは負の入力として、逆にyがOr
を下回るときは正の入力として乗算器(41)に与えら
れ、一定の重みづけ(重み係数a)がなされる。この乗
算器(41)を含めて加算器(42)ならびに遅延回路
T1が平均化を行なう。なお、乗算器(51)に対する
b1加算器(52)に対する1、0は共に重みづけに係
わるものであり、ここで利得係数へgを決定、発生する
The input audio signal ^1o is converted into a digital signal X by the ^/D converter (1) and then applied to this circuit. The digital input signal
is calculated. The digital output signal y is branched into a gain loop and first a squaring circuit (3
1) is input to the adder (32). However, it is input to the adder (32) as a negative input. A reference value Dr is separately applied to the adder (32), and when the output y exceeds D, it is used as a negative input, and conversely, when y exceeds Or
When it is less than , it is given as a positive input to the multiplier (41), and given a certain weight (weighting coefficient a). The adder (42) and delay circuit T1 including this multiplier (41) perform averaging. Note that 1 and 0 for the b1 adder (52) for the multiplier (51) are both related to weighting, and g is determined and generated for the gain coefficient here.

(発明が解決しようとする課題) 従来のディジタル形AGC装置は以上のようにして構成
されているので次のような問題点がある。すなわち、第
4図において、入力の対象である音声信号はその振幅の
範囲が広い上に短時間で大きく変動する性買を有してい
るので、先に述べたように信号がAGCループALに入
力され、巡する毎にこのレベルを算出し、それを基に信
号利得値を求めるAGCループでは、利得係数へ8の値
はサンプル毎に異なり、AGCシステムが入力信号に与
える利得値は安定した値とならないため、再生音を聴く
上でかえって不自然な感じを与える恐れがある。
(Problems to be Solved by the Invention) Since the conventional digital AGC device is configured as described above, it has the following problems. That is, in FIG. 4, the audio signal that is the input target has a wide range of amplitude and has a characteristic that fluctuates greatly in a short period of time. In the AGC loop, which calculates this level each time it is input and calculates the signal gain value based on it, the value of 8 to the gain coefficient differs for each sample, and the gain value that the AGC system gives to the input signal is stable. Since it is not a value, it may give an unnatural feeling when listening to the reproduced sound.

この発明は、上記のような問題点を解消するためになさ
れもので、入力信号として対象となる音声データが会話
を行う上でより自然なレベル調整を受けるように安定し
た利得を発生させることのできるディジタル利得装置を
得ることを目的とする。
This invention was made in order to solve the above-mentioned problems, and is to generate a stable gain so that the target audio data as an input signal undergoes a more natural level adjustment during conversation. The purpose is to obtain a digital gain device that can

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係る自動利得制御装置は、人力信号に所定の
利得係数を乗算した乗算出力のレベルを検出し、その検
出レベルに基づいて平均値を抽出して、該平均値に基づ
いて新たな利得係数を算出する利得係数発生部を有する
自動利得制御ループを備えた自動利得制御装置において
、上記利得係数発生部に、算出された利得係数と前サン
プル時の利得係数との差が予め設定した範囲内にあるか
否かを求める比較手段と、設定範囲内にある時前サンプ
ル時の利得係数を選択すると共に、設定範囲外にある時
は上記平均値の抽出に基づいて算出される新たな利得係
数を選択する選択切換手段とを備えたものである。
The automatic gain control device according to the present invention detects the level of a multiplication output obtained by multiplying a human input signal by a predetermined gain coefficient, extracts an average value based on the detected level, and calculates a new gain based on the average value. In an automatic gain control device equipped with an automatic gain control loop having a gain coefficient generation section that calculates a coefficient, the gain coefficient generation section has a preset range for the difference between the calculated gain coefficient and the gain coefficient at the time of the previous sample. a comparison means for determining whether or not it is within the set range, and a gain coefficient at the previous sample when it is within the set range, and a new gain calculated based on the extraction of the above average value when it is outside the set range. and selection switching means for selecting coefficients.

(作用) この発明における自動利得制御装置においては、利得係
数発生部において、比較手段により、算出された利得係
数と前サンプル時の利得係数との差が予め設定した範囲
内にあるか否かが求められ、選択切換手段により、設定
範囲内にある時は前サンプル時の利得係数が選択される
と共に、設定範囲外にある時は新たに算出される利得係
数が選択される。
(Function) In the automatic gain control device according to the present invention, in the gain coefficient generation section, the comparison means determines whether or not the difference between the calculated gain coefficient and the gain coefficient at the time of the previous sample is within a preset range. The selection switching means selects the gain coefficient of the previous sample when it is within the set range, and selects the newly calculated gain coefficient when it is outside the set range.

〔実施例〕〔Example〕

以下、この発明の一実施例を第3図及び第4図と同一部
分は同一符号を付して示す第1図について説明する。第
1図はこの発明の一実施例を示すブロック図であり、(
1)〜(5)  、(31)、(32)、(41)。
Hereinafter, an embodiment of the present invention will be described with reference to FIG. 1, in which the same parts as in FIGS. 3 and 4 are denoted by the same reference numerals. FIG. 1 is a block diagram showing an embodiment of the present invention.
1) to (5), (31), (32), (41).

(42) 、 (51)   (52)およびT1は第
4図に示した従来装置と同一のものである。この実施例
において、第4図と異なる点は、利得係数発生部(5)
 に、加算器(52)により算出された利得係数と遅延
回路T。
(42), (51), (52) and T1 are the same as those in the conventional device shown in FIG. In this embodiment, the difference from FIG. 4 is that the gain coefficient generator (5)
, the gain coefficient calculated by the adder (52) and the delay circuit T.

からの前サンプル時の利得係数との差を求める加算器(
53)と、その加算出力を絶対値化する絶対値回路(5
4)と、その出力が予め設定した上限と下限の範囲If
内にあるか否かを求める比較器(55)と、その設定範
囲にある時比較器(55)の指令に基づき遅延回路T、
内の前サンプル時の利得係数を選択して乗算器(2)に
与えるべくオフ側にスイッチ切り替えを行うと共に、設
定範囲外にある時は加算器(52)により新たに算出さ
れる利得係数を選択して乗算器(2) に与えるべくオ
ン側にスイッチ切り替えを行うスイッチ回路(56)を
備えた点である。
An adder (
53) and an absolute value circuit (5
4) and its output is within the preset upper and lower limit range If
A comparator (55) that determines whether or not it is within the set range, and a delay circuit T based on the command of the comparator (55) when it is within the set range.
The switch is switched to the off side to select the gain coefficient at the previous sample within and give it to the multiplier (2), and when the gain coefficient is outside the setting range, the gain coefficient newly calculated by the adder (52) is selected. The point is that a switch circuit (56) is provided which switches the switch to the on side so as to selectively apply the signal to the multiplier (2).

次に、動作について詳しく説明する。この実施例におけ
る自動利得制御装置は従来例のディジタル形AGC装置
と同様、アナログの音声入力信号^凰、を^/D変換器
によりディジタル信号Xに変換した後、AGCループ内
に入力し順次ディジタル演算処理を行っていくものであ
る。いまn番目のサンプル値のディジタル信号xnがA
GCループに入力されたとする。利得係数発生部(5)
に入力されるまでは、従来例と同様の処理を施される。
Next, the operation will be explained in detail. Similar to the conventional digital AGC device, the automatic gain control device in this embodiment converts an analog audio input signal ヌ into a digital signal It performs arithmetic processing. The digital signal xn of the nth sample value is now A
Suppose that it is input to the GC loop. Gain coefficient generator (5)
Until it is input, the same processing as in the conventional example is performed.

その後は利得係数発生部(5)に入力され、引き続き次
のような処理を行う。すなわち、入力ディジタル信号X
nがAGCループを一巡する間に、従来例と同様の処理
によって加算器(52)により利得係数Agnを算出す
る。これを加算器(53)に入力し、前サンプルXn−
1に対して与えられた利得係数、即ち、遅延回路T2を
経て加算器(53)に入力される利得係数^gn−rと
の差を算出する。加算器(53)の出力はその絶対値を
取る絶対値回路(54)を経て、続けて比較器(55)
に入力する。そして、利得の変動を無視する幅として別
途設定した基準値Wfと比較する。ここで2つの値Ag
nと^gn−+ との差がWfより大きい時は、スイッ
チ回路(56)はON側に接続され、利得係数は新しい
値に書き替えられ利得係数はAgn となる。逆に差が
Ifより小さい時は、スイッチ回路(56)はOFF側
に接続となり、そして現サンプルに対する利得係数^g
n−1が遅延回路T2から与えられる。
Thereafter, the signal is input to the gain coefficient generating section (5), and the following processing is subsequently performed. That is, the input digital signal
While n goes around the AGC loop, the adder (52) calculates the gain coefficient Agn by the same process as in the conventional example. This is input to the adder (53) and the previous sample Xn-
1, that is, the difference from the gain coefficient ^gn-r inputted to the adder (53) via the delay circuit T2. The output of the adder (53) passes through an absolute value circuit (54) that takes its absolute value, and then passes through a comparator (55).
Enter. Then, it is compared with a reference value Wf that is separately set as a width for ignoring gain fluctuations. Here two values Ag
When the difference between n and ^gn-+ is larger than Wf, the switch circuit (56) is connected to the ON side, and the gain coefficient is rewritten to a new value and becomes Agn. Conversely, when the difference is smaller than If, the switch circuit (56) is connected to the OFF side, and the gain coefficient ^g for the current sample is
n-1 is given from delay circuit T2.

第2図は各部波形を示し、(a)に示すような音声信号
が入力された時、加算器(52)より出力される値(同
図(b))、加算器(53)の出力信号(同図(c))
、比較器(55)より発生するスイッチ回路(56)の
切り替えを行う信号(同図(d))、利得係数発生部(
5) より出力される利得値Ag(同図(e))をそれ
ぞれ示している。この図からも分るよ−うに、本発明を
適用したAGC回路からは、微小変動を無視した安定し
た利得を得ることができる。
Figure 2 shows the waveforms of each part, and when the audio signal shown in (a) is input, the value output from the adder (52) ((b) in the same figure), the output signal of the adder (53) (Figure (c))
, a signal generated by the comparator (55) for switching the switch circuit (56) (see (d) in the figure), a gain coefficient generator (
5) The gain values Ag outputted from (e) in the same figure are shown respectively. As can be seen from this figure, the AGC circuit to which the present invention is applied can obtain a stable gain ignoring minute fluctuations.

従って、音声の伝送においても安定した利得を確保し、
電話回線などにおいて自然な通話を行うことができると
いう効果がある。
Therefore, stable gain is ensured even in audio transmission,
This has the effect of allowing natural conversations to be made over a telephone line or the like.

なお、上記実施例では、ある基準値以内の微小変動を無
視する回路を利得係数発生部(5)内に設けているが、
この代わりに平均化回路(4)内に設けて最も新しいデ
ータによる平均値が前出の利得値を算出するに当たって
参照した平均値に比べ差が小さいときには、これを無視
するようにしても同様の効果がある。
Note that in the above embodiment, a circuit that ignores minute fluctuations within a certain reference value is provided in the gain coefficient generating section (5);
Alternatively, the averaging circuit (4) may be provided to ignore this when the average value based on the newest data has a smaller difference than the average value referred to when calculating the gain value. effective.

また、上記実施例ではハードウェア処理を中心とした動
作を行うようにしであるが、この代わりにプロセッサを
中心としたソフトウェア処理で行うことも可能である。
Further, in the above embodiment, the operation is performed mainly by hardware processing, but instead, it is also possible to perform the operation by software processing mainly by the processor.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、AGCループ内を一巡
する度に所定の演算により算出される連続する利得値の
微小変動を無視することで、安定した利得が得られ、こ
れにより、音声信号のように短時間に振幅の範囲が大き
く変動するものが制御対象となっても安定した利得を得
ることができるという効果がある。
As described above, according to the present invention, a stable gain can be obtained by ignoring small fluctuations in the continuous gain value calculated by a predetermined calculation each time it goes around the AGC loop, and thereby the audio signal This has the effect that a stable gain can be obtained even if the control target is something whose amplitude range fluctuates greatly in a short period of time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はディジタル形AGC装置の概要を示す構成図、
′s2図は第1図の各部出力波形図、第3図は従来のデ
ィジタル形利得システムの概要を示すシステム図、第4
図は第3図をハードウェア的に示すブロック図である。 (31) 、 (32)はレベル検出回路(3)を構成
する二乗回路と加算器 (41) 、 (42) 、丁、は平均化回路(4)を
構成する乗算器と加算器及び遅延回路 (51)〜(56)、T2は順次、利得制御係数発生部
(5)を構成する乗算器、加算器、加算器、絶対値回路
、比較器、及びスイッチ回路と遅延回路ALは自動利得
制御ループ なお、各図中、同一符号は同−又は相当部分を示・す。
FIG. 1 is a configuration diagram showing an overview of a digital AGC device,
's2 diagram is an output waveform diagram of each part in Figure 1, Figure 3 is a system diagram showing an overview of a conventional digital gain system, and Figure 4 is a diagram showing the output waveform of each part in Figure 1.
The figure is a block diagram showing the hardware of FIG. 3. (31), (32) are the squaring circuit and adder (41), (42) that constitute the level detection circuit (3), and the multiplier, adder, and delay circuit that constitute the averaging circuit (4). (51) to (56), T2 is sequentially a multiplier, an adder, an adder, an absolute value circuit, a comparator, and a switch circuit and a delay circuit AL are automatic gain control which constitute the gain control coefficient generation section (5). In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 入力信号に所定の利得係数を乗算した乗算出力のレベル
を検出し、その検出レベルに基づいて平均値を抽出して
、該平均値に基づいて新たな利得係数を算出する利得係
数発生部を有する自動利得制御ループを備えた自動利得
制御装置において、上記利得係数発生部に、算出された
利得係数と前サンプル時の利得係数との差が予め設定し
た範囲内にあるか否かを求める比較手段と、設定範囲内
にある時前サンプル時の利得係数を選択すると共に、設
定範囲外にある時は上記平均値の抽出に基づいて算出さ
れる新たな利得係数を選択する選択切換手段とを備えた
ことを特徴とする自動利得制御装置。
It has a gain coefficient generation unit that detects the level of the multiplication output obtained by multiplying the input signal by a predetermined gain coefficient, extracts an average value based on the detected level, and calculates a new gain coefficient based on the average value. In an automatic gain control device equipped with an automatic gain control loop, the gain coefficient generation section includes a comparison means for determining whether a difference between the calculated gain coefficient and the gain coefficient at the time of the previous sample is within a preset range. and selection switching means for selecting the gain coefficient at the time of the previous sample when it is within the set range, and selecting a new gain coefficient calculated based on the extraction of the average value when it is outside the set range. An automatic gain control device characterized by:
JP1270719A 1989-10-18 1989-10-18 Automatic gain control device Expired - Fee Related JPH0732338B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1270719A JPH0732338B2 (en) 1989-10-18 1989-10-18 Automatic gain control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1270719A JPH0732338B2 (en) 1989-10-18 1989-10-18 Automatic gain control device

Publications (2)

Publication Number Publication Date
JPH03132207A true JPH03132207A (en) 1991-06-05
JPH0732338B2 JPH0732338B2 (en) 1995-04-10

Family

ID=17490008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1270719A Expired - Fee Related JPH0732338B2 (en) 1989-10-18 1989-10-18 Automatic gain control device

Country Status (1)

Country Link
JP (1) JPH0732338B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566516A (en) * 1979-06-28 1981-01-23 Fujitsu Ltd Automatic gain control circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566516A (en) * 1979-06-28 1981-01-23 Fujitsu Ltd Automatic gain control circuit

Also Published As

Publication number Publication date
JPH0732338B2 (en) 1995-04-10

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