JPH03131179A - Video signal processing device - Google Patents

Abstract

PURPOSE:To smooth the conversion at an editing point with a simple constitution by cross-faking a moving picture video signal and a still picture video signal when the moving picture video signal at the time of stopping the operation of a video camera is written in a field memory or a frame memory and the video camera is operated again. CONSTITUTION:An input video signal Si from a video camera 1 is supplied in common to a field memory 11, a coefficient device 13 and a fixed contact at the position (ee) of a changeover switch 3 via a fixed contact of rec position of a changeover switch 2 and a moving contact. A video signal Sd delayed by one field period is fed to a coefficient device 14 from the field memory 11 and an output of both the coefficient devices 13, 14 is fed to an adder 15. A cross fade video signal Sf outputted from the adder 15 is fed in common to a monitor (view finder) 4 and a VTR 5 via a fixed contact (mry) and a moving contact of the switch 3 and an output of the VTR 5 is fed to a fixed contact (pb) of the switch 2. A control signal outputted from a memory control circuit 16 is fed respectively to a couple of the coefficient devices 13, 14 and the field memory 11.

Description

[Detailed description of the invention] [Industrial application fields] This invention was developed for consumer video cameras. The present invention relates to a video signal processing device.

[Summary of the Invention] The present invention is a video signal processing device equipped with a field memory or a frame memory, in which a video signal is written to the memory when the operation of the video camera is stopped, and when the video camera is restarted. During operation, by cross-fading the video video signal from the video camera and the still image video signal read from the memory, it is possible to smoothly change the scene at the editing point with a circular configuration. This is how it was done.

[Prior Art] Conventionally, when editing video or audio program materials (sources), in order to eliminate the sense of discontinuity at the editing point, the signal level of the preceding source is gradually reduced and faded out, and at the same time the signal level of the subsequent source is faded out. Techniques for gradually increasing the signal level and fading in, so-called dissolves or crossfades, are often used.

[Problems to be Solved by the Invention] However, conventionally, in order to perform crossfading, in addition to two signal sources such as a video camera and a VTR, one additional signal source is required to record the crossfaded video signal.
The problem is that this requires multiple VTRs, which complicates the configuration and requires a large amount of cost.

In view of the above, an object of the present invention is to provide a video signal processing device that has a simple configuration and can smoothly change scenes at editing points.

[Means for Solving the Problems] The present invention includes a memory means (11) for writing one desired field or one frame of a moving image signal from a video camera (1), and a cross-fade means (12), The moving image signal when stopping the operation of the video camera is written into the memory means, and when the video camera is started again, the moving image signal from the video camera and the still image image signal read from the memory means are cross-fade. This is a video signal processing device designed to perform the following steps.

[Operation] According to the present invention, a scene change at an editing point can be smoothly performed with a simple configuration.

[Embodiment] Hereinafter, an embodiment of a video signal processing device according to the present invention will be described with reference to FIGS. 1 to 3.

FIG. 1 shows the configuration of an embodiment of the present invention.

In FIG. 1, (10) shows the video signal processing device as a whole, which is mainly composed of a field memory (11) and a cross-fade circuit (12). Coefficient unit (13)
, (14) and an adder (15).

Both coefficient units (13) and (14) include, for example, read-only memories (ROMs), and required coefficient data is stored in each ROM.

The input video signal Si from the video camera (1) passes through the rec side fixed contact and the movable contact of the changeover switch (2).
It is commonly supplied to the field memory (11), the coefficient unit (13), and the ee-side fixed contact of the changeover switch (3).

The video signal Sd delayed by one field period from the field memory (11) is supplied to a coefficient unit (14), and the outputs of both coefficient units (13) and (14) are supplied to an adder (15). The cross-fade video signal Sf output from this adder (15) passes through the wry side fixed contact and moving contact of the switch (3) to the monitor (viewfinder).
(4) and V T R (5), and V T
The output of R (5) is supplied to the pb side fixed contact of switch (2).

The control signal output from the memory control circuit (16) is transmitted to the field memory (11) and a pair of coefficient multipliers (13), (
14) respectively. Changeover switch (2)
, (3) and the memory control circuit (16) have VTR
(5) System control circuit (microcomputer) (
From 6), keys (7f), (7p), (7r)
, (7s) . . . Various control signals corresponding to the operations of = are supplied.

Next, the operation of the video signal processing apparatus according to the present invention will be explained with reference to FIGS. 2 and 3.

At first, the recording key (7r) and the -time stop key (7p) are operated at the same time, and as shown in FIG. 2A, the VTR (5)
is in record-pause mode.

At this time, as shown in Figures B and C, the switch control signals Scb and Scc are "L" and rH, respectively.

The switch (2) is connected to the REC side, the switch (3) is connected to the EE side, and the video signal Si from the camera (1) is directly supplied to the monitor (4). Also,
As shown in 11D, the memory control signal Scd is rH.

, memory (11) is write-protected (hold)
state, and some previously captured video signal is being held. Then, on the screen of the monitor (4), an image of a preceding scene that the user is about to photograph, for example, an image of a mountain as shown in FIG. 3A, is displayed.

At time t1, when the start key (7s) is operated and the VTR (5) enters the recording mode as shown in FIG. 2A, the control signal Scb becomes " remains at "L", and the control signal Scc changes from rHJ to "L"
The switch (3) is switched to the mry side while the switch (2) remains connected to the rec side. Also, as shown in the same figure, the control signal Scd is rHJ
to "L", and the memory (11) is switched from the hold state to the writable (through) state. As shown in the same figure, the cross-fade control signal Sce is "L", and both coefficient multipliers (13), (
14) are each in the state of =0.

As a result, the video signal Si from the camera (1) passes through the memory (11) and the cross-fade circuit (12) without any level control, as shown in FIG. (5), and an image of an object in the preceding scene, for example a mountain as shown in FIG. 3A, is recorded on the magnetic tape.

At time 12, when the - hour stop key (7p) is operated and the VTR (5) enters the recording pause mode again as shown in Figure 2A, the magnetic tape stops running and the As shown in B and C, the control signal Scb remains at "L", the control signal Scc switches from "L" to rH, and the switch (3) remains connected to the rec side while the switch (2) remains connected to the rec side. ) is switched to the ee side. Further, as shown in the same figure, the control signal Scd is r L J
to rl(J, and the memory (11) is switched from the through state to the hold state.

As a result, at switching time t2, VTR(5)
For example, the video signal of a mountain image as shown in FIG. 3A is held in the memory (11). Furthermore, the image of the same mountain is displayed on the screen of Moori (4).

In this state, the camera (1) is aimed at the subject of the next scene, for example, the jogging person shown in Figure 3C, and the fader key (7f) is operated to determine the scene to be cross-fade. be done.

[At point 3, the start key (7s) is operated and V
When TR(5) goes into recording mode again, Figure 2B.

As shown in C, the control signals Scb and Scc are in the same state as at time t1, and the switch (2) is connected to the rec side and the switch (3) is connected to the mry side.

Then, as shown in E in the figure, the control signal Scd is held at r) (J and held in the memory (11) for a period from time t3 to time 4, which is a predetermined time (for example, 1 second) later). As the state is extended, the control signal Sce becomes “H”.
J, and the crossfade circuit (12) operates as follows.

The coefficients of coefficient units (13) and (14) are respectively set as (1
−k) (0≦to≦1), the output of the adder (15),
That is, the cross-fade video signal Sf is expressed as in the following equation (1).

Sf = kSi + (1k) Sd (1) In this case, if k gradually increases from O to 1 in 1 second, for example, as shown in Fig. 2 F and G, the data will be read from the memory (11). At the same time as the still image video signal Sd fades out, the human-powered moving image signal Si from the camera (1) fades in.

During this cross-fade period (t3 to t4),
As shown in , the images of the preceding scene and the succeeding scene are overlapped and displayed on the screen of the monitor (4), and the still image signal of the preceding scene and the moving image signal of the succeeding scene are overlapped and magnetically generated. recorded on tape.

After time t4, a moving image of a jogging person as shown in FIG. 3C is displayed on the screen of the monitor (4) and recorded on the magnetic tape.

Therefore, when this magnetic tape is played back, the scenes before and after the editing point are smoothly changed across the overlapped portion.

Next, another embodiment of the video signal processing device according to the present invention will be described with reference to FIG.

The structure of another embodiment of the invention is shown in FIG.

In FIG. 4, parts corresponding to those in FIG. 1 are given the same reference numerals, and redundant explanation will be omitted.

In FIG. 4, (IOC) indicates the video signal processing device as a whole, and includes a field memory (11) to form a loop, thereby configuring a cyclic cross-fade circuit.

This cyclic circuit configuration is similar to a known noise reduction circuit (see Japanese Patent Publication No. 62-3639, etc.).

A human input video signal Si from the video camera (1) passes through the rec side fixed contact and the movable contact of the switch (2), the ee side fixed contact of the switch (3), the adder (17), and the subtracter (18). Commonly supplied to The output signal Sf of the adder (17) is supplied to the mry side fixed contact of the switch (3), and is also supplied to the field memory (11).

The video signal Sd delayed by one field period is supplied from the field memory (11) to a subtracter (18), and the input video signal Si is subtracted from the delayed video signal Sd. The output of the subtracter (18) is supplied to the adder (17) through a coefficient unit (19).

A control signal from the memory control circuit (16s) is supplied to the field memory (11), and a control signal from the system control circuit (6) is supplied to the memory control circuit (16S) and the coefficient unit (19). The rest of the configuration is the same as that shown in FIG. 1 above.

The crossfade operation of the embodiment of FIG. 4 is as follows.

Assuming that the coefficient of the coefficient unit (19) is k (0≦≦1), the output signal Sf of the adder (17) is expressed as in the following equation (2).

Sf -3i+k(Sd-3i) = (1-k)Si+kSd...(2) In this case, contrary to the embodiment shown in FIG. 1, for example, k changes from 1 to 0 in 1 second. If it gradually decreases, the memory (
At the same time as the still image video signal Sd read out from the camera (11) fades out, the input moving image video signal St from the camera (1) fades in.

In the embodiment shown in FIG. 4, the cross-fade circuit is configured in a cyclic manner, and the video signal is written to and read out from the memory (11) in line order. The video signal read from the memory (11) is sent to a subtracter (18).

After passing through the coefficient unit (19) and adder (17), it is transferred to the memory (
11), but due to the signal processing time in the coefficient multiplier (, 19), etc., the line where the video signal after coefficient multiplication is written is the same as the line from which the original video signal was read.

For this reason, in the embodiment shown in FIG.
) is in the through state in recording mode.

Then, during the cross-fade period (t3 to t4), the images of the preceding scene and the succeeding scene are overlapped and recorded on the magnetic tape, as described above, and after time t4, the moving image of the succeeding scene is recorded. Scenes before and after the editing point are smoothly transitioned.

In the embodiment shown in FIG. 4, the timing control of the field memory (11) is simpler and the scale of the memory control circuit (16S) is smaller than in the embodiment shown in FIG. 1 described above.

Note that in the above embodiment, a field memory is used, but a frame memory may also be used.

Furthermore, in the case of a cyclic configuration, by appropriately setting the data pattern of the coefficient multiplier, it can be used for noise reduction, so-called multi-strobe, chrysostill/slow reproduction, etc.

[Effects of the Invention] As detailed above, according to the present invention, a moving image signal is written to the field memory or frame memory when the operation of the video camera is stopped, and when the video camera is restarted, the video signal is written to the field memory or the frame memory. By cross-fading the moving image signal from the video camera and the still image signal read out from memory, a video signal processing device with a simple configuration that can smoothly change the scene at the editing point is created. can get.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of a video signal processing device according to the invention, FIG. 2 is a time chart for explaining the operation of an embodiment of the invention, and FIG. 3 is an example of an embodiment of the invention. A route map for explaining the operation of the embodiment, and FIG. 4 is a block diagram showing the configuration of another embodiment of the present invention. (1) is a video camera, (4) is a monitor, (5) is a V
T R1 (6) System control circuit (microcomputer), (10), (IOC) is a video signal processing device, (1st) is a field memory, (12) is a cross-fade circuit, (13), (14) . (19) is a coefficient unit, and (16) and (16S) are memory control circuits. Agent Hidemori Matsukuma Diagram

Claims (1)

[Scope of Claims] A memory means for writing one desired field or one frame of a moving image signal from a video camera, and a cross-fade means, the moving image signal to be stored in the memory when stopping the operation of the video camera. A video signal processing method characterized in that when the video camera is written into the memory means and the video camera is operated again, a moving video signal from the video camera and a still image video signal read from the memory means are cross-fade. Device.