JPH03129543A - Main storage device control system - Google Patents

Abstract

PURPOSE:To prevent other processes from being delayed at their execution due to swap-out/swap-in forced by a process continuously accessing a huge area by allowing the process to occupy an allocated main storage device up to the end of the process. CONSTITUTION:The system is provided with a function for allocation one process to one storage device and a function for occupying the main storage device allocated to the process concerned from the execution start of the process up to its end and stored in the same main storage device up to the end of the process. When plural processes are in the executable state, other processes can be prevented from being occupied at their pages in the main storage devices by the process continuously accessing a huge area and being delayed at their execution due to the forced swap-out/swap-in.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a main storage management system for a multitasking computer in which a plurality of programs are processed in parallel at the same time.

2. Description of the Related Art An example of a computer system having a common shared memory is shown in FIG. C with single or multiple main memory devices (shared memory) 206 on a common bus 204 shown in FIG.
In a system to which PU devices 201 to 203 are connected,
In general, virtual addresses are used to effectively utilize main memory. Total area weight Storing program contents in a relocatable state Access to auxiliary storage device 208!; Auxiliary storage device 2 connected to input/output interface 207 via LI/○ bus 205
Even if a request is made to 08, this method will not create free space in the area allocated to each process that is larger than the minimum division unit (page) of the storage area determined for each system.Furthermore, the physical address By concatenating multiple consecutive or non-contiguous pages, it is possible to prepare storage areas of different sizes depending on the length of the program.
Even if the PU realizes a function of accessing using a continuous virtual atto, the invention is solved even if the function determines the address of the executable code before execution, regardless of the address of the storage area where it is actually located. According to the storage management method described above, if multiple processes are running at the same time, the start time and
Depending on the effect of the end time, the amount of storage capacity used, etc., the space required to store newly generated processes may not necessarily be allocated in a contiguous area. A virtual page is not necessarily stored in the original physical page, and techniques such as segmentation and paging are used to manage these consecutive virtual addresses in correspondence with scattered physical addresses. This function is realized by a processing mechanism attached to the CPU function, which is generally called the memory management mechanism.The difference between the size of the virtual storage area used and the main storage area. The first problem of the present invention is to reduce the wasted time due to the increase in size. Part of the area is usedQ If a page with the remaining area unused occurs, expanding the page size may increase the amount of unused free space. The purpose of the above-mentioned memory management method, which was aimed at When using those areas, the auxiliary storage device 208 below the secondary storage
Processes that are swapped out and have to wait for transfer between main memory 206 and auxiliary memory 208 each time they are executed. Also, therefore,
If there is an inequity in the sharing of resources between processes, and a process that uses a large amount of space forces a process that should not otherwise need to be swapped out, it is possible to correct this inequity and ensure that all processes The second objective of the present invention is to realize an environment in which the execution starts under equal conditions.

The purpose of the present invention is to solve the following problems: When using virtual memory on a computer system in which a main storage device and a CPU are configured on a common memory bus, it takes a long time to convert physical addresses and virtual addresses, and A phenomenon in which other processes are frequently saved to the auxiliary storage area while one process is running occurs.Means for solving the problem by preventing this In order to allocate a storage area to each process, the address conversion method converts the virtual address on the CPU to a physical address on the main storage device. The device is physically divided into multiple partial areas (pages) and a main memory group is allocated to a single process, and one of them is assigned to a single process, and the process number designated area pointing to the process number and the area allocated to that process The page address part indicating the location in the storage area and the virtual address that is determined from the page number designation area part in the storage area are circled. The page address part indicates the starting address of the physical address of the storage device, and the page address part indicates the address offset in the main storage (page) allocated to the process, and the page number specification area part indicates that the storage area includes the main storage. A main storage device management method characterized by indicating a page number when spanning a plurality of pages, and the present invention has a function of assigning a process number to one storage device in realizing the address conversion method. Each process occupies the storage device assigned to the process from the start of execution to the end of the process. The present invention realizes the address conversion method by
It has a function that stores in advance whether or not there is a possibility of a page fault occurring.Each divided main memory has a memory management function that converts the page number requested by the CPU from the page table at that point into a physical address. C
It has a function to check whether the page requested by the PU appears on the main memory1.Also, when a process occurs that requires a storage area larger than the division size (page) of the main memory, it is stored on the auxiliary storage device. It has a function to secure the required number of storage areas of the same size as this partition size (pages). If a process uses multiple pages of area including the main memory allocated to that process, a page fault will occur. It is possible to refer to the page specification area of the virtual address passed by the CPU, and if the process uses only the area in the main memory allocated to it, the page specification area as y
The present invention (above) has the function of viewing illumination for one storage device (above).
The function that assigns a process number occupies the main memory assigned to the process from the start of execution to the end of the process, and stores it in the main memory until the end of the process.With this function, When multiple processes are running, a process that continuously accesses a huge area occupies pages in main memory, causing other processes to swap out and
The main memory management method of the present invention has a function of storing in advance whether or not there is a possibility that a page fault will occur. The divided main memory has a memory management function, and has the function of checking whether the page requested by the CPU appears in the main memory.As long as a process change or swapping does not occur, the page requested by the CPU There is no need to refer to the page table in the main memory (1).Therefore, the loss spent on address translation is reduced, and the main memory management method of the present invention (It has a storage area that corresponds one-to-one with the process number.) A main storage group in which the main storage is physically divided into multiple partial areas, a function to allocate only one of these to a single process, and A virtual address consisting of a process number designation area that points to the process number, a page address part that shows the location in the storage area allocated to the process, and a page number designation area in the storage area. From the side, it is a memory area occupied by a process.It is used as a contiguous area of the virtual atone, and requests can be issued to the allocated main memory area without conversion, but address conversion is not required on the CPU side. The table is omitted and the CPU only needs a correspondence table between the process number and the main memory address where that process is stored, and a multi-level address conversion table with multiple levels or more is used to convert the scattered physical pages. It is unnecessary to display the process number as a continuous string of virtual pages.If multiple pages are used, a page table is required within the process. The CPU can also make requests to main memory independently of this.
You can also perform swap in and swap out operations (above).
Each main memory device does this. 6cput can always select an executable process and keep it running, but in a multiprocessor system each processor can access independent main memory and therefore execute independent processes. Only LC
It is not local memory for each PU.It is always accessible from any processor, and processes can be easily changed.It is also possible to share CPU resources on a time-sharing basis.Embodiment Figure 1 A configuration diagram of an embodiment of the computer system of the present invention is shown in detail (main storage devices 1 (109) to n
(110) is prepared in a configuration such as multiple surveying, and these are connected to all CPUs 1 through independent buses 104 to 105.
Connect to (101) to m(102) (n > = m).

Apart from the main storage devices 109 to 110, a storage area 111 shared between processes (shared memory) and a storage area 112 used by the operating system are prepared. The area 111 is connected to a shared memory bus 106, and a storage area 112 used by the operating system is connected to the O8 communication bus 107.Furthermore, it is equipped with a processor 103 dedicated to the operating system and an input/output interface section 113. An auxiliary storage device 114 is connected to the input/output interface unit 113, and access to the auxiliary storage device 114 can be performed through the I10 bus 108. The address conversion method of the present invention is provided with an address configuration diagram of a virtual address.A process number designation area portion 301 indicating the process number, a page address portion 303 indicating the location in the storage area allocated to the process, and FIG. 4 shows a virtual address consisting of a page number designation area portion 302 within the storage area. A configuration diagram of a virtual area is shown.The main storage devices 109 to 110 allocated to the process from the start to the end of execution of the process 1a (404) to 3<405) and the CPUIs 01 to 110 that execute the processes 404 to 405 are shown. 102, and if process l spans multiple pages, pages 1 b (410) to 1 x (412) that are not stored in main memory 109 are swapped out to the swap area on auxiliary memory 114. Indication is also O8 force statement Time point when the process occurs Δ Main storage device 10
If 9 to 110 are free, even if only one of them is occupied by a single process, the size of the page on the main memory (which is equal to the page size used by the system) Although the device is composed of a single page, the process number designation area part 301 of the address and the main memory 109 ~ where the relevant processes 404 ~ 405 are stored are stored.
110 addresses and all CPUs 10
1 to 102 are Mochisaka Address conversion is performed by memory management units 101a to 102a on the CPU. Main memory address after conversion l! Bus control unit 101b in cPU -
It is stored in the buffer of 102b and the main storage device 109~
It is equal to the port number of buses 104 to 105 to 110. The correspondence table (above) has a function to maintain the sameness on all CPUs, and the addresses used by the PC (program counter) on the CPU are stored in one main memory. The page address 303 and address section 302 indicating the page number are used.The address section 301 specifying the process number is used only when a process change occurs, and the address section 301 specifying the process number j! Along with this, the boat number of the boat to which the memory bus 104 to 105 corresponding to the address 301 is connected is stored in the register of the CPU. Therefore, it is 1i until the next process change.
The cPU only refers to the page number part 302 of the address and the page address 303 in the main memory. If the number is different from the number, the physical address of the main memory of the buffer in the bus control unit 101b-102b is also updated.
Even if a request is issued to 4 to 105, the signal on the bus connected to the main memory device (on The address field 301 that specifies t has a length area that guarantees the extended range of the main memory.
26. It is independent of the address for fetching instructions in the program. This is included in the address length that the CPU can handle.It does not impede program expandability or system expandability.Each divided main storage device 109 to 110 has a memory management function, and the main storage area When a process that requires a storage area larger than the partition size (page size) occurs (
Although the necessary number of storage areas of the same size as this division size are secured on the auxiliary storage device 114, an area 302 is prepared for specifying each page in the main memory for the address, but it cannot be stored in the main storage area. When a large-scale program is loaded, the recognition bits 109 to 110 in main memory are set, and from then on, the recognition bits are always interpreted to recognize that a page fault may occur.
Whether or not the page requested by I-102 is stored in the main memories 109-110 is determined by the page number address 302.The page number address 302 is converted through the page table of the main storage device. If there is no bit (page number part address 30
2 is ignored. If the corresponding page capacity requested by the CPU is not available in the main memories 109 to 110 (main memories 109 to 110)
110 immediately sends a request for swapping to the owner's memory.
Even if the process is postponed until it can be accessed from PUl0I~102, can this excavation process still be executed? Even if the i process is changed, the entire virtual storage area (10
9, 114) are managed by the main memory 109. However, when it becomes necessary to swap out, the operating system determines which page on the swap area of the auxiliary memory 114 is assigned to the process 1. Address conversion to the swap area (C) Each main storage device performs this conversion using its own conversion table. By referencing only addresses within the page, access to each main memory device 109 to 110 is accessed through mutually independent buses 104 to 105. As a result, in a multiprocessor system, each CPU10I to 102 has a different main memory 1
In addition to the main storage devices 109 to 110, a storage area 111 shared between processes and a storage area 112 used by the operating system are prepared. The inter-process shared storage area 111 is shared between processes and is used as a shared memory for inter-process communication. The operating system is run on a dedicated processor and uses a storage area and processing unit separate from general user processes. Process management and memory management are performed by this O8 processor. ＼ Allocate processes to each processor according to priority, and allocate main storage area for each process. However, when more processes occur than the number of main storage devices (other than the storage area shared between processes, Address translation table for inter-process shared storage; address translation from a virtual address in the same format as that indicating main storage to a page in the shared storage area. It has the following functions.

Process number section 301 ILL shared memory bus 1
It is converted into a boat number to 06 and the page number part 302 (
The base address of the page on the shared memory 111 is converted to the base address of the page on the shared memory bus 106 (process number section 30, page number section 302, page address section 3).
On the other hand, the shared memory has a process number part 301 and a page number part 302.
into the base address of the requested physical page through the page table it manages.

Effects of the Invention As is clear from the above description, the present invention (L) With the above configuration, when a plurality of processes are in the execution state, pages in the main memory can be accessed by a process that continuously accesses a huge area. This avoids the situation where other processes are forced to swap out or swap in, delaying their execution.

Furthermore, unless a process change or swapping occurs, the page requested by the CPU appears directly in the main memory, so there is no need to refer to the page table in the main memory. Therefore, there is no need to refer to the page table in the main memory. This also reduces the memory area occupied by a process from the CPU's point of view (both physical and virtual addresses are used as contiguous areas, and the page table, which does not require address conversion, is omitted). Only the correspondence table with the main memory address where the is stored is required, and there is no need to use a multi-level address translation table with multiple levels or more to display a group of scattered physical pages as a continuous virtual page string. Also, since swap in and swap out operations are performed by each main memory device, acpu+t can always select an executable process and continue running, but in a multiprocessor system, each processor is independent of each other. can access the main memory of
Therefore, an independent process is executed. However, since it is not local memory, it can always be accessed by any processor, making it easy to change processes and sharing CPU resources on a time-sharing basis.

[Brief explanation of the drawing]

FIG. 1 shows the configuration of a computer system according to an embodiment of the present invention. FIG. 2 shows the configuration of a conventional computer system with shared memory. FIG. 3 shows the configuration of virtual addresses used in the present invention. FIG. 2 is a conceptual diagram regarding allocation of processes to main memory in the main memory management system of the present invention. 101-102...CPU, 103...O8 processor, 104-105...Memory bar input 106
...Shared memory input 107...O8 communication input 108...■/○ input 109-110...Main memory group, 111...Shared memory 112...O
8 memory, 113... input/output interface,
Ll14...Auxiliary storage device 301...Process number address enemy 302...Page number address 3
03...Page address R404, 406--Process input 41O-412 Pages swapped out to the swap area on the auxiliary storage device.

Claims (3)

[Claims] (1) Of the address conversion methods that convert a virtual address on the CPU to a physical address on the main storage device to allocate a storage area to each process on the main storage device that makes up the computer system, a process number and one pair are used. The main storage device is physically divided into multiple partial areas (
A function to allocate only one of a group of main memory devices divided into pages) to a single process, a process number designation area part that points to the process number, and a page address part that shows the location in the storage area allocated to that process. and a virtual address consisting of a page number designated area portion within the storage area, the process number designated area portion indicating the start address of a physical address of a process-specific and unique main storage device allocated to the process; The page address part indicates an address offset in the main memory (page) allocated to the process, and the page number specification area part indicates the page number when the memory area spans multiple pages including the main memory. A main storage management method characterized by: (2) In realizing the address conversion method, it has a function of assigning one process number to one storage device, and each process occupies each storage device, and the process is assigned from the start to the end of execution of that process. 2. The main memory management system according to claim 1, wherein the main memory is occupied by the allocated main memory and the data is stored in the same main memory until the end of the process. (3) Having a function of storing in advance whether or not there is a possibility of causing a page fault in realizing the address translation method,
This function remembers that a page fault may occur if a process uses multiple pages of space, including the main memory allocated to that process, and uses the virtual address passed from the CPU. A patent claim characterized in that the base address of the page is obtained by referring to the page number specification area, and the page number specification area is ignored when the process uses only the main memory allocated to the process. The main storage management method according to item 1 or 2.