JPH03128677A - Pulse-width modulation inverter controller - Google Patents

Abstract

PURPOSE:To generate an arbitrary higher carrier-wave PWM signal without changing the interruption period of a micro-computer by increasing the frequency of load to the counter of a PWM signal by N times (N>=2) as many as the frequency of an interruption signal and repeating the same PWM signal N times. CONSTITUTION:A timing generating circuit 2 outputs an interruption signal 21, a latch signal 23 to a buffer latch 5 and a load signal 22 to a counter 6. The frequency of the load signal 22 is set at N times (N>=2) as many as the frequency of the interruption signal 21 and the latch signal 23. A micro-computer (CPU) 3 outputs a PWM time data to a parallel I/O 4 by the interruption signal 21. The PWM time data is output as a PWM signal 91 through the buffer latch 5, the counter 6 and a waveform synthetic circuit. That is, the same PWM waveforms are generated N times through PWM processing by one-time interruption in the CPU 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a control device for a pulse width modulation (hereinafter referred to as rPWMJ) inverter.

C. Prior Art] A PWM inverter control device using a microcomputer is shown in FIG. 3. This method uses an interrupt signal (for microcomputer interrupt) equal to the period of the carrier wave and a load signal (for counter data input timing) to set the PWM calculation result in the microcomputer to the counter via the parallel I10. , which generates a PWM signal.

In FIG. 3, l is a clock pulse generator, 2 is a timing generation circuit, and interrupt signal 2 is equal to the period of the carrier wave.
1 and a load signal 22 are output. 3 is a microcomputer that performs calculations at every interrupt cycle and outputs the results to the parallel 104; 6 is a counter which inputs the output of the parallel 104 as a counter count setting value in response to the load signal 22, immediately restarts counting, and outputs a count-up signal 71. 7.8 is a PWM signal generator,
8 outputs a count up signal 81.

9 is a waveform synthesis circuit, which outputs count-up signals 71 and 8.
1 and the pattern data loaded from the microcomputer, the PWM waveform-phase components are synthesized and output. In the case of three phases, it is possible to make the circuits 7 to 9 into three circuits.

FIG. 4 is an operational waveform diagram of the circuit shown in FIG. 3. It is clear from the figure that the frequency of the PWM carrier wave is equal to the frequency of the interrupt signal to the microcomputer.

[Problem to be solved by the invention]

However, in the prior art, the carrier wave period of the PWM signal and the interrupt period to the microcomputer are proportional, and it is not possible to increase only the carrier wave frequency.

Therefore, in order to generate a PWM signal with a high carrier wave, it is necessary to shorten the interrupt cycle to the microcomputer, and in this case, as the carrier wave frequency becomes higher, the microcomputer becomes exclusively responsible for PWM signal generation processing. , it becomes impossible to perform time-sharing processing, which is an advantage of microcomputers.

Another problem is that the upper limit of the carrier wave frequency is determined by the processing speed of the microcombination unit.

An object of the present invention is to obtain an arbitrary high-carrier PWM signal waveform without increasing the PWM signal generation processing time of a microcomputer.

[Means to solve the problem]

To achieve this object, the PWM inverter control device of the present invention is a pulse width modulation inverter control device in which a microcomputer performs calculations at predetermined intervals and outputs data to a counter to generate a PWM signal. A buffer latch is provided between the buffer latch and the counter, a latch signal giving the data input timing of the buffer latch is synchronized with an interrupt signal to the microcomputer, and the frequency of the load signal giving the data input timing of the counter is set to a carrier wave frequency. The present invention is characterized in that it includes means for repeating the same PWM signal N times at a frequency equal to that of the interrupt signal and N times the frequency of the interrupt signal (N≧2).

[Effect]

The present invention utilizes the load function to the counter without changing the interrupt cycle of the microcomputer.
The pattern is repeated N times to obtain a high carrier wave of the PWM signal.

In the present invention, for example, the carrier frequency is set to 10k)Iz,
If N = 5, the interrupt pulse period T to the microcomputer is T = 1/(10k &15) =
It will be 500 μsec. (If N=1 is set, the conventional operation will occur).

〔Example〕

Hereinafter, the present invention will be specifically explained based on Examples.

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is an operation waveform diagram of each part in FIG. 1.

In FIG. 1, l is a clock pulse generator, which generates a reference clock for the timing generating circuit 2, the microcombinator 3, and the counter 6.

The timing generation circuit 2 outputs an interrupt signal 21 that gives the processing time of the microcomputer 3, a latch signal 23 that gives the latch time of the input data of the buffer latch 5, and a load signal 22 that gives the count data load time of the counter 6. (See FIGS. 2(a) and 2) The frequency of the load signal 22 is set to N times the frequency of the interrupt signal 21 and latch signal 23 (N=2 in FIG. 2).

4 is a parallel I10 that outputs the PWM time data calculated by the microcomputer 3 (Fig. 2 (c)
), see (d)). Buffer latch 5 is paralleled by latch signal! The output data of 104 is taken in and outputted to counter 6 (see FIG. 2(e)).

The counter 6 receives the output of the buffer latch 5 into an internal counting buffer in response to the load signal 22, and starts counting from this timing (see FIG. 2(f)).

After counting is completed, count-up signals 71 and 81 are output (see FIG. 2 (Comb, Inc.)).

The waveform synthesis circuit 9 synthesizes a PWM waveform using the count-up signals 71 and 81 and the pattern data loaded from the microcomputer 3. The three-phase PWM waveform is
This is possible by preparing three circuits of circuits 7 to 9.

As shown in FIG. 2(i), it is clear that the same PWM waveform is generated twice in one PWM process by the microcomputer 3.

〔Effect of the invention〕

As described above, according to the present invention, a PWM signal of any high carrier wave can be obtained without increasing the burden of PWM signal generation processing on a microcomputer. Another advantage is that a more general-purpose microprocessor can be used.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the PWM inverter control device of the present invention, Fig. 2 is a waveform diagram of each part operating when N = 2 in the embodiment, and Fig. 3 is an example of a conventional PWM inverter control device. The block diagram shown in FIG. 4 is an operation waveform diagram of each part thereof. l: Clock pulse generator 2: Timing generation circuit 21: Interrupt signal 22: Load signal 23: Latch signal 3: Microcomputer: Parallel I10: Buffer latch 6: Counter 7° 8: PWM signal generator 71° 81: Count Up signal two waveform combining circuit 91: PWM signal

Claims (1)

[Claims] 1. In a pulse width modulation inverter control device in which a microcomputer performs calculations at predetermined intervals and outputs data to a counter to generate a PWM signal, a buffer latch is provided between the microcomputer and the counter,
synchronizing a latch signal giving the data input timing of the buffer latch with an interrupt signal to the microcomputer, making the frequency of the load signal giving the data input timing of the counter equal to the carrier wave frequency, and the frequency of the interrupt signal. is multiplied by N (N≧2), and the same PWM signal is
A pulse width modulation inverter control device characterized by comprising means for repeating the pulse width modulation times.