JPH03128335U - - Google Patents

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Publication number
JPH03128335U
JPH03128335U JP3780190U JP3780190U JPH03128335U JP H03128335 U JPH03128335 U JP H03128335U JP 3780190 U JP3780190 U JP 3780190U JP 3780190 U JP3780190 U JP 3780190U JP H03128335 U JPH03128335 U JP H03128335U
Authority
JP
Japan
Prior art keywords
input circuit
resistor
coil
parasitic capacitance
cancel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3780190U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3780190U priority Critical patent/JPH03128335U/ja
Publication of JPH03128335U publication Critical patent/JPH03128335U/ja
Pending legal-status Critical Current

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案よりなる周波数合成器の実施例
を示した構成図、第2図は従来の周波数合成器の
実施例を示した構成図である。 VCO……電圧制御発振器、BA1……緩衝増
幅器、R……抵抗分配器、R…抵抗分配器、
BA2……緩衝増幅器、DIV……デイジタル分
周器、R……抵抗、L……コイル、C……デイジ
タル分周器(DIV)の入力端子の寄生容量。
FIG. 1 is a block diagram showing an embodiment of a frequency synthesizer according to the present invention, and FIG. 2 is a block diagram showing an embodiment of a conventional frequency synthesizer. VCO...voltage controlled oscillator, BA1...buffer amplifier, R1 ...resistance divider, R2 ...resistance divider,
BA2... Buffer amplifier, DIV... Digital frequency divider, R... Resistor, L... Coil, C... Parasitic capacitance of the input terminal of the digital frequency divider (DIV).

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] デイジタル分周器ICの入力端子の寄生容量を
打ち消すために、入力回路に並列にコイルLを接
続すると共に、直列に抵抗Rを接続して構成する
ことを特徴とするデイジタル分周器用ICへの高
周波信号入力回路。
To cancel the parasitic capacitance of the input terminal of the digital frequency divider IC, a coil L is connected in parallel to the input circuit, and a resistor R is connected in series. High frequency signal input circuit.
JP3780190U 1990-04-09 1990-04-09 Pending JPH03128335U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3780190U JPH03128335U (en) 1990-04-09 1990-04-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3780190U JPH03128335U (en) 1990-04-09 1990-04-09

Publications (1)

Publication Number Publication Date
JPH03128335U true JPH03128335U (en) 1991-12-24

Family

ID=31545241

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3780190U Pending JPH03128335U (en) 1990-04-09 1990-04-09

Country Status (1)

Country Link
JP (1) JPH03128335U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101462358B1 (en) * 2013-12-13 2014-11-14 이미영 A massager

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63110818A (en) * 1986-10-29 1988-05-16 Hitachi Ltd Phase locked loop oscillator

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63110818A (en) * 1986-10-29 1988-05-16 Hitachi Ltd Phase locked loop oscillator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101462358B1 (en) * 2013-12-13 2014-11-14 이미영 A massager

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