JPH03121602A - Connection structure of microwave integrated circuit - Google Patents

Connection structure of microwave integrated circuit

Info

Publication number
JPH03121602A
JPH03121602A JP1260819A JP26081989A JPH03121602A JP H03121602 A JPH03121602 A JP H03121602A JP 1260819 A JP1260819 A JP 1260819A JP 26081989 A JP26081989 A JP 26081989A JP H03121602 A JPH03121602 A JP H03121602A
Authority
JP
Japan
Prior art keywords
connection
series
return loss
microwave integrated
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1260819A
Other languages
Japanese (ja)
Inventor
Masanori Iwatsuki
岩附 政典
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1260819A priority Critical patent/JPH03121602A/en
Publication of JPH03121602A publication Critical patent/JPH03121602A/en
Pending legal-status Critical Current

Links

Classifications

    • AHUMAN NECESSITIES
    • A45HAND OR TRAVELLING ARTICLES
    • A45DHAIRDRESSING OR SHAVING EQUIPMENT; EQUIPMENT FOR COSMETICS OR COSMETIC TREATMENTS, e.g. FOR MANICURING OR PEDICURING
    • A45D26/00Hair-singeing apparatus; Apparatus for removing superfluous hair, e.g. tweezers
    • A45D26/0023Hair-singeing apparatus; Apparatus for removing superfluous hair, e.g. tweezers with rotating clamping elements

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  • Waveguides (AREA)

Abstract

PURPOSE:To prevent the reduction in a return loss by providing a capacitive element connected to the ground to cancel an inductive component of the 1st and 2nd connection lines connected in series at the connecting point of the 1st and 2nd connection lines connected in series. CONSTITUTION:A grounding capacitive element 5 is connected to the connecting point between the 1st and 2nd connection lines 3, 4 connected in series. Thus, it is possible to cancel the inductive component of the 1st and 2nd connection lines 3, 4 connected in series by the capacitive component 5. Thus, even when the length of the connection wire between microwave integrated circuit modules is prolonged to some extent depending on the mounting condition, the deterioration in the return loss is suppressed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、複数のマイクロ波集積回路モジュールの接続
構造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a connection structure for a plurality of microwave integrated circuit modules.

3、発明の詳細な説明 〔概 要〕 複数のマイクロ波集積回路モジュールの接続構〔従来の
技術〕 近年のマイクロ波無線装置では、増幅器、周波数ミキサ
、減衰器などの回路がそれぞれ小型のマイクロ波集積回
路モジュール(以下MICモジュールと称す)を個別に
設けておき、これらMICモジュールを複数個を実装し
て所望の無線装置を構成することが行われている。この
MICモジュールは、その前後にMICモジュール以外
の他の回路が接続される場合もあるが、またMICモジ
ュールが何段か連続して接続される場合もあり、この際
に接続用のマイクロストリップラインを用いずに接続線
のみを用いてMICモジュールとMICモジュールを直
結する方法がよく用いられる。
3. Detailed description of the invention [Summary] Connection structure of multiple microwave integrated circuit modules [Prior art] In recent microwave radio equipment, circuits such as amplifiers, frequency mixers, and attenuators are each connected to a small microwave Integrated circuit modules (hereinafter referred to as MIC modules) are individually provided, and a desired wireless device is configured by mounting a plurality of these MIC modules. This MIC module may be connected to other circuits other than the MIC module before and after it, but there are also cases where several stages of MIC modules are connected in succession, and in this case, a microstrip line for connection is used. A method is often used in which the MIC modules are directly connected using only connection lines without using a MIC module.

第6図は従来例でのMICモジュールの接続構造を示す
図であり、同一構造の第−MICIIと第二MIC12
と第三MIC13の3段接続の例である。
FIG. 6 is a diagram showing the connection structure of the MIC module in the conventional example.
This is an example of a three-stage connection of a third MIC 13 and a third MIC 13.

各M I CIl、12.13には例えばメタルパッケ
ージを用いており、信号用の入出力端子部31〜36は
マイクロストリップラインの構造となっている。また各
入出力端子部31〜36の両側には絶縁部41〜46を
設け、入出力端子部31〜36における電気絶縁を確保
している。なお各M I C1l、12.13は、それ
ぞれの接続用の金ワイヤ21と金ワイヤ22を用いて相
互に接続している。なお接続用の金ワイヤ21.22は
接続インピーダンスをより小さくするため複数本を並列
に接続したり、或いは接続用の金ワイヤ21゜22の代
わりに金リボンを用いる場合もある。なお金リボンを用
いる場合は、温度変化による膨張収縮で切断しないよう
にある程度長さに余裕をもたせるようにしている。
For example, a metal package is used for each M I C Il, 12.13, and the signal input/output terminal sections 31 to 36 have a microstrip line structure. Further, insulating parts 41 to 46 are provided on both sides of each input/output terminal part 31 to 36 to ensure electrical insulation in the input/output terminal parts 31 to 36. Note that each of the M I C11 and 12.13 is connected to each other using a gold wire 21 and a gold wire 22 for connection, respectively. In order to further reduce the connection impedance, a plurality of gold wires 21 and 22 for connection may be connected in parallel, or a gold ribbon may be used in place of the gold wires 21 and 22 for connection. When using a long money ribbon, it is made to have some length to prevent it from breaking due to expansion and contraction due to temperature changes.

このような接続用の金ワイヤ21.22または金リボン
を用いる接続の場合、この金ワイヤ2L22または金リ
ボンがインダクタンス成分をもつようになる高い周波数
では、MICllとM[C12の間およびMICI2と
MIC13の間でインピーダンスの非整合となる。この
場合、横軸に周波数、縦軸にリターンロス(反射電力/
入力電力の比、但しdBで表す)とり図示したのが第7
図である。第7図は、直径25ミクロン、長さQ、8*
mの金ワイヤを2木枝列に使用して接続した場合を例示
し、この場合のリターンロスは約15dB以下となって
いる。
In the case of a connection using a gold wire 21.22 or a gold ribbon for such a connection, at high frequencies where this gold wire 2L22 or gold ribbon has an inductance component, there is a There will be impedance mismatch between the two. In this case, the horizontal axis is the frequency, and the vertical axis is the return loss (reflected power/
The ratio of input power (expressed in dB) is shown in Figure 7.
It is a diagram. Figure 7 shows diameter 25 microns, length Q, 8*
An example is shown in which gold wires of m length are used to connect two tree branch arrays, and the return loss in this case is about 15 dB or less.

なおこのリターンロスの大きくして良好な接続をするた
めには接続間隔Sを小さくすればよいが、そのためには
各M I C1l、12.13のそれぞれのパッケージ
の寸法精度を上げる必要があり、この場合MfCは高値
なものとなる。従って成る程度の接続間隔Sが必要とな
ることは避けられない。
Note that in order to increase this return loss and make a good connection, the connection interval S can be made small, but for this purpose, it is necessary to increase the dimensional accuracy of each package of each M I C11 and 12.13. In this case, MfC becomes high-value. Therefore, it is inevitable that a certain connection interval S is required.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

この従来の接続構造では、成る程度のMICモジュール
の接続間隔が必要のために接続ワイヤの長さをある長さ
以下に短くできず、このため十分に大きいリターンロス
が得られないという問題がある。
This conventional connection structure has the problem that the length of the connection wire cannot be shortened below a certain length because it requires a certain connection interval between the MIC modules, and therefore a sufficiently large return loss cannot be obtained. .

本発明は、MICモジュールの接続間隔を小さくして接
続ワイヤ長を短くすること無しに大きいリターンロスの
得られる接続構造の提供を目的とする。
An object of the present invention is to provide a connection structure that can obtain a large return loss without reducing the connection interval of MIC modules and shortening the connection wire length.

〔課題を解決するための手段〕[Means to solve the problem]

本発明では、複数の第一のマイクロ波集積回路1と第二
のマイクロ波集積回路2とを直列接続の第一の接続線3
と第二の接続線4とを用いて接続するものにおいて、前
記直列接続された第一の接続線3と第二の接続線4との
接続点において、前記直列接続された第一の接続線3と
第二の接続線4が有するインダクタンス成分を打ち消す
ために接地接続される容量性素子5を設けた構成にする
In the present invention, a first connecting line 3 connects a plurality of first microwave integrated circuits 1 and a plurality of second microwave integrated circuits 2 in series.
and a second connection line 4, at a connection point between the first connection line 3 and the second connection line 4 connected in series, the first connection line connected in series A capacitive element 5 connected to ground is provided in order to cancel the inductance component of the second connection line 3 and the second connection line 4.

〔作 用〕[For production]

本発明では第1図に示すように、直列接続された第一の
接続線3と第二の接続線4との接続点に容量性素子5を
接続するようにしている。
In the present invention, as shown in FIG. 1, a capacitive element 5 is connected to a connection point between a first connection line 3 and a second connection line 4 connected in series.

従ってこの容量性素子5により、前記直列接続された第
一の接続線3と第二の接続線4が有するインダクタンス
成分を打ち消すことが可能となり、接続に伴うリターン
ロスの低下を防止できる。
Therefore, this capacitive element 5 makes it possible to cancel out the inductance component of the first connection line 3 and second connection line 4 connected in series, thereby preventing a decrease in return loss due to the connection.

〔実 施 例〕〔Example〕

第2図は本発明でのMICモジュールの接続構造の一例
を示す図である。図中、IIは第−MrC112は第二
MIC12L22は接続用の金ワイヤ、14はマイクロ
ストリップライン、15は誘電体基板である、なお誘電
体基板15とマイクロストリップライン14の分布定数
回路によりキャパシタンス成分を実現している。
FIG. 2 is a diagram showing an example of the connection structure of the MIC module according to the present invention. In the figure, II is the second MIC 12.L22 is the gold wire for connection, 14 is the microstrip line, and 15 is the dielectric substrate.The capacitance component is generated by the distributed constant circuit of the dielectric substrate 15 and the microstrip line 14. has been realized.

第−MICIIとマイクロストリップライン14は例え
ば金ワイヤ21で接続され、またマイクロストリップラ
イン14とMIC12は例えば金ワイヤ22でそれぞれ
接続されている。いま取り扱う信号の周波数がマイクロ
波帯になると、金ワイヤ21と金ワイヤ22は誘導性に
なってインダクタンス成分をもつようになってくる。本
発明では、この金ワイヤ21と金ワイヤ22のインダク
タンス成分を、金ワイヤ21と金ワイヤ22の接続点に
接続されたる誘電体基板15とマイクロストリップライ
ン14の分布定数回路より形成せるキャパシタンス成分
により打ち消しするようにしている。
-MICII and the microstrip line 14 are connected, for example, by a gold wire 21, and the microstrip line 14 and the MIC 12 are connected, for example, by a gold wire 22, respectively. When the frequency of the signal being handled is in the microwave band, the gold wire 21 and the gold wire 22 become inductive and have an inductance component. In the present invention, the inductance component of the gold wire 21 and the gold wire 22 is replaced by a capacitance component formed by a distributed constant circuit of the dielectric substrate 15 and the microstrip line 14 connected to the connection point of the gold wire 21 and the gold wire 22. I'm trying to cancel it out.

第3図は第2図に示した本発明の一実施例でリターンロ
スの特性図であり、回路定数は金ワイヤ21.22はそ
れぞれの直径が25μs+、長さ0.8 taのものを
2本並列接続とし、かつ誘電体基板15にはε、 =9
.7のセラミック基板を用い、またマイクロストリップ
ライン14は幅が0.36mm、長さ0.9關とした場
合の例である。第3図に示すように、リターンロスは最
低でも約26 d Bが得られている。
FIG. 3 is a characteristic diagram of return loss in one embodiment of the present invention shown in FIG. In this parallel connection, and the dielectric substrate 15 has ε, =9
.. In this example, a ceramic substrate No. 7 is used, and the microstrip line 14 has a width of 0.36 mm and a length of 0.9 mm. As shown in FIG. 3, a minimum return loss of about 26 dB was obtained.

また第4図は本発明でのMIGモジュールの接続構造の
他の例を示す図であり、第2図のキャパシタンス成分と
してチップコンデンサ16を用いたものであり、他は第
2図と同一構成である。第5図は第4図の接続構造にお
けるリターンロスの特性図であり、回路定数は金ワイヤ
21.22の直径が25μm、長さ0.8鰭のものを2
本並列接続とし、チップコンデンサ16は0.2pFと
している。第5図に示すように、集中定数のキャパシタ
ンスを用いているため広帯域周波数にわたりよいリター
ンロスが得られるようになり、このためリターンロスは
最低でも約30dBが得られている。なお接続ワイヤと
して金ワイヤ21.22を用いたが金リボンでもチップ
コンデンサ16の容量を適性に選ぶことにより同様の特
性が得られる。
FIG. 4 is a diagram showing another example of the connection structure of the MIG module according to the present invention, in which a chip capacitor 16 is used as the capacitance component in FIG. 2, and the other configuration is the same as that in FIG. 2. be. Figure 5 is a characteristic diagram of return loss in the connection structure of Figure 4, and the circuit constants are 21.22 for a gold wire with a diameter of 25 μm and a length of 0.8 fins.
In this parallel connection, the chip capacitor 16 is set to 0.2 pF. As shown in FIG. 5, since a lumped constant capacitance is used, a good return loss can be obtained over a wide frequency band, and therefore a return loss of at least about 30 dB can be obtained. Although gold wires 21 and 22 were used as connection wires, similar characteristics can be obtained with gold ribbons by appropriately selecting the capacitance of the chip capacitor 16.

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかなように本発明によれば、MIC
モジュール間の接続ワイヤ等の長さが実装上の条件によ
りある程度長くなっても、キャパシタンスとの組み合わ
せにより打ち消しすることによりリターンロスの悪化を
おさりることができる。
As is clear from the above description, according to the present invention, the MIC
Even if the length of connection wires between modules becomes long to some extent due to mounting conditions, return loss can be suppressed by canceling it out in combination with capacitance.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の原理構成を示す図、 第2図は本発明でのMICモジュールの接続構造の一例
を示す図 第3図は本発明の一実施例でのリターンロスの特性図 第4図は本発明でのMICモジュールの接続構造の他の
例を示す図、 第5図は本発明の他の実施例でリターンロスの特性図 第6図は従来例でのMICモジュールの接続構造を示す
図、 第7図は従来例でのリターンロスの特性図、である。 図において、 1は第一のマイクロ波集積回路、 2は第二のマイクロ波集積回路、 3は第一の接続線、 4は第二の接続線、 5は容量性素子、 を示す。 不金萌4原If蹟ハ゛QネTの 第1図 第 図 4!gFIのP!−年左始を巧でめす7−ジロス4塘シ
トfllffi第5図 摺<4./l M I Cモジ゛1−ルのオ妾−〇嘴造
内−グ・Jを不T図第2図 彫I灯GHf) ノド必θb−大r施ρJ7/lrlクー>a、7つ#場
−町tロ従来伊井カNTCモリi−ルnり■すI茸造9
苓りロ第6図 闇iり粒(GHz〕 4つ)1づ1三夕鋤・4ワリy−>aしことり4凸弓:
イ’t 乙?了fi7  図
FIG. 1 is a diagram showing the principle configuration of the present invention. FIG. 2 is a diagram showing an example of the connection structure of the MIC module in the present invention. FIG. 3 is a characteristic diagram of return loss in an embodiment of the present invention. The figure shows another example of the connection structure of the MIC module according to the present invention. Figure 5 is a characteristic diagram of return loss in another embodiment of the present invention. Figure 6 shows the connection structure of the MIC module in the conventional example. The figure shown in FIG. 7 is a characteristic diagram of return loss in a conventional example. In the figure, 1 is a first microwave integrated circuit, 2 is a second microwave integrated circuit, 3 is a first connection line, 4 is a second connection line, and 5 is a capacitive element. Figure 1 Figure 4 of Fukane Moe 4 Original If Sacred Qnet! gFI's P! -Starting the year on the left with skill 7-Ziros 4 tang site fullffi Fig. 5 <4. /l M I C module's concubine - 〇 beak zukuri - G J not T figure 2 carving I light GHf) throat must θb - large r service ρJ7/lrl Ku > a, 7 #Ba-Town Conventional Iika NTC Mori-ru n Risu I Takezo 9
Reriro Figure 6 Dark grain (GHz) 4) 1 zu 1 Sanyu plow 4 Wari y->a Shikotori 4 convex bow:
I'm not? Figure 7

Claims (1)

【特許請求の範囲】 複数の第一のマイクロ波集積回路(1)と第二のマイク
ロ波集積回路(2)とを直列接続の第一の接続線(3)
と第二の接続線(4)とを用いて接続するものにおいて
、 前記直列接続された第一の接続線(3)と第二の接続線
(4)との接続点において、前記直列接続された第一の
接続線(3)と第二の接続線(4)が有するインダクタ
ンス成分を打ち消すために接地接続される容量性素子(
5)と、 を設けたことを特徴とするマイクロ波集積回路の接続構
造。
[Claims] A first connection line (3) connecting a plurality of first microwave integrated circuits (1) and second microwave integrated circuits (2) in series.
and a second connecting line (4), at a connection point between the first connecting line (3) and the second connecting line (4), which are connected in series. A capacitive element (
5) A connection structure for a microwave integrated circuit characterized by providing the following.
JP1260819A 1989-10-04 1989-10-04 Connection structure of microwave integrated circuit Pending JPH03121602A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1260819A JPH03121602A (en) 1989-10-04 1989-10-04 Connection structure of microwave integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1260819A JPH03121602A (en) 1989-10-04 1989-10-04 Connection structure of microwave integrated circuit

Publications (1)

Publication Number Publication Date
JPH03121602A true JPH03121602A (en) 1991-05-23

Family

ID=17353200

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1260819A Pending JPH03121602A (en) 1989-10-04 1989-10-04 Connection structure of microwave integrated circuit

Country Status (1)

Country Link
JP (1) JPH03121602A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7841746B2 (en) 2007-08-28 2010-11-30 Seiko Epson Corporation Light source device, lighting device, projector, and monitoring device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7841746B2 (en) 2007-08-28 2010-11-30 Seiko Epson Corporation Light source device, lighting device, projector, and monitoring device

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