JPH0311990A - A/d converter and motor controller using same - Google Patents

Abstract

PURPOSE:To make cost low by providing the first - the second A/D conversion measures and a selective means of the output. CONSTITUTION:An analogue speed command VO is inputted to the first A/D conversion measure through an amplifier A1, and the digital output D1 of only positive voltage input is made. Negative input is only converted into positive output through an amplifier A2, and it is inputted to the third A/D conversion measure. In the neighborhood of zero point, a bias is added to an amplifier measure A3 by a bias means 1. Those converted digital values are outputted through matching measures K1-2 and through a change-over circuit 2 of a selective means.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an A/D conversion device suitable for use in mobile machines such as general industrial machines, machine tools, and A-pots, and an electric motor using the same. Regarding the iaj device.

[Conventional technology]

When the range of change in the amount of analog input to the A/D converter is very wide, for example, in an input range of 1:3000, the conventional device changes the amount of analog input according to the magnitude of the analog input, as shown in Japanese Patent Laid-Open No. 8045/1983. The amplifier gain before the A/D conversion means is automatically switched to an appropriate range, and A/D conversion is performed.

[L1 problem to be solved by the invention] The successive approximation type A/Di conversion means generally has 8 bits and 10 bits.
The price changes depending on the decomposition t, 12 bit, 16 bit, etc., and the price increases rapidly for 12 bit or more.

Furthermore, when switching the gain as shown in Japanese Patent Application Laid-Open No. 53-8045, it takes time for the output signal to reach a stable value after switching the gain. The operating speed of a general-purpose operational amplifier is about 50 to 100 μs, and if a filter or the like is further included, the operation speed will be delayed by the time constant thereof.

In this case, the A/D conversion means is in a waiting state until the signal settles after the gain is switched, so there is a problem that high-speed operation cannot be performed.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an A/D converter with little conversion delay and low cost! * To provide ffi and a motor control device using the same.

[Means to solve the problem]

In order to achieve the above object, the present invention provides an A/D converter including a first A/D converter that converts an analog signal value into a digital value, and a signal that inputs the analog signal to the first A/D converter. an amplifying means for amplifying at a large magnification; a second A/D converting means for converting the output of the amplifying means into a digital value; and multiplying the output of the second A/D converting means by a coefficient,
a matching means for matching the magnitude of the output of the A/D converting means; and a selection for selecting the output of the first A/D converting means and the output of the matching means to output a digital value corresponding to the analog signal value. It consists of means and means.

Furthermore, the motor control device of the present invention is characterized in that it includes the above A/D conversion device in a feedback loop.

[Effect]

The amplifier at the front stage of the A/D conversion means does not switch between 11 outputs, and the amplifier and A/D conversion means form a pair, so there is no need to wait for the voltage to settle, and high-speed operation can be achieved. . Further, although a plurality of A/D conversion means are required, the processing can be performed in a sufficiently short time compared to the settling time of an amplifier, so high-speed conversion is possible.

Further, since the plurality of A/D conversion means are used in combination with a number of bits smaller than the total number of bits to be output, that is, inexpensive ones, the whole can be constructed at low cost.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. The analog speed command VO as an analog signal (Ia) is a voltage that changes between positive and negative, and is input as an example from 0 to ±IO. This output is output from the individual A/D conversion means or the first A/D of the chip microcomputer.
/DI is input to the conversion means, and only the positive voltage input is output as a digital output DI.

In addition, as shown in FIG. 2(B), the amplifier A2 converts only the negative input (0) into a positive output and outputs it. D2
Enter. Therefore, only the negative voltage input is converted into A/D 9'. The output of A/D2 is digitally processed by multiplying the inverting means by 1 by -1 to invert the polarity, and outputs D2. By adding D2 to DI, a signed speed signal digital value is obtained.

In addition, near the zero point, the bias means 1 adds the bias V3 to the input t of the amplification means A3 to the speed command VO, and the amplification factor is changed to l.
(The gain is higher than that of the amplifiers A1 and A2, and the characteristics are designed as shown in FIG. 2(C).

The A/D conversion means near the zero point sets the amplification factor of the amplifier A3 in the preceding stage to 1 (, the speed control range to 1; the number of bits of the N01 A/D conversion means to n, and the maximum value of the speed command voltage to VO, x,
Set the maximum value of the A/D conversion means input voltage to ■4. ), then set as follows.

To give a specific example, the speed side 111j range is 1:3000.
(NO=3000), the number of bits of the A/D conversion means is lO
Bit (n= ] 0) , VO, , = 10V, VA
If MAX=5V, set to . As a result, the speed command ■0 becomes ■4□yo/=
1.7V! = -1.7V ~ +1.7V (7) Divide the speed command of the low speed part with 10 bit resolution,
: The speed control range of 3000 can be mapped to 171.

This output ■4 is converted into a digital value D by an individual A/D converter or by the second A/D converter A/D3 of the l-chip microcomputer.
Shout out to 4.

D4, which has been converted into a digital value, is sent to the next matching means by a circuit 2, after which 1lIIVB, which corresponds to the digital value of the bias portion VB of the second [m (C)], is subtracted, and then the reciprocal of the coefficient 1( east and return to Ia, which is the same level as D3. By performing this operation, the speed command voltage vO, which is close to zero, can be converted with high resolution,
Since the positive and negative values are converted continuously from around zero, there are no discontinuous points. FIG. 3 is for explaining the switching circuit of FIG. 1, and shows the D3 output and D4 output for the speed command VO on the same graph. (However, D4 is obtained by subtracting the bias VB (denoted as lα).) When the speed command voltage is high, the D3 output is used, and near the zero point, it is switched to D4, allowing high resolution to be performed.

Next, FIG. 4 shows a block diagram of an l-chip microcomputer with built-in A/D conversion means. The 1-chip microcontroller is the part indicated as CPU, and the difference from Fig. 1 is that analog signals V1, V2, ■4 are switched by analog multiplexer MPX, and A/D conversion of 111i4 is performed through sample and hold circuit +t8s/H. Convert to digital using means. The digital data D6 after the modification 19 is subjected to software processing and calculations, and as shown in a block diagram, the distribution circuit is divided into D1, D2, and D4, and the subsequent steps are the same as in FIG. 1-chip microcomputer In this case, these are written on one chip, but since V1, V2, and v4 are switched and digitally converted one after another at high speed with Multi-Bus MPX, A/D can be easily operated. Can be converted. Therefore, it can be considered that the function is exactly the same as that using three A/Df converters.

The explanation of the operation is the same as that of FIG.

FIG. 5 shows a specific embodiment of the amplifiers A11, A2, and A3 in FIGS. 1 and 4. In FIG. AO is an inverting amplifier circuit that inverts and amplifies the analog input terminal VO. This output is an AI circuit, and is a positive output amplifier that outputs a gain of 1 only when the input 0 is positive, and outputs zero (V) when it is negative.

Similarly, the circuit A2 is a positive output inverting amplifier circuit that outputs a gain of -118 only when the input VO is negative in A21 and A22, and outputs zero when the input is positive.

Amplifier A3 is a positive output amplifier that adds a constant bias voltage V3 to the output of AO and has a gain set higher than AlA2.

FIG. 6 is a detailed example of the matching means 1 (2) shown in FIG.
The result is processed by the digital gain calculation circuit 1 (2-),
Output as D5.

Next, FIG. 7 is a diagram showing the A/D conversion means shown in FIGS. 1 and 4 as 12 A/D conversion means, and is an example in which an AC servo motor is used as a position/speed controller. be.

14 is an inverter main circuit, which is composed of a DC current 15, a transistor bridge circuit 16, and an AC servo mall F.
' Supply flow to 19 to control the rotation speed. An encoder 20 is attached to the AC servo motor as a speed/position detector, and uses the magnetic pole position signal and rotational position signal of the AC servo motor as a pulse output PF to feed back a pulse frequency proportional to the number of rotations. The difference between this PF signal and the pulse train signal is calculated from the pulse command P1 by an adder 1.
It calculates with 0 and outputs the difference pulse ε. The position control amplification section amplifies ε, and the D/A conversion means outputs the analog signal ■0 as a speed command. FIG. 8 shows the ε-■0 characteristic of this part. If the amplifier 11 and the speed/M flow control X section 13 are far apart, the D/A change 1! In some cases, it may be advantageous to perform A/D conversion to return the signal to the original digital signal, since the number of signal lines can be reduced. In addition, the servo motor is
From the perspective of robots, machine tools, etc., it is a component as a driving device, and the ■0 signal in Figure 7J117 may only be given as an analog signal. At this time, if the input signal of the speed/current control section mentioned in step 13 is a digital signal, an A/D conversion means shown in step 12 will be required.

In other words, the input signal 0 of the speed control section is converted into a digital speed command N'' by the l\/D conversion means 12 described in FIGS. The current to be applied is calculated, and the current is controlled by PWM control of the HAS signal of the transistor of the inverter main circuit 16.The output characteristics of the A/D conversion means 12 are shown in FIG.

As shown in FIG. 9, the resolution is high in the low voltage region, and the normal resolution is maintained in the medium voltage to high voltage region to ensure performance during positioning.

〔Effect of the invention〕

According to the present invention, there is no need to use expensive A/D conversion means with high resolution, so the cost is low.

Further, in the present invention, the gain of the i'1 width means does not change during operation, so there is little delay in operation.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing an embodiment of the A/D conversion device of the present invention, Figures 2 (A), (B), and (C) are human output characteristics diagrams of the speed command analog section, and Figure 3 is the speed Characteristic diagram of the command digital signal, No. 41 is a block diagram showing different embodiments of the present invention, FIG. 5 is a circuit diagram showing one embodiment of the amplifier circuits Ah A2 and A3 of the present invention, and FIG. Matching means + < 2
7 is a detailed block diagram of the AC servo motor, speed control and position ff, an example in which the A/D variable speed control means of the present invention is used for analog speed commands in II iJ, and FIG. 8 is a detailed block diagram of 11
7-position control person car D/A conversion means person output characteristic diagram, FIG. 9 is an A/D conversion means person output characteristic diagram. A/D I is the first A/D conversion means, and A/D2 is the third A/D conversion means.
A D conversion means, A/D3 is a second A/D conversion means, A3 is an amplification means, K2 is a matching means, and 2 is a switching circuit as a selection means. Fig. 2 Chiko 0 Fig.

Claims (1)

[Claims] 1. First A/D that converts analog signal values into digital values
a converting means, an amplifying means for amplifying the analog signal by a larger factor than the signal input to the first A/D converting means, and a second A/D converting means for converting the output of the amplifying means into a digital value.
D converting means; matching means for multiplying the output of the second A/D converting means by a coefficient to match the magnitude of the output of the first A/D converting means; and selecting means for selecting the output of the matching means and outputting a digital value according to the analog signal value. 2. The A/D converter according to claim 1, wherein the magnification of the amplifying means with respect to the signal input to the first A/D converting means and the coefficient of the matching means have a reciprocal relationship. 3. The selection means selects the output of the matching means in a range where the conversion hierarchy is dense, and selects the output of the matching unit in a range where the conversion hierarchy is sparse.
2. The A/D conversion device according to claim 1, wherein the A/D conversion device is configured to select the output of the A/D conversion means. 4. a first A/D conversion means for converting a first range of analog signal values into digital values; a third A/D conversion means for converting a third range of analog signal values into digital values; an amplifying means for amplifying the analog signal in a second range between the three ranges at a magnification greater than the signal input to the first A/D converting means and the third A/D converting means, and an output of the amplifying means; a second A/D conversion means for converting the output into a digital value; an inversion means for inverting the polarity of the output of the third A/D conversion means; a matching means for matching the magnitudes of the outputs of the converting means and the inverting means; and a matching means that selects the outputs of the first A/D converting means, the inverting means, and the matching means to generate a digital value corresponding to the analog signal value. 1. An A/D conversion device comprising output selection means. 5. The A/D conversion device according to claim 4, wherein the polarity of the second range is positive and negative. 6. Bias the minimum value of the second range to zero and set the second range to zero.
6. The A/D conversion device according to claim 5, further comprising bias means for inputting to the A/D conversion means. 7. The A/D conversion device according to claim 4, wherein the first to third A/D conversion means are included in a single microcomputer. 8. A motor control device comprising the A/D conversion device according to any one of claims 1 to 7 in a feedback loop. 9. The motor control device according to claim 8, wherein the A/D conversion device is included in a feedback loop that controls a stop position of the motor.