JPH03119568A - Recording and reproducing signal processing device - Google Patents

Abstract

PURPOSE:To shorten the dubbing time without an LSI for high-speed processing by dividing a signal reproduced at a high speed into plural parts, subjecting them to reproducing processing to extend the time base, compressing the time base by the recording processing and recording the signal at a high speed. CONSTITUTION:The reproducing signal reproduced at a high speed by a reproducing device 2 is divided into plural parts by a channel distributing circuit 110, and each divided reproduced signal has the time base extended by a reproducing processing circuit 130 to obtain an original signal. The signal is divided again by a format converting circuit 170 and has the time base compressed by a recording processing circuit 140 and is recorded at a high speed by a recorder 3, and thus, the original signal is dubbed. By this constitution to reproduce and record the signal at a high speed, the dubbing time is shortened without the LSI for high-speed processing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a recording/reproducing signal processing apparatus, particularly to a recording/reproducing signal processing apparatus suitable for dubbing.

[Summary of the invention]

In this invention, in a recording/reproduction signal processing device, means for distributing a reproduction signal supplied from a reproduction device driven at a higher reproduction speed than a standard reproduction speed to a plurality of channels; means for time-axis expanding the reproduced signals distributed to the respective areas, means for performing reproduction signal processing on the time-axis expanded signals, and recording signal processing on the signals subjected to the reproduction signal processing. means for compressing the time axis of the signal subjected to the recording signal processing, and means for compressing the time axis of the signal subjected to the recording signal processing, and a means for compressing the time axis of the signal to a recording device driven at a recording speed higher than the standard recording speed. By being equipped with means for supplying as a recording signal, LSI for high-speed processing
This allows the dubbing time to be shortened without using the .

[Conventional technology]

2. Description of the Related Art Conventionally, so-called dubbing has been performed in which a signal recorded on one recording medium is reproduced by a reproduction-side device and recorded on another recording-side recording medium.

[Problem to be solved by the invention]

Dubbing usually has a problem in that it requires a lot of time, for example, one hour of dubbing is required for one hour's worth of sources.

As one solution to this problem, it is possible to shorten the time by driving the playback and recording devices at a higher speed than the standard speed, and by performing various signal processing at a similar speed, but this is not the case currently used. Since signal processing LSIs have slow processing speeds in order to perform high-speed dubbing, LSIs that operate at higher speeds are required. However, developing such an LSI may require a great deal of cost and time.

Therefore, it is an object of the present invention to provide a recording/reproduction signal processing apparatus that can shorten dubbing time by using existing signal processing circuits and LSIs without relying on LSIs for high-speed processing.

[Means to solve the problem]

In this invention, in a recording/reproduction signal processing device, means for distributing a reproduction signal supplied from a reproduction device driven at a higher reproduction speed than a standard reproduction speed to a plurality of channels; means for time-axis expanding the reproduced signals distributed to the respective areas, means for performing reproduction signal processing on the time-axis expanded signals, and recording signal processing on the signals subjected to the reproduction signal processing. means for compressing the time axis of the signal subjected to the recording signal processing, and means for compressing the time axis of the signal subjected to the recording signal processing, and a means for compressing the time axis of the signal to a recording device driven at a recording speed higher than the standard recording speed. and means for supplying it as a recording signal.

[Effect]

The playback device 2 is driven at a faster playback speed than the standard playback speed to play back the signal. The reproduced signal is distributed to a plurality of channels of the recording/reproducing signal processing device 1 at regular intervals. In each channel, the reproduced signal is time-axis expanded, the reproduced signal processing is performed on the time-axis expanded signal, and the signal recorded on the first recording medium 21 according to the first recording format is Original signal C
The PCM data is restored to DPCM:l. Next, in each channel, recording signal processing is performed on this original signal. That is, the restored original signal described above is reconstructed according to the second recording format so that it can be recorded on the second recording medium 31.

The signals subjected to recording signal processing are time-axis compressed in each channel, and the time-axis compressed signals are supplied to the recording device 3.

The recording device 3 is driven at a faster recording speed than the standard recording speed, and the time-axis compressed signal is recorded on the second recording medium 31.

This greatly reduces dubbing time. Further, since signal processing between reproduction and recording is performed at standard speed in each of a plurality of channels, existing LSIs for signal processing circuits can be used.

〔Example〕

Hereinafter, an embodiment in which the recording/reproducing signal processing device according to the present invention is applied to a dubbing device will be described with reference to FIGS. 1 to 8.

As shown in FIG. 1, this dubbing apparatus mainly includes a recording/reproducing signal processing apparatus 1 of the present invention, a reproducing apparatus 2 connected to the preceding and succeeding stages, and a recording apparatus 3. Then, the signal recorded on the first recording medium 21 disposed in the reproducing device 2 is recorded on the second recording medium 31 disposed in the recording device 3 via the recording/reproducing signal processing device 1. It is done like this.

The playback device 2 is composed of, for example, an optical disk device,
A laser beam is irradiated from a pickup 23 onto an optical disk 21 as a first recording medium rotated by a motor 22, and a digital signal recorded based on the reflected light from the optical disk 21 is converted into an analog RF signal ARF.
Read as I. The speed at which this optical disc 21 is driven is higher than the standard playback speed, for example, 10 times faster. Therefore, this analog RF signal A
R21 is time-axis compressed to (1/10) compared to the standard playback speed and is output. This analog RF signal A
RF I is supplied to the recording/reproduction signal processing device 1 via the amplifier 24 .

The recording/reproducing signal processing device 1 includes a channel distribution circuit 11.
0, time axis expansion circuit 120, reproduction signal processing circuit 130,
A recording signal processing circuit 140, a time axis compression circuit] 50, and a recording signal output circuit 160 are provided, and if necessary, a reproduction signal processing circuit 130 and a recording signal processing circuit 140 are provided.
A format conversion circuit 170 is provided between the two.

The analog RF signal ARP I from the amplifier 24 is converted into a digital RF signal at a constant sampling rate by the A/D converter 111 provided in the channel distribution circuit 110.
It is converted into a signal DRFI. This is the time axis expansion circuit 1
This is because 20 uses digital memory. This digital RF signal DRF+ is transmitted to the channel distribution circuit 110.
The signal is supplied to a demultiplexer 112 provided at the terminal.

In the demultiplexer 112, the A/D converter 111
The digital RF signal DRF+ is sequentially distributed to a plurality of channels set in the reproduction processing system.

The number of channels in this playback system is determined by the relationship between the processing speed of the LSI constituting the playback signal processing circuit 130 and the playback speed of the playback device 2, and the processing speed corresponds to the standard playback speed of the playback device 2. In this case, the number of channels is equal to or more than the playback speed multiple, and for example, if the speed is 10 times, at least 10 channels are required. Furthermore, the switching timing of the demultiplexer 112 is also set corresponding to this number of channels.

The output of the demultiplexer 112 is sequentially supplied to RAMs 121A to 121J constituting time axis compression circuits 120 provided for, for example, 10 channels A to J of the reproduction system.

The digital RF signals DRFI written in the RAMs 121A to 121J at timings corresponding to the 10x playback speed are read out at timings corresponding to the standard playback speed, thereby undergoing time axis expansion.

The above-mentioned playback system supports a playback speed of 10 times,
Since 10 channels are provided, RAM121A
~ Digital RF signal 11)' read from 121J
RFI enables signal processing on each channel at timings corresponding to the standard playback speed.

The digital RF signal D'RF subjected to time axis expansion is transmitted to the D/A converters 122A to 12 of the time axis expansion circuit 120.
Analog RF signal A'R whose time axis is expanded by 2J
FI is obtained.

On the optical disc 21, an audio signal or the like is converted into a PCM signal DFCM, and this PCM signal DPc4 is processed by adding an error correction code, interleaving, etc., and is converted into a source code. Since it is modulated into the channel code and recorded together with the synchronization signal, the reproduced signal processing circuits 130A to 130J first perform waveform shaping on the analog RF signal A'RF+ to convert it into a digital signal, and then perform synchronization. The signal is detected, and the channel code digital signal is demodulated into the source code digital signal using this synchronization signal as a reference. Further, the digital signal of the source code is subjected to processing such as deinterleaving, error detection, error correction, interpolation, etc., thereby obtaining a PCM signal DPCM. This PCM signal DPCM is supplied to a format conversion circuit 170, which will be described later, as needed.

Outputs from the reproduction signal processing circuits 130A to 130J are supplied to each channel of the recording system via a format conversion circuit 170 provided as necessary. The number of recording system channels is also determined in the same way as the number of reproduction system channels.

In this example, there are 10 channels A to J, which are the same as the reproduction system.
0 is provided. In each channel of the recording system supplied to the recording signal processing circuits 140A to 140J, the PCM signal 1) is subjected to interleaving according to the recording format of the recording device 3, and an error correction code is added thereto. . Thereafter, it is modulated using a predetermined modulation method and a synchronization signal is added to form an analog RF signal A RF 2 . According to the present invention, the reproduction signal processing circuit 130 and the recording signal processing circuit 140 may be constructed using existing LSIs.

The analog RF signal ARP□ output from the recording signal processing circuits 140A to 140J may be processed by an ID, which will be described later, as necessary.
Time axis compression circuit 15 via renumbering circuit 141
0. In the time axis compression circuit 150, the analog RF signal A Rp 2 is converted into an AID converter 15
51J as a digital RF signal D RF2,
The data is supplied to the RAMs 152A to 152J and written at a timing corresponding to the standard recording speed. RAM152A~
From the output side of 152J, compared to the standard recording speed,
The digital RF signal D'RFZ is read out at double speed.

Therefore, the digital RF signal D'RF2 is subjected to time axis compression to 1/10 of the digital RF signal DRF2. The digital RF signal D'RFZ output from the RAMs 1.52A to 152J is supplied to the multiplexer 161 of the recording signal output circuit 160.

In the multiplexer 161, RAMs 152A to 152
, J and the D/A converter 162 are sequentially switched to generate a time-axis compressed digital RF signal D'RF.
2 is continuously supplied to the D/8 converter 162.

The D/A converter 162 receives digital RF signals D'□,
2 is converted into an analog RF signal A'RF2 to form a recording signal and supplied to the recording device 3.

The recording device 3 is composed of, for example, a known helical scan type digital tape recorder device, and serves as a second recording medium driven by a capstan motor (not shown) at 10 times the standard recording speed. An analog RF signal A'RF2 is recorded on the magnetic tape 31 by a rotary head 34 which is rotated at ten times the speed by a drum motor 12 (not shown). Note that 32 is a recording amplifier.

Thereby, the signal recorded on the optical disk 21 can be reproduced in a time of 1/1o, for example, and can be recorded on the magnetic tape 31 in a time of 1/1o. Further, for this recording, the same signal processing circuit and LSI as conventional ones can be used without using an LSI for high-speed processing.

Incidentally, in the recording format of the recording device 3, an ID number may be assigned to a synchronization signal and blocks delimited by the synchronization signal in order to identify the block.

This ID number is recorded as an ID signal together with a synchronization signal, but since existing LSIs are used as the existing recording signal processing circuits 140A to 140J, the same number is assigned to each channel as shown in FIG. will be done.

If these were recorded sequentially via the multiplexer 161, the same ID numbers would be consecutive as shown in FIG.

Then, the fourth ID renumbering circuit 141 provided at the next stage of the recording signal processing circuits 140A to 140J
By changing the ID numbers to continuous numbers across all channels as shown in the figure, the ID numbers are recorded in the correct order as shown in FIG.

This means that if an ID number is also assigned to the recording format of the playback device 2 and is used in the playback signal processing circuit 130, a similar ID renumbering circuit can be used in the playback system as well. It is preferable to provide it at the front stage of 130.

Also, when dubbing between the playback device 2 and the recording device 3, which have different recording formats, such as error correction code block size or sync plotter size separated by synchronization signals, the playback/recording speed and number of channels may be changed. It is necessary to select them appropriately so that signal processing in each channel can be completed in units of blocks.

3 4 If this is not possible, a format I conversion circuit 170 is provided between the reproduction signal processing circuit 130 and the recording signal processing circuit 140, and the PCM signal DPCM is distributed to each channel so that the block is completed. There is a need.

Format conversion circuit 170, multiplexer 171
, a memory 172, a demultiplexer 173, and their controller 174.

For example, as shown in FIG. 6, when the block size L of the error correction code of the recording format of the reproduction device 2 is equal to the block size LR of the error correction code of the recording format of the recording device 3, the format conversion circuit 170 The PCM signal D PCM can be transmitted as is from the reproduction signal processing circuit 130 to the recording signal processing circuit 140 for each channel without using.

Furthermore, as shown in FIG. 7, the block size L is not equal to the block size LR, and the block size L,
When corresponds to an integral multiple of the block size L, for example 3 times, the PCM signal DP of 3 blocks o 7 of the optical disk 21
If the signals c, 41 to DPcM3 can be outputted from the reproduction signal processing circuit 130 of one channel and supplied as they are to the recording signal processing circuit 140 of the same channel, a format conversion circuit is not necessary.

However, as shown in FIG. 8, block size LR
is block size L. For example, when it corresponds to 1.5 times the PCM signal D PCM+ from one error correction code block from the reproduction signal processing circuit 130A of one channel.
is supplied to the recording signal processing circuit 140A of one channel, and the PCM signal from one error correction code block from the reproduction signal processing circuit 130B of the next channel is supplied.
. The first half of PCM data DPCM□1 of 9□ also needs to be supplied to the recording signal processing circuit 140A of the same channel.

Then, the second half of the PCM signal DFCM2 is sent to the recording signal processing circuit 140B of the next channel.
□ and the next channel's reproduction signal processing circuit 130C
It is necessary to supply the PCM signal DPcI3 from 56.

Then, the multiplexer 171 sequentially switches the connection between the reproduced signal processing circuits 130A to 130J and the memory 172.
A PCM signal DPCM supplied from the memory 171 is continuously supplied to the memory 171.

The controller 174 is supplied with a format identification signal FD regarding the reproducing device 2 through a terminal 175 and a format identification signal FR regarding the recording device 3 through a terminal 176 . The controller 174 selects the multiplexer 17 based on this format identification signal F.
1 switching signal and write address A of memory 172
D, is formed, multiplexer 171 and memory 172
supplied to

The PCM signals DPoM supplied from the reproduction signal processing circuits 130A to 130J are sequentially written into the memory 172 based on the write address AD9 described above.

Further, in the controller 174, a switching signal for the demultiplexer 173 and a read address ADll for the memory 172 are formed based on the format identification signal F8, and are supplied to the demultiplexer 173 and the memory 172.

From the memory 172, the written PCM signal DP
The oM is read out sequentially according to the read address ADH, and the read PCM signal is read out. 9 is supplied to the demultiplexer 173.

The demultiplexer 173 includes a memory 172 and recording signal processing circuits 140A-14. The connections between the OJs are sequentially switched, and the PCM signal DPC□ is sequentially supplied to the recording processing circuits 140A to 140J as described above.

As a result, even if the block sizes LDXL are different, the difference can be corrected and recorded.

In this embodiment, dubbing from the optical disk 21 to the magnetic tape 31 is taken as an example, but it is not limited to this. For example, it can be similarly applied to dubbing from a magnetic tape to an optical disk. Similarly, dubbing between magnetic tapes is also possible.

Further, in this embodiment, as described above, the analog RF signal A'RFI supplied to the reproduction signal processing circuits 130A to 130J is transmitted for each error correction code block or for each integer multiple thereof, for example, for each sector of the optical disc 21. It is assumed that the signal is supplied to multiple channels, and that the error correction code in this case is applied on a block-by-block basis.

However, even when an error correction code that affects multiple blocks, such as a convolutional code, is used, the demultiplexer 112 can be replaced with a memory, and the data of multiple blocks within the affected range can be processed as a unit. Each RAM 121A to 121 is duplicated for each channel.
The present invention can be applied by extracting only the necessary PCM signal DPCM from the output of the reproduced signal processing circuit 130 by removing the overlapping portion. However, in this case, it is necessary to slow down the recording/reproducing speed or increase the number of channels by the time required to process the duplicated signals. The same can be said of the recording signal processing circuits 140A to 140J.

〔Effect of the invention〕

In the recording/reproduction signal processing device according to the present invention, a first recording medium is driven at a higher reproduction speed than a standard reproduction speed to reproduce a signal, and the reproduced signal is time-divided into a plurality of It is distributed to channels, subjected to time axis expansion and playback processing, and as a result, the original original signal [PDM data Dr.
e, 4) is restored, and then recording processing and time axis compression are performed on this original signal, and the signal is transferred to a second recording medium that is driven at a faster recording speed than the standard recording speed. Since the signal is recorded on the first recording medium, the signal recorded on the first recording medium can be recorded on the second recording medium in a short time, and the time required for recording can be significantly shortened.

On the other hand, signal processing between playback and recording is performed in multiple processing systems for each time-divided signal at a speed corresponding to the standard playback speed, so there is no need to rely on LSI for high-speed processing. This has the advantage that an existing signal processing circuit, 90 LSI, can be used.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIGS. 2 to 5 are diagrams showing renumbering processing, and FIGS. 6 to 8 are diagrams showing renumbering processing from a first recording medium to a second recording medium, respectively. FIG. 3 is a diagram showing the state of data distribution to media. Explanation of main symbols in the drawings 1: Recording and reproduction signal processing device, 2: Reproduction device, 3: Recording device, 110: Channel distribution circuit, 120: Time axis expansion circuit, 130: Reproduction signal processing circuit, 14
0: recording signal processing circuit, 150: time axis compression circuit,
DPCM: PCM signal, ARPI, A'
RFI, ARP□: Analog RF signal, DR eye,
D'++pz: Digital RF signal.

Claims (1)

[Scope of Claims] Means for distributing a playback signal supplied from a playback device driven at a playback speed higher than a standard playback speed to a plurality of channels, and a playback signal distributed to each of the channels. means for time-axis expanding the above-mentioned time-axis expanded signals, means for performing reproduction signal processing on the above-mentioned time-axis expanded signals, means for performing recording signal processing on the signals subjected to the above-mentioned reproduction signal processing, and A means for compressing the time axis of the signals subjected to the recording signal processing, and a recording device that is driven at a faster recording speed than the standard recording speed, and transmitting the time axis compressed signals as recording signals. What is claimed is: 1. A recording/reproduction signal processing device comprising means for supplying a signal as a signal.