JPH03119474A - Simulation device - Google Patents

Abstract

PURPOSE:To intentionally control the simulating speed and to effectively perform the analyses of results, the debugging work, etc., by providing a speed control part which control the working speed of an action simulating part, a display part which displays the output data obtained from the action simulating part, etc. CONSTITUTION:An input part 11 is provided to input the circuit diagrams and the control instructions to a computer together with a storage part 12 which stores the inputted data, an action simulating part 13 which simulates the action of a circuit based on the data stored in the part 12, the control instructions inputted directly from the part 11, etc., a speed control part 14 which controls the working speed of the part 13, and a display part 15 which displays the output data obtained from the part 13. In such a constitution, the circuit action that is carried out at the time to be noted can be simulated at a low speed and with extremely high efficiency when the simulating speed is intentionally changed and the analyses of simulation results and the debugging work of data on the circuits to be simulated are carried out based on the displayed output results.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to a simulation device that simulates operation of circuit data input to a computer.

BACKGROUND OF THE INVENTION Conventionally, the operating speed of a simulation device that simulates circuit data input to a computer depends on the capacity of the computer device in which the simulation device is installed, and is not constant under the same conditions. be.

Hereinafter, the operation of the conventional simulation apparatus described above will be explained with reference to the drawings.

FIG. 3 shows a general configuration diagram of a conventional simulation device. In FIG.
2 is a storage unit that can store data input from the input unit 3I; 33 is a storage unit that can store data stored in the storage unit 32, control commands, etc. directly input from the input unit 31) (7) An operation simulator 34 is a display unit that can display output data obtained from the operation simulator 33.

Hereinafter, an event that changes the state of the wiring will be referred to as an event.

FIG. 4 shows an example of the configuration of a conventional simulation device that embodies the configuration shown in FIG.

In FIG. 4, numeral 40 is a library in which information on the operation and delay of all circuit elements is stored, 4I is an input section through which circuit diagrams and control instructions can be input into the computer, and 42 is input from the input section 4I. 43 is a delay information storage section that can store delay information of each component of the input circuit; 44 is the input circuit; An inter-element connection relationship storage section 45 is capable of storing connection relationships between the component elements by wiring, and an inter-element connection relationship storage section 45 stores connections between the component elements, which are the same as the current target component, from the connection relationships stored in the inter-element connection relationship storage section 44. 46 is an event execution unit that executes processing according to an issued event based on the element function storage unit 42 and the delay information storage unit 43; 47 is an event scheduling unit that issues events, and 48 is an output unit.

The operation of the conventional simulation device will be described below with reference to FIG.

When circuit diagram data is input from the input unit 41, by referring to the library 40, the operation of the circuit component input from the input unit 41 is stored in the element function storage unit 42, and the library is also referred to. As a result, delay information of each component of the input circuit is stored in the delay information storage section, and connection relationships between the components of the input circuit by wiring are stored in the inter-element connection relationship storage section 44. Managing the order of event issuance and issuing events 1 - In the scheduling unit 47, an initial event is set based on the initial state value of the circuit data input from the input unit 41, and when the event is issued, the target The wiring state value is delivered to the event execution unit 46, and the wiring salt is delivered to the connection relationship tracking unit 45. In the connection relationship tracking section 45, the inter-element connection relationship storage section 44
Based on this, a circuit element whose input signal line is the current target wiring is traced, and this circuit element name is sent to the event execution unit 46, and the output signal line name of this circuit element is sent to event scheduling. Hand over to Department 47. The event execution unit 46 calls out the operation of the circuit element handed over from the connection relationship tracking unit 45 from the element function storage unit 42, and operates when the wiring state value handed over from the event scheduling unit 47 is used as an input value. Find the output value.

If the operational output 4IE of this circuit element is different from the original output value of this circuit element, the event execution unit 46 calculates the delay amount of the circuit element based on the delay information storage unit 43, and first The obtained operational output value and this delay amount are delivered to the event scheduling section 47. The event scheduling section 47 generates an event consisting of the total operation output value obtained from the event execution section 46 and the output signal line name obtained from the connection relationship tracking section 45, and the delay amount obtained from the event execution section 46. The time is delayed by the amount of time and is issued.

The above operation system is performed until the preset simulation execution time has elapsed. The operation output values obtained by the event execution section 46 are sequentially delivered to the output section 48, and the output section 48 performs processing such as display based on this data.

Problems to be Solved by the Invention However, in the above simulation apparatus, the speed of simulation depends on the processing power of the computer, and the speed cannot be changed intentionally.

Therefore, when analyzing simulation results or debugging simulation target circuit data from the output results displayed in the output section, it does not matter whether the circuit operates at times that require attention or when it does not require particular attention. , since the simulation is always performed at a constant speed, in order to examine the operation of the circuit at the time you want to pay attention to, for example, if you slow down the operation speed of the simulation device, the simulation will be performed at all times, including times when you do not need to pay attention. The simulation speed was slow and the efficiency was very low.

In view of this problem, the present invention provides a simulation device that can intentionally change the speed.

Means for Solving the Problems In order to solve the above problems, the present invention provides an input section into which circuit diagrams and control instructions can be input into a computer, and a storage of data input from the input section. an operation simulating section that operates a circuit in a simulated manner based on data stored in the storage section and control commands directly input from the input section; and an operation of the operation simulating section. It is equipped with a speed control section that can control the speed, and a display section that can display output data obtained from the 1111-recording and 4I mulberry display section.

Effects of the present invention With the configuration described in -F, it is possible to intentionally change the execution speed of the simulation, so that, for example, analysis of simulation results or debugging of simulation target circuit data can be performed from the output results displayed on the output device. Sometimes, it is possible to simulate only the operation of a circuit at a time of interest at low speed, which is very efficient.

EXAMPLE Hereinafter, a simulation apparatus according to an example of the present invention will be described with reference to the drawings.

FIG. 1 shows a configuration diagram of a simulation apparatus according to an embodiment of the present invention, which can simulate circuit data input to a computer by changing the operating speed.

In FIG. 1, reference numeral 11 is an input section into which circuit diagrams and control instructions can be input into the computer, 12 is a storage section which can store data input from the input section 11, and I
3 is the data stored in the storage unit 12 and the input unit 11.
14 is a speed control unit that can control the operating speed of the operation simulation unit 13; 15 is a speed control unit that can control the operation speed of the operation simulation unit 13; This is a display section that can display the output data that is displayed.

FIG. 2 shows an example of the configuration of the simulation apparatus of the present invention, which is a more specific version of the configuration shown in FIG.

In FIG. 2, 20 is a library in which information on the operation and delay of all circuit elements is stored, 21 is an input section through which circuit diagrams and control instructions can be input into the computer, and 22 is an input section for inputting information from the input section 21. 23 is a delay information storage section that can store delay information of each component of the input circuit; 24 is the input circuit; An inter-element connection relationship storage unit 25 is capable of storing connection relationships by wiring between component elements, and an element-to-element connection relationship storage unit 25 stores connections between the component elements that are the same as the current target component, based on the connection relationships stored in the inter-element connection relationship storage unit 24. 26 is an event execution unit that executes processing according to an issued event based on the element function storage unit 22 and the delay information storage unit 23; 27 is an event scheduling unit that issues events; 28 is a connection relationship tracking unit 2
5, or an operation speed control section 29 having a function of changing the operation speed of the event execution section 26, the event scheduling section 27, or a plurality of these processing sections; This is an output section that outputs.

The operation of the simulation apparatus of the present invention will be described below with reference to FIG. When circuit diagram data is input from the input unit 21, by referring to the library 20, the operation of the circuit component input from the input unit 21 is stored in the element function storage unit 22, and the library is also referred to. As a result, delay information of each component of the input circuit is stored in the delay information storage section, and connection relationships between the components of the input circuit by wiring are stored in the inter-element connection relationship storage section 24.

The event scheduling unit 27, which manages the event issuing order and issues events, sets an initial event from the initial state value of the circuit data input from the input unit 21 or 0, and when the event is issued, the target The wiring state value is delivered to the event execution unit 26, and the wiring group is delivered to the connection relationship tracking unit 25. The connection relationship tracing unit 25 traces a circuit element whose input signal line is the current target wiring based on the inter-element connection relationship storage unit 24, and uses this circuit element name as an event execution unit. 26, the output signal line name of this circuit element is specified by the event scheduling unit 27.
hand over to. The event execution unit 26 calls the operation of the circuit element handed over from the connection relationship tracking unit 25 from the element function storage unit 22, and first calls the operation of the circuit element handed over from the connection relationship tracking unit 25 to the event scheduling unit 26.
The operation output value is obtained when the state value of the wiring handed over from 7 is used as the input value. If the operational output value of this circuit element is different from the original output value of this circuit element, the event execution unit 26 calculates the delay amount of the circuit element based on the delay information storage unit 23, and first The obtained operational output value and this delay amount are delivered to the event scheduling section 27.

Furthermore, the event execution unit 26 calculates the delay amount of the circuit element handed over by the connection relationship tracing unit 25 based on the delay information storage unit 23, and also passes this to the event scheduling unit 27. The event scheduling section 27 generates an event consisting of the operation output value obtained from the event execution section 26 and the output signal line name obtained from the connection relationship tracking section 25, and the delay amount obtained from the event execution section 26. The time will be delayed by the amount of time and will be issued.

The above operation system is performed until the preset simulation execution time has elapsed. The operation output values obtained by the event execution section 26 are sequentially delivered to the output section 29, and the output section 29 performs processing such as display based on this data.

When a control command is input to the operation speed control section 28 from the input section 21 and a request to change the operation speed of the simulation device occurs, the operation speed control section 28 controls the connection relationship tracking section 25 or the event execution section. 26, or the event scheduling unit 27, or a plurality of these processing units. A specific example of the operating speed control section 28 is shown below.

Consider a case where a command "Delay the output result for 5 seconds and output it" is input from the input section 21 to the operation speed control section 28 in FIG. 2.

FIG. 5 shows that the operation speed control section 28 controls the connection relationship tracking section 25.
This is an example of controlling the operating speed. In Figure 5, the fifth
Figure (a) shows the second simulation device of the present invention.
3 is a diagram illustrating a flow of processing in which the operating speed control unit 28 shown in the figure changes the operating speed of the connection relationship tracing unit 25. FIG. Figure 5 (b
) is a diagram showing the processing flow of the connection relationship tracking unit 45 of FIG. 4, which is a conventional simulation device.

In FIG. 5(b), the processing steps of the connection relationship tracking unit 45 in FIG. 4 are as follows.

Step 55I: Obtain the wiring base of the event issued from the event scheduling section 47.

Step 552: Refer to the inter-element connection relation storage unit 44 to obtain the circuit elements connected to the output ends of the wirings.

Step 553: Determine whether this circuit element exists. If it exists, the process advances to step 554; if it does not exist, the process advances to step 558.

Step 554: Refer to the inter-element connection relation storage unit 44 to obtain the wiring group on the output side of this circuit element.

Step 555: Determine whether this wiring exists. If it exists, the process advances to step 556; if it does not exist, the process advances to step 558.

Step 556: Deliver the circuit element name to the event execution unit 46.

Step 557: Deliver the wiring group connected to the output side of the circuit element to the event scheduling section 47.

Step 558: End.

In FIG. 5(a), the processing steps of the connection relationship tracing section 25 of FIG. 2 are as follows.

Step 501: Obtain the wiring base of the event issued from the event scheduling section 27.

Step 502: Refer to the inter-element connection relation storage unit 24 to obtain the circuit elements connected to the output ends of the wirings.

Step 503: Determine whether this circuit element exists. If it exists, the process goes to step 504; if it does not exist, the process goes to step 509.

Step 504: Obtain the wiring core on the output side of this element circuit by referring to the inter-element connection relation storage unit 24.

Step 505: Determine whether this wiring exists. If it exists, the process advances to step 506; if 'lY does not exist, the process advances to step 509.

Step 506: Continue to stop for 5 seconds until proceeding to the next step 507.

Step 507: Event 1 to deliver the circuit element name to the execution unit 26.

Step 508: Deliver the wiring core connected to the output side of the circuit element to the event scheduling section 27.

Step 509: End.

In the processing step 506 of FIG. 5(a), the operation speed control section 28 causes the operation speed of the connection relationship tracking section 25 to be slower than the processing of the connection relationship tracking section 45 of FIG. 5(b) by 5 seconds. has been realized.

However, the operating speed refers to the speed at which data is output to other components after data is input in each component of the conventional simulator shown in FIG. 4 and the simulator of the present invention shown in FIG. It refers to the speed at which the

FIG. 6 shows that the operation speed control section 28 controls the event execution section 26.
This is an example of controlling the operating speed.

In FIG. 6, FIG. 6(a) is a diagram showing the flow of processing in which the operation speed control section 28 of FIG. 2, which is the simulation apparatus of the present invention, changes the operation speed of the event execution section 26.

FIG. 6(b) is a diagram showing the processing flow of the event execution unit 46 of FIG. 4, which is a conventional simulation device. In FIG. 6(b), the event execution unit 46 of FIG.
The processing steps are as follows.

Step 651: Obtain the wiring state value of the event issued from the event scheduling section 47.

Step 652: The connection relationship tracking unit 45 obtains the name of the circuit element connected to the output end of this wiring.

Step 653: Obtain the operation of this circuit element from the element function storage section 42.

Step 654: The state value of the wiring is used as the input value. 6 Calculate the operational output value of the circuit element.

Step 655: Determine whether the calculated operational output value is different from the original output value of the circuit element. If they are different, go to step 7 65G, if they are the same, go to step 658
Proceed to.

Step 656: Obtain the delay amount of the circuit element from the delay information storage section 43.

Step 657: Deliver the calculated operational output value and delay amount to the event gauge ring unit 27.

Step 658: End.

In FIG. 6(a), the processing steps of the event execution unit 26 of FIG. 2 are as follows.

Step 601: Obtain the wiring state value of the event issued from the event scheduling unit 27.

Step 602: The connection relationship tracking unit 25 obtains the name of the circuit element connected to the output end of this wiring.

Step 603: Obtain the operation of this circuit element from the element function storage section 22.

Step 604: Using the state value of the wiring as an input value, calculate the operational output value of the circuit element.

Step 605: Determine whether the calculated operational output value is different from the original output value of the circuit element. If they are different, the process goes to step 606; if they are the same, the process goes to step 609.

Step 606: Obtain the delay amount of the circuit element from the delay information storage unit 23.

Step 607: Continue to the next stop state for 5 seconds until proceeding to the next step 608.

Step 608: Deliver the calculated operation output value and the delay amount to the event scheduling unit 27.

Step 609: End.

In the process step 607 of FIG. 6(a) above, the operation speed control section 28 causes the operation speed of the event execution section 26 to be slower than the processing of the event execution section 46 of FIG. 6(b) for 5 seconds. has been realized.

FIG. 7 is an example in which the operating speed control section 28 controls the operating speed of the event scheduling section 27.

In FIG. 7, FIG. 7(a) is a diagram showing the flow of processing in which the operation speed control section 28 of FIG. 2, which is the simulation apparatus of the present invention, changes the operation speed of the event scheduling section 27. be. Figure 7(b) shows
5 is a diagram showing the flow of processing of the event scheduling unit 47 of FIG. 4, which is a conventional simulation device. FIG.

In FIG. 7(b), the processing steps of the event scheduling section 47 of FIG. 4 are as follows.

Step 751: Obtain the operation output value and the delay amount of the circuit element from the event execution unit 46.

Step 752: Obtain the output wiring group of the circuit element from the connection relationship tracing section 45.

Step 753: Create an event based on the output wiring group and the operation output value.

Step 754: Register this event at a time that is advanced by the amount of delay from the current time.

Step 755: Determine whether there is an event to be issued at the current time. If the corresponding event exists, the process proceeds to step 758; otherwise, the process proceeds to step 756.

Step 756: Advance the current time by one.

Step 757: Determine whether the current time has passed the preset execution end time. If it has passed, go to step 759; if it has not passed, go to step 75
Return to 5.

Step 758: Issue an event.

Step 759: End.

In FIG. 7(a), the processing steps of the event scheduling section 27 of FIG. 2 are as follows.

Step 701: Obtain the operation output value and the delay amount of the circuit and element from the event execution unit 26.

Step 702: Obtain the output wiring group of the circuit element from the connection relationship tracking section 25.

Step 703: Create an event based on the output wiring base and the operation output value.

Step 704: Register this event at a time that is advanced by the amount of delay from the current time.

Step 705: Determine whether there is an event to be issued at the current time. If the corresponding event exists, the process proceeds to step 70B; otherwise, the process proceeds to step 706.

Step 706: Advance the current time by one.

90 Step 707: Determine whether the current time has passed the preset execution end time. If it has passed, go to step 710; if it has not passed yet, go to step 70.
Return to 5.

Step 708: Continue to the next stop state for 5 seconds until proceeding to the next step 709.

Step 709: Issue an event.

Step 710: End.

In the above processing step 708 of FIG. 7(a), the operation speed control section 28 causes the operation speed of the event scheduling section 27 to be slower than the processing of the event scheduling section 47 of FIG. 7(b) by 5 seconds. has been realized.

In addition, as another method for realizing the operation speed control section 28, two or three processing sections among the connection relationship tracking section 25, the event execution section 26, and the event scheduling section 27,
They may be applied at the same time.

Effects of the Invention As described above, the present invention has an input section that can input circuit diagrams and control instructions to a computer, a storage section that can store data input from the input, an operation simulator for simulating a circuit operation based on data stored in the storage unit, control commands directly input from the input unit, and the like; and an operation simulator for controlling the operation speed of the operation simulator. a speed control unit that can display the output data obtained from the motion simulation unit;
By providing this, it is possible to intentionally control the operation speed of the simulation.

Therefore, for example, if you run the simulation at a low speed only at the time you want to focus on, you can better understand how the data changes, and you can analyze and debug the results very efficiently.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a simulation device that can intentionally change the operating speed, FIG. 2 is a diagram showing a specific configuration example of the simulation device, FIG. 3 is a block diagram of a conventional simulation device, and FIG. Figure 4 is a diagram showing a specific example of the configuration of a conventional simulation device, Figures 5, 6,
FIG. 7 is a diagram showing an example of a specific method of changing the operating speed of simulation. 11...Input section, 12...Storage section, 1
3...Motion simulation section, 14...Speed control section, 15...Display section, 21...Input section, 22...Element Function memory section, 23...
Delay information storage unit, 24... Inter-element connection relationship storage unit, 25... Connection relationship tracking unit, 26...
・Event execution unit, 2τ...I・\nt scheduling unit, 28...Operating speed control unit, 29
...Output section.

Claims (4)

[Claims] (1) An input section that can input circuit diagrams and control instructions onto the computer, a storage section that can store data input from the input section, and data stored in the storage section. and an operation simulation unit that simulates a circuit based on a control command directly input from the input unit;
A simulation device comprising: a speed control section capable of controlling the operation speed of the motion simulation section; and a display section capable of displaying output data obtained from the motion simulation section. (2) The simulation apparatus according to claim (1), further comprising a speed control section that can set the operation speed of the motion simulation section to the data value input from the input section. (3) The simulation apparatus according to claim (1), further comprising a speed control section that can set the upper limit of the operation speed of the motion simulation section to the data value input from the input section. (4) The simulation apparatus according to claim (1), further comprising a speed control section that can set the lower limit of the operation speed of the motion simulation section to the data value input from the input section.